JPH01214153A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH01214153A JPH01214153A JP4000688A JP4000688A JPH01214153A JP H01214153 A JPH01214153 A JP H01214153A JP 4000688 A JP4000688 A JP 4000688A JP 4000688 A JP4000688 A JP 4000688A JP H01214153 A JPH01214153 A JP H01214153A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- resistance
- resistor
- semiconductor device
- layers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 20
- 239000000758 substrate Substances 0.000 claims abstract description 11
- 238000009413 insulation Methods 0.000 abstract description 5
- 238000005530 etching Methods 0.000 abstract description 2
- 238000004519 manufacturing process Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000002184 metal Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/0802—Resistors only
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は半導体装置に関し、特に抵抗の構造を提供す
るものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a semiconductor device, and particularly to a resistor structure.
第３図＋ａｌ （ｂｌに従来の抵抗の平面図及び断面図
を示す。Figure 3+al (bl shows a plan view and a cross-sectional view of a conventional resistor.
図において（１１は電極、（２）は抵抗層、（４〕は半
導体基板である。In the figure, (11 is an electrode, (2) is a resistance layer, and (4) is a semiconductor substrate.
次に従来の抵抗の構造について説明する。Next, the structure of a conventional resistor will be explained.
半導体基板上に必要な抵抗値が得られる大きさの抵抗層
を設け、さらにその抵抗層の両端に電極を備えた構造を
とっていた。A resistive layer of a size that provides the necessary resistance value is provided on a semiconductor substrate, and electrodes are provided at both ends of the resistive layer.
従来の半導体装置は以上のように構成されていたので、
集積回路等に適用する場合、チップ内の面積を占める割
合が大きく、チップの小型化に歯止めをかけていた。Since conventional semiconductor devices were configured as described above,
When applied to integrated circuits, etc., it occupies a large proportion of the area within the chip, which has put a brake on miniaturization of the chip.
この発明は上記のような問題点を解消するためになされ
たもので、抵抗の小型化を図り、チップの縮小化が可能
となる半導体装置を得ることを目的とする。The present invention has been made to solve the above-mentioned problems, and aims to provide a semiconductor device in which the size of the resistor can be reduced and the size of the chip can be reduced.
この発明に係る半導体装置は抵抗の抵抗層を基板上に絶
縁層をはさんで複数層設けたものである。A semiconductor device according to the present invention has a plurality of resistive layers formed on a substrate with insulating layers interposed therebetween.
この発明による半導体装置においては、抵抗の抵抗層を
基板上に絶縁層をはさんで複数層設けることにより、抵
抗の寸法を縮小することが可能となる。In the semiconductor device according to the present invention, the dimensions of the resistor can be reduced by providing a plurality of resistance layers of the resistor on the substrate with insulating layers interposed therebetween.
以下、この発明の一実施例を図について説明する。 An embodiment of the present invention will be described below with reference to the drawings.
第１図ｆａｔは抵抗の平面図、第１図（ｂｌは抵抗の断
面図、第２図は上記抵抗の製造工程の一実施例である０
図において（１）は抵抗層（２ｂ）上に設けられた電極
、（３）は第１の抵抗層（２ａ）と第２の抵抗層（２ｂ
）の間に設けられた絶縁層、（４）は半導体基板である
。Figure 1 fat is a plan view of the resistor, Figure 1 (bl is a cross-sectional view of the resistor, and Figure 2 is an example of the manufacturing process of the above resistor.
In the figure, (1) is an electrode provided on the resistance layer (2b), and (3) is the electrode provided on the first resistance layer (2a) and the second resistance layer (2b).
), and (4) is a semiconductor substrate.
この実施例による半導体装置は、絶縁層（３）をはさん
で抵抗層（２）を２層にしているため、これまで必要と
されていた抵抗面積の約半分となり、チップ上の占有面
積も約半分となる。Since the semiconductor device according to this embodiment has two resistor layers (2) with an insulating layer (3) in between, the resistor area required up to now is approximately half, and the area occupied on the chip is also reduced. It will be about half.
また、この抵抗の製造方法例としては、図２に示すよう
に、まず半導体基板（４）上に第１層目の抵抗層（２ａ
）を設け、次にその抵抗層（２ａ）の上に絶縁層（３）
を設ける。さらに、上記絶縁層（３）上に抵抗層（２ｂ
）を設け、絶縁層（３）と抵抗層（２ｂ）の一部をエツ
チング等で取り除き、電極（１）をそれぞれ設ける方法
がある。In addition, as an example of a method for manufacturing this resistor, as shown in FIG.
), and then an insulating layer (3) is provided on the resistance layer (2a).
will be established. Furthermore, a resistance layer (2b) is provided on the insulating layer (3).
), then remove a portion of the insulating layer (3) and the resistive layer (2b) by etching or the like, and provide the electrodes (1) respectively.
なお、上記実施例では、半導体基板（４）上に設ける例
を示したが誘電体基板でもよく、上記実施例と同様の効
果を奏する。また、抵抗層はエピタキシャル層のような
半導体層、Ｎｉ／Ｃｒのような金属層でもよく、抵抗に
なり得る材料であり、製作上何ら問題がない限りすべて
適用できる。また、絶縁層は誘電体層などを用いてもよ
く、絶縁が可能で製作上何ら問題がない限りすべて適用
できる。In addition, in the above embodiment, an example was shown where it is provided on the semiconductor substrate (4), but a dielectric substrate may also be used, and the same effects as in the above embodiment can be obtained. Further, the resistance layer may be a semiconductor layer such as an epitaxial layer, or a metal layer such as Ni/Cr, which are materials that can serve as a resistance, and can be applied to any material as long as there are no problems in manufacturing. Further, a dielectric layer or the like may be used as the insulating layer, and any material can be used as long as insulation is possible and there are no problems in manufacturing.
また、上記実施例では、抵抗層が２層の場合について説
明したが、抵抗層は３層以上でもよく層数が多いほど、
抵抗寸法の縮小化が図れる。In addition, in the above embodiment, the case where the resistance layer is two layers has been explained, but the resistance layer may have three or more layers, and the larger the number of layers, the more
The resistance dimensions can be reduced.
以上、説明したように、この発明の抵抗は抵抗層を絶縁
層をはさんで複数重ねるような構成にしたので、抵抗の
寸法の縮小が可能となり、チップの小型化が実現できる
という利点がある。As explained above, since the resistor of the present invention has a structure in which multiple resistor layers are stacked with insulating layers in between, it is possible to reduce the dimensions of the resistor, which has the advantage of realizing miniaturization of the chip. .
第１図ｉａ） （ｂｌは、この発明の一実施例を示す半
導体装置の平面図及び断面図、第２図は上記実施例の半
導体装置の製造工程を示す工程別断面図、第３図［ａｌ
（ｂ）は従来の半導体装置の平面図及び断面図である
。
図において、ｆｉｌは電極、（２）は抵抗層、第３は絶
縁層、（４）は半導体基板である。
なお、各図中の同一符号は同一または相当部分を示す。FIG. 1 ia) (bl is a plan view and a sectional view of a semiconductor device showing an embodiment of the present invention, FIG. 2 is a step-by-step sectional view showing the manufacturing process of the semiconductor device of the above embodiment, and FIG. al
(b) is a plan view and a cross-sectional view of a conventional semiconductor device. In the figure, fil is an electrode, (2) is a resistance layer, the third is an insulating layer, and (4) is a semiconductor substrate. Note that the same reference numerals in each figure indicate the same or corresponding parts.
Claims (1)
抵抗層を絶縁層をはさんで複数層にしたことを特徴とす
る半導体装置。A semiconductor device characterized in that a resistor provided on a semiconductor substrate has a plurality of resistance layers with insulating layers sandwiched therebetween.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4000688A JPH01214153A (en) | 1988-02-23 | 1988-02-23 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4000688A JPH01214153A (en) | 1988-02-23 | 1988-02-23 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01214153A true JPH01214153A (en) | 1989-08-28 |
Family
ID=12568825
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4000688A Pending JPH01214153A (en) | 1988-02-23 | 1988-02-23 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01214153A (en) |
-
1988
- 1988-02-23 JP JP4000688A patent/JPH01214153A/en active Pending
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