JPS61279167A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To decrease the number of processes and to make the sizes of an inductor, a resistor and a capacitor compact, by simultaneously forming the inductor, the resistor and the capacitor by a series of processes without forming them independently. CONSTITUTION:On a semi-insulating crystal wafer 11, zigzag shaped V grooves 12-1, 12-2 and 12-3 are formed. A conducting layer 13 is formed on the groove 12-2. Metal films 14-1 and 14-3 are formed on the surface of the grooves 12-1 and 12-3. At the same time, metal films 14-2 are formed on both side surfaces on the conducting layer 13 as electrodes. An inductor L is formed by the metal film 14-1. A resistor R is formed by the conducting layer 13 and the metal film 14-2. A dielectric film 15 and a metal film 16 are sequentially formed on the surface of the metal film 14-3. Thus a capacitort C is formed. Therefore, the number of the processes is decreased, and the sizes of the inductor L, the resistor R and the capacitor C are made compact.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is useful for forming circuit elements such as capacitors, inductors, and resistors on a semi-insulating crystal wafer 1 made of GaAs or the like. The present invention also relates to a method of manufacturing a semiconductor device in which a small inductor and a resistor can be formed at the same time.

[Conventional technology]

Conventionally, when forming circuit elements such as capacitors, inductors, and resistors in this type of semiconductor device, as shown in FIG. 2 to form an inductor L. Next, a conductive layer 3 is formed for different regions on this wafer 1, and a second electrode 4 is formed to form a resistor R. Next, a method is performed in which a third electrode 5 is formed in a different area on the wafer 11, a dielectric film 6 is formed on this electrode 5, and a fourth electrode 7 is further formed to form a capacitor C. Generally, each of these is formed singly.

That is, a method for forming a circuit element having such a structure will be further explained. In region (3) of FIG. 2, the first electrode 2 is formed as an inductor L on the semi-insulating crystal wafer 1 by, for example, a photolithographic technique or a metal film forming technique. Next, as shown in area l of FIG. 2, a conductive layer 3 is formed by a method such as a conductive layer forming technique or a photolithography technique, and then a second electrode 4 is formed by a method such as a photolithography technique or a metal film forming technique.
to form a register. Next, as shown in region I of FIG. 2, the third electrode 5 is formed using a method such as photolithography or metal film formation.

Next, the dielectric film 6 is formed using photolithography or dielectric film forming technology. After that, by forming the fourth electrode 1 using photolithography technology, metal film formation technology, etc.
This forms a capacitor C.

[Problem that the invention seeks to solve]

In this way, in conventional processes, resistors, inductors, and capacitors must be formed individually, which increases the number of steps and increases the chip size to obtain the desired large capacity capacitors, inductors, and resistors. There was a problem.

The present invention has been made to solve these problems, and it is possible to reduce the number of steps for forming circuit elements such as inductors, resistors, and capacitors, and to reduce the size of each circuit element as described in 2. The purpose of the present invention is to provide a method for manufacturing a semiconductor device.

[Means for solving problems]

A method for manufacturing a semiconductor device according to the present invention includes the steps of forming grooves each having a predetermined pattern shape on a semi-insulating crystal wafer corresponding to a region where a plurality of circuit elements are to be formed; By forming a conductive layer in at least one of the grooves, selectively forming a metal film on the conductive layer, and forming a metal film on each of the surfaces of at least two grooves, a step of forming the layer as a resistor and one of the metal films as an inductor, forming another of the metal films as a first electrode, forming a dielectric film on the metal film, and forming a dielectric film on the dielectric film. The method includes a step of forming a capacitor by forming a metal film on the capacitor.

[Effect]

In the present invention, an inductor, a resistor, and a capacitor can be formed simultaneously in a series of steps on a wafer without forming each one individually, and furthermore, the inductor, resistor, and capacitor can be formed by grooves formed corresponding to each of these circuit elements. The electrode length, conductive layer length, and electrode surface area can be increased.

〔Example〕

Embodiments of the present invention will be explained below with reference to the drawings.

FIG. 1 is a process sectional view showing an embodiment of a method for manufacturing a semiconductor device according to the present invention. In the same figure, first, GaA
(100) plane on semi-insulating crystal wafer 11 such as s
011) Zigzag V-shaped grooves 12-1 to 12-8 are respectively formed on the shaft in correspondence with the regions I, u and the cliffs in order to form a plurality of circuit elements using a method such as photo-etching.

Next, a conductive layer is formed in one V-shaped groove 12-s on this wafer 11 by a method such as a conductive layer forming technique or a photolithography technique.
form 3. Next, metal films 14-z and 14-a are formed as first electrodes on the surface of each V-shaped groove 12-1 and 12-8 by a method such as photolithography or metal film forming technology, and at the same time, the conductive film 14-z, 14-a is formed as a first electrode. The entire area M on both end sides on layer 13
14-2 is formed as an electrode. For this, one V
The inductor L is connected to the metal film 14-1 on the shape groove 12-1.
At the same time, a resistor R is formed by the conductive layer 13 and the metal film 14-s in the different V-shaped grooves 12-3.

Next, the metal film 14-8 on the V-shaped groove 12-a is used as a first N pole, and a dielectric film 15 is formed on the surface of the metal film 14-3 using photolithography or dielectric film forming technology. do.

Thereafter, a metal film 16 is formed as a second electrode on this dielectric film 15 using a photolithography technique, a metal film formation technique, or the like. As a result, a capacitor C is formed by the metal [14-s] on one V-shaped groove 12-8, the dielectric film 15, and the metal film 16.

As described above, according to the method of the above embodiment, V-shaped grooves 12-1 to 12-8 are formed on the semi-insulating crystal wafer 11, and a conductive layer is formed in these grooves 12-1 to 12-8. 1
In addition, the first metal films 14-1 to 1 are selectively formed.
By sequentially forming dielectric film 15, second metal layer 4a, and layer 16, circuit elements such as inductor L, resistor R, and capacitor C can be formed simultaneously in a series of steps. As a result, the process of forming inductors and resistors can be omitted, and the number of processes can be reduced. In addition, since the inductor L, resistor R, and capacitor C are formed in the V-shaped grooves 12-1 to 12-3 on the wafer 11, the electric length, conductive layer length, electric oven surface, and dipping It is possible to obtain a small inductor and resistor with the same chip size, and a large capacitance capacitor with a small area. This made it possible to reduce the size of the inductor, resistor and capacitor by about 58% compared to the conventional one shown in FIG.

In the above embodiment, the capacitor is formed in the V-shaped groove, but the same effect can be obtained even if the capacitor is formed in the concave groove.

〔Effect of the invention〕

As described above, according to the present invention, the number of steps can be reduced by forming the inductor, resistor, and capacitor simultaneously in a series of steps instead of forming each inductor, resistor, and capacitor individually. There are effects such as being able to reduce the size of the capacitor.

[Brief explanation of drawings]

FIG. 1 is a process cross-sectional view showing an example of a method for manufacturing a semiconductor device according to the present invention, and FIG. 2 is a process cross-sectional view showing an example of a conventional manufacturing method. 11・Conflict Φ・Semi-insulating crystal wafer, 12-1 to 12-B
...V-shaped groove, 13@...-conductive layer, 14-1~
14-B...Metal film, 15...Dielectric film, 1
6...Metal film.

Claims (1)

[Claims] forming grooves each having a predetermined pattern shape on a semi-insulating crystal wafer corresponding to a region where a plurality of circuit elements are to be formed, and forming a conductive layer in at least one of the grooves on the wafer; Furthermore, by selectively forming a metal film on the conductive layer and forming a metal film on each of the surfaces of at least two of the grooves, the conductive layer can be used as a resistor and one of the metal films can be used as a resistor. a step of forming an inductor, using another of the metal films as a first electrode, forming a dielectric film on the metal film, and forming a capacitor by forming a metal film on the dielectric film. A method for manufacturing a semiconductor device, comprising the steps of: