JPH01214025A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH01214025A JPH01214025A JP3885388A JP3885388A JPH01214025A JP H01214025 A JPH01214025 A JP H01214025A JP 3885388 A JP3885388 A JP 3885388A JP 3885388 A JP3885388 A JP 3885388A JP H01214025 A JPH01214025 A JP H01214025A
- Authority
- JP
- Japan
- Prior art keywords
- resist
- nitride film
- etching
- reactive ion
- less
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 8
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 238000000034 method Methods 0.000 claims abstract description 20
- 150000004767 nitrides Chemical class 0.000 claims abstract description 17
- 238000001020 plasma etching Methods 0.000 claims abstract description 11
- 238000005530 etching Methods 0.000 abstract description 29
- 230000008021 deposition Effects 0.000 abstract description 6
- 238000007334 copolymerization reaction Methods 0.000 abstract description 4
- 230000035939 shock Effects 0.000 abstract 1
- 238000000151 deposition Methods 0.000 description 6
- 238000007796 conventional method Methods 0.000 description 5
- 230000007423 decrease Effects 0.000 description 5
- 230000000694 effects Effects 0.000 description 3
- 229920001577 copolymer Polymers 0.000 description 2
- 238000010849 ion bombardment Methods 0.000 description 2
- 238000000992 sputter etching Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Landscapes
- Drying Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置の製造方法に関し、特にプラズマ窒
化膜をリアクティブイオンエツチング法にてエツチング
を行う方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of etching a plasma nitride film using a reactive ion etching method.
一般に半導体装置の製造工程における各種膜のパターン
形成方法として、パターンを形成する膜の上に所要のパ
ターンに形成したマスクを形成し、;のマスクを利用し
て膜のエツチングを行う方法がとられている。従来、プ
ラズマ窒化膜をこの種の方法でパターン形成する場合に
は、パターニングされたレジストをマスクとして用い、
これをCF、+Hzガス系を用いたりアクティブイオン
エツチング法によりエツチングする方法がとられている
。Generally, as a method for forming patterns of various films in the manufacturing process of semiconductor devices, a method is used in which a mask is formed in the desired pattern on the film to be patterned, and the film is etched using the mask. ing. Conventionally, when patterning a plasma nitride film using this type of method, a patterned resist is used as a mask.
A method of etching this using a CF, +Hz gas system or an active ion etching method is used.
例えば、従来の方法の一例を、第2図(a)乃至(C)
にエツチングの進行状態を模式的かつ時系列順に示す。For example, an example of the conventional method is shown in Figs. 2(a) to (C).
The progress of etching is shown schematically and in chronological order.
即ち、下地基板1上に形成したプラズマ窒化膜2上に所
要パターンのレジスト3を設け、これに対してCF4
+)(、プラズマ4を照射してエツチングを行っている
。That is, a resist 3 having a desired pattern is provided on a plasma nitride film 2 formed on a base substrate 1, and a CF4
+)(, Etching is performed by irradiating plasma 4.
上述した従来の方法では、第2図(b)及び(C)に示
すように、レジスト成分とガス成分の共重合物5をプラ
ズマ窒化膜3上にデボジッションしながらエツチングが
行われ、またH2をCF。In the conventional method described above, etching is performed while depositing a copolymer 5 of a resist component and a gas component onto the plasma nitride film 3, as shown in FIGS. 2(b) and 2(C). C.F.
に添加することによりプラズマ窒化膜のエッチャントで
あるFラジカルを減少させるため、イオン衝撃の少ない
ウェーハ中央部のエッチングレートが低くなり面内均一
性が悪くなるという問題がある。Since F radicals, which are the etchant for the plasma nitride film, are reduced by adding F, there is a problem that the etching rate in the center of the wafer where there is less ion bombardment decreases and the in-plane uniformity deteriorates.
つまり、第4図に示すように、CF4 +)(、という
ガス系を用いているため、Fラジカルの減少及びレジス
ト成分とガス成分との共重合物のデボジッションが起き
、エツチングレートはエツチング時間が長くなると急激
に低下する。また、このエツチングレートの低下はウェ
ーハ中央部において著しいためエツチングレートの面内
均一性も極端に悪くなるという問題がある。In other words, as shown in Fig. 4, since a gas system of CF4 +) is used, a decrease in F radicals and a deposition of a copolymer of the resist component and the gas component occur, and the etching rate is determined by the etching time. As the length increases, the etching rate rapidly decreases.Furthermore, since this decrease in etching rate is significant at the center of the wafer, there is a problem that the in-plane uniformity of the etching rate becomes extremely poor.
本発明はエツチングレートの面内均一性を向上すること
が可能な半導体装置の製造方法を提供することを目的と
している。An object of the present invention is to provide a method for manufacturing a semiconductor device that can improve the in-plane uniformity of etching rate.
本発明の半導体装置の製造方法は、レジストをマスクと
してプラズマ窒化膜をエツチングする際に、10Pa以
下の真空度でCF、に10%以下のN2を添加したガス
系を用いてリアクティブイオンエツチングを行っている
。In the semiconductor device manufacturing method of the present invention, when etching a plasma nitride film using a resist as a mask, reactive ion etching is performed using a gas system containing CF with 10% or less N2 added at a vacuum level of 10 Pa or less. Is going.
上述した方法では、10Pa以下の真空度でCF。 In the method described above, CF is applied at a vacuum degree of 10 Pa or less.
に1θ%以下のN2を添加したガス系を用いることによ
り、プラズマ窒化膜のエッチャントであるFラジカルを
増加させ、かつレジスト成分とガス成分の共重合による
デボジッションを抑制する。By using a gas system to which 1θ% or less of N2 is added, F radicals, which are etchants for the plasma nitride film, are increased, and deposition due to copolymerization of resist components and gas components is suppressed.
次に、本発明を図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第1図(a)及び(b)は本発明によりプラズマ窒化膜
をリアクティブイオンエツチングする場合の縦断面図で
ある。同図(a)のように、下地1の表面にプラズマ窒
化膜2を成長させ、この上に所要パターンに形成したレ
ジストマスク3を形成する。そして、10Pa以下の真
空度でCF aに10%以下のN2を添加したガス系4
を用いてリアクティブイオンエツチングを行っている。FIGS. 1(a) and 1(b) are longitudinal cross-sectional views of a plasma nitride film subjected to reactive ion etching according to the present invention. As shown in FIG. 2A, a plasma nitride film 2 is grown on the surface of a base 1, and a resist mask 3 having a desired pattern is formed thereon. Then, a gas system 4 in which 10% or less N2 was added to CF a at a vacuum degree of 10 Pa or less
Reactive ion etching is performed using
この結果、同図(b)のように、ウェハ面内で均一なエ
ツチングが可能となる。As a result, uniform etching can be performed within the wafer surface, as shown in FIG. 2(b).
即ち、第3図は本発明によりプラズマ窒化膜をリアクテ
ィブイオンエツチングした場合のエツチングレートを示
したものである。10Pa以下の真空度でCF、に10
%以下のN2を添加したガス系を用いているため、Fラ
ジカル′の減少及びレジスト成分とガス成分との共重合
によるデポジションが少なく、その結果イオン衝撃の少
ないウェーハ中央部でもエツチングレイトの低下がなく
、エツチングレイトはエツチング時間に関係なく一定で
あり、かつ面内均一性も良好である。That is, FIG. 3 shows the etching rate when a plasma nitride film is subjected to reactive ion etching according to the present invention. CF at a vacuum level of 10 Pa or less, to 10
% or less of N2 is used, there is less F radical' and less deposition due to copolymerization of the resist component and gas component.As a result, the etching rate is reduced even in the center of the wafer where there is less ion bombardment. The etching rate is constant regardless of the etching time, and the in-plane uniformity is good.
ここで、10Pa以上の真空度でエツチングを行った場
合には異方性を保つことが難しくなりサイドエッチが入
りやすくなる。また、10%以上のN2を添加した場合
にはエツチングレートが低下してしまうため注意が必要
である。Here, if etching is performed at a vacuum degree of 10 Pa or more, it becomes difficult to maintain anisotropy and side etching is likely to occur. Furthermore, if N2 is added in an amount of 10% or more, the etching rate will decrease, so care must be taken.
(発明の効果〕
以上説明したように本発明は、10Pa以下の真空度で
CF、に10%以下のN2を添加したガス系を用いて、
レジストをマスクに用いたプラズマ窒化膜のりアクティ
ブイオンエツチングを行うので、プラズマ窒化膜のエッ
チャントであるFラジカルを増加させ、さらにレジスト
成分とガス成分との共重合によるデボジッションを押さ
えるため、エツチング時間によらず一定のエツチングレ
イトを保ち、しかも面内均一性を従来の方法に比較して
20倍近くも向上させることができる効果がある。(Effects of the Invention) As explained above, the present invention uses a gas system in which 10% or less N2 is added to CF at a vacuum degree of 10 Pa or less.
Since active ion etching is performed on the plasma nitride film using a resist as a mask, F radicals, which are the etchant of the plasma nitride film, are increased, and deposition due to copolymerization of resist components and gas components is suppressed, so etching time is This method has the effect of maintaining a constant etching rate and improving in-plane uniformity by nearly 20 times compared to conventional methods.
第1図(a)及び(b)は本発明方法を説明するための
工程断面図、第2図(a)乃至(C)は従来方法を工程
順に示す断面図、第3図は本発明方法におけるエツチン
グ時間に対するエツチングレートを示す図、第4図は従
来の方法におけるエツチング時間に対するエツチングレ
ートを示す図である。
1・・・下地、2・・・プラズマ窒化膜、3・・・レジ
ストマスク、4・・−CF、+H,プラズマ、5・・・
デポジション。
第1図
第2図
+ 11 ! i j’″jjJI1FIGS. 1(a) and (b) are process cross-sectional views for explaining the method of the present invention, FIGS. 2(a) to (C) are cross-sectional views showing the conventional method in order of process, and FIG. 3 is a process cross-sectional view for explaining the method of the present invention. FIG. 4 is a diagram showing the etching rate versus etching time in the conventional method. DESCRIPTION OF SYMBOLS 1... Base, 2... Plasma nitride film, 3... Resist mask, 4... -CF, +H, plasma, 5...
Deposition. Figure 1 Figure 2 + 11! i j'″jjJI1
Claims (1)
ィブイオンエッチングする工程を含む半導体装置の製造
方法において、10Pa以下の真空度でCF_4に10
%以下のN_2を添加したガス系を用いてリアクティブ
イオンエッチングを行うことを特徴とする半導体装置の
製造方法。1. In a semiconductor device manufacturing method that includes a step of reactive ion etching of a plasma nitride film using a resist as a mask, CF_4 is etched with a vacuum of 10 Pa or less.
1. A method for manufacturing a semiconductor device, characterized in that reactive ion etching is performed using a gas system to which N_2 is added in an amount of % or less.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3885388A JPH01214025A (en) | 1988-02-22 | 1988-02-22 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3885388A JPH01214025A (en) | 1988-02-22 | 1988-02-22 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01214025A true JPH01214025A (en) | 1989-08-28 |
Family
ID=12536760
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3885388A Pending JPH01214025A (en) | 1988-02-22 | 1988-02-22 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01214025A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1999010923A1 (en) * | 1997-08-28 | 1999-03-04 | Lam Research Corporation | Method for selective plasma etch |
US6143125A (en) * | 1996-09-20 | 2000-11-07 | Nec Corporation | Apparatus and method for dry etching |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56111222A (en) * | 1980-01-31 | 1981-09-02 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Dry etching method on silicon nitride film |
JPS58101428A (en) * | 1981-12-12 | 1983-06-16 | Toshiba Corp | Method of etching silicon nitride film |
JPS62194623A (en) * | 1986-02-06 | 1987-08-27 | Oki Electric Ind Co Ltd | Plasma etching method |
-
1988
- 1988-02-22 JP JP3885388A patent/JPH01214025A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56111222A (en) * | 1980-01-31 | 1981-09-02 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Dry etching method on silicon nitride film |
JPS58101428A (en) * | 1981-12-12 | 1983-06-16 | Toshiba Corp | Method of etching silicon nitride film |
JPS62194623A (en) * | 1986-02-06 | 1987-08-27 | Oki Electric Ind Co Ltd | Plasma etching method |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6143125A (en) * | 1996-09-20 | 2000-11-07 | Nec Corporation | Apparatus and method for dry etching |
WO1999010923A1 (en) * | 1997-08-28 | 1999-03-04 | Lam Research Corporation | Method for selective plasma etch |
US6090304A (en) * | 1997-08-28 | 2000-07-18 | Lam Research Corporation | Methods for selective plasma etch |
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