JPH01214019A - Apparatus for manufacturing semiconductor device - Google Patents

Apparatus for manufacturing semiconductor device

Info

Publication number
JPH01214019A
JPH01214019A JP3984088A JP3984088A JPH01214019A JP H01214019 A JPH01214019 A JP H01214019A JP 3984088 A JP3984088 A JP 3984088A JP 3984088 A JP3984088 A JP 3984088A JP H01214019 A JPH01214019 A JP H01214019A
Authority
JP
Japan
Prior art keywords
semiconductor substrate
current
ion implantation
change
charge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3984088A
Other languages
Japanese (ja)
Inventor
Hiroki Tsuruta
鶴田 浩己
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP3984088A priority Critical patent/JPH01214019A/en
Publication of JPH01214019A publication Critical patent/JPH01214019A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain a uniform impurity concentration over the whole of the main face of a semiconductor substrate by installing the following: a means to measure the amount of an electric charge to be electrified on the semiconductor substrate when ions are implanted; a means to suppress electrification on the semiconductor substrate by feeding back a change in the measured amount of the electric charge to an ion implantation apparatus. CONSTITUTION:The following are installed: a means 50 to measure the amount of an electric charge to be electrified on a semiconductor substrate 10 when ions are implanted by using an ion implantation apparatus; a means to suppress electrification on the semiconductor substrate 10 by feeding back a change in the measured amount of the electric charge to the ion implantation apparatus. For example, when the semiconductor substrate 10 is irradiated with a beam current 30, a positive charge passes through a clamper 60 and an end station 20 and is absorbed by a ground; its current is usually constant. When the semiconductor substrate 10 is electrified by the positive charge, its electric current is reduced; a change in a value of the electric current flowing between the clamper 60 and the end station 20 is measured by using a small- current measuring instrument 50; the change is fed back to a beam-current generator 40; the beam current 30 is adjusted in order to suppress electrification by the positive charge.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置の製造装置に係り、特にイオン注入
装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device manufacturing apparatus, and particularly to an ion implantation apparatus.

〔従来の技術〕[Conventional technology]

半導体装置の高集積化が進むにともないパターンの一周
の微細化が進むにつれて、また不純物ドーピングの高精
度化、浅いPN接合の要求から、不純物のドーピングは
全んどイオン注入によっている。
As the degree of integration of semiconductor devices progresses, the circumference of the pattern becomes finer, and as a result of demands for higher accuracy in impurity doping and shallow PN junctions, impurity doping is almost entirely done by ion implantation.

従来、MOSトランジスタの拡散層を形成する際、高電
流イオン注入装置を用いて、6mA乃至8mA程度のイ
オンビーム電流で、75As、31P+。
Conventionally, when forming a diffusion layer of a MOS transistor, a high current ion implantation device was used to implant 75As and 31P+ at an ion beam current of about 6 mA to 8 mA.

11B+などの不純物源、を打ち込んでいるが、第3図
に示すように、イオン柱入の際にディスク上の半導体基
板10の中央部に正電荷の帯電が起こり、帯電電荷領域
80を生じ、このためイオンビームが曲げられ、曲けら
れたビーム電流30となり、半導体基板10中央部の不
純物が半導体基板10の外周より減少し”Cいた。
An impurity source such as 11B+ is implanted, but as shown in FIG. 3, positive charges occur in the center of the semiconductor substrate 10 on the disk during ion implantation, creating a charged region 80. As a result, the ion beam is bent, resulting in a bent beam current 30, and the impurities at the center of the semiconductor substrate 10 are reduced from those at the outer periphery of the semiconductor substrate 10.

尚、半導体基板10は、エンドステージフン20上に、
クランパ60で固定されている。
Note that the semiconductor substrate 10 is placed on the end stage fan 20,
It is fixed with a clamper 60.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

前述した従来のイオン注入装置では、半導体基板10の
中央部で帯電が起こり、主面全体に均一な不純物濃度が
得られないという欠点があった。
The conventional ion implantation apparatus described above has the disadvantage that charging occurs in the center of the semiconductor substrate 10, making it impossible to obtain a uniform impurity concentration over the entire main surface.

本発明の目的は、前記欠点が解決され、半導体基板の主
面全体に均一な不純物濃度が得られるようにした半導体
装置の製造装置を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide an apparatus for manufacturing a semiconductor device that solves the above-mentioned drawbacks and can provide a uniform impurity concentration over the entire main surface of a semiconductor substrate.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の半導体装置の製造装置の構成は、イオン注入装
置にてイオンを注入した時に半導体基板上に帯電する電
荷量を測定する手段と、前記測定した電荷量の変化を前
記イオン注入装置に帰還することによって前記半導体基
板上の帯電を抑制する手段とを備えたことを特徴とする
The structure of the semiconductor device manufacturing apparatus of the present invention includes a means for measuring the amount of charge that is charged on a semiconductor substrate when ions are implanted in an ion implantation device, and a change in the measured amount of charge is fed back to the ion implantation device. The semiconductor substrate is characterized by comprising means for suppressing charging on the semiconductor substrate by doing so.

〔実施例〕〔Example〕

第1図は本発明の第1の実施例の半導体装置の製造装置
を示す概説図である。同図において、半導体基板10は
、エンドステーション20に取り付けられており、クラ
ンパ60で固定されている。
FIG. 1 is a schematic diagram showing a semiconductor device manufacturing apparatus according to a first embodiment of the present invention. In the figure, a semiconductor substrate 10 is attached to an end station 20 and fixed with a clamper 60.

本製造装置は、ビーム電流30が半導体基板10上に照
射されると、正電荷はクランパ60とエンドステーショ
ン20とを通り、グランドに吸収される。並通この電流
は一定である。
In this manufacturing apparatus, when the semiconductor substrate 10 is irradiated with the beam current 30, the positive charges pass through the clamper 60 and the end station 20 and are absorbed into the ground. This current is constant.

半導体基板10上に正電荷が帯電すると、この電流が減
少するため、微小電流測定機50で、クランパ60、エ
ンドステーション20 間ヲ(It、 t’L ルミ流
値の変化を測定し、その変化量をビーム電流発生装置4
0に帰還することによって、ビーム電流30を調整し、
正電荷の帯電を押えることができる。
When a positive charge is applied to the semiconductor substrate 10, this current decreases. Therefore, the minute current measuring device 50 measures the change in the luminous current value between the clamper 60 and the end station 20, and calculates the change. amount of beam current generator 4
Adjust the beam current 30 by returning to 0,
Can suppress positive charge.

第2図は本発明の第2の実施例の半導体装置の製造装置
を示す概説図である。同図において、2個の半導体基板
10.11は、エンドステーション20に取り付けられ
、回転している。本製造装置は、ビーム電流30によっ
て半導体基板10が帯電されると、チャージアップセン
サ70によって、半導体基板11の誘起電圧を測定し、
ビーム電流30に帰還することができる。
FIG. 2 is a schematic diagram showing a semiconductor device manufacturing apparatus according to a second embodiment of the present invention. In the figure, two semiconductor substrates 10, 11 are mounted on an end station 20 and are rotating. In this manufacturing apparatus, when the semiconductor substrate 10 is charged by the beam current 30, the induced voltage of the semiconductor substrate 11 is measured by the charge-up sensor 70,
It can be fed back to the beam current 30.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明は、半導体基板上の帯電量
を測定し、ビーム電流発生装置に帰還することにより、
ビーム電流を調整し、半導体基板上の帯電を抑制して、
半導体基板の全有効主面均一な不純物ドーピングができ
る効果がある。
As explained above, the present invention measures the amount of charge on a semiconductor substrate and returns it to the beam current generator.
By adjusting the beam current and suppressing the charging on the semiconductor substrate,
This has the effect of uniformly doping impurities over the entire effective main surface of the semiconductor substrate.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の第1の実施例の半導体装置の製造装置
を示す概説図、第2図は本発明の第2の実施例の半導体
装置の製造装置を示す概説図、第3図は従来の製造装置
を示す概説図である。 10.11・・・・・・半導体基板、20・・・・・・
エンドステーション、30・・・・・・ビーム電流、4
0・・・・・・ビーム電流発生装置、50・・・・・・
微小電流測定機、60・・・・・・クランパ、70・・
・・・・チャージアップセンサ、80・・・・・・帯電
電荷。 代理人 弁理士   内 原   晋
FIG. 1 is a schematic diagram showing a semiconductor device manufacturing apparatus according to a first embodiment of the present invention, FIG. 2 is a schematic diagram showing a semiconductor device manufacturing apparatus according to a second embodiment of the present invention, and FIG. FIG. 1 is a schematic diagram showing a conventional manufacturing device. 10.11... Semiconductor substrate, 20...
End station, 30...Beam current, 4
0... Beam current generator, 50...
Microcurrent measuring device, 60... Clamper, 70...
...Charge-up sensor, 80...Charged charge. Agent Patent Attorney Susumu Uchihara

Claims (1)

【特許請求の範囲】[Claims]  イオン注入装置にてイオンを注入した時に半導体基板
上に帯電する電荷量を測定する手段と、前記測定した電
荷量の変化を前記イオン注入装置に帰還することによっ
て前記半導体基板上の帯電を抑制する手段とを備えたこ
とを特徴とする半導体装置の製造装置。
Means for measuring the amount of charge charged on a semiconductor substrate when ions are implanted in an ion implantation device, and suppressing charging on the semiconductor substrate by feeding back changes in the measured amount of charge to the ion implantation device. 1. A semiconductor device manufacturing apparatus comprising: means.
JP3984088A 1988-02-22 1988-02-22 Apparatus for manufacturing semiconductor device Pending JPH01214019A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3984088A JPH01214019A (en) 1988-02-22 1988-02-22 Apparatus for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3984088A JPH01214019A (en) 1988-02-22 1988-02-22 Apparatus for manufacturing semiconductor device

Publications (1)

Publication Number Publication Date
JPH01214019A true JPH01214019A (en) 1989-08-28

Family

ID=12564160

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3984088A Pending JPH01214019A (en) 1988-02-22 1988-02-22 Apparatus for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JPH01214019A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100528458B1 (en) * 1999-02-22 2005-11-15 삼성전자주식회사 Beam current sensing tool for an ion implanter

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100528458B1 (en) * 1999-02-22 2005-11-15 삼성전자주식회사 Beam current sensing tool for an ion implanter

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