JPH01205687A - Muting circuit - Google Patents

Abstract

PURPOSE:To make a transient response at the time of muting faster by switching mute voltage after clapping an input video signal without passing the signal through a time constant circuit by a capacitor. CONSTITUTION:Under a state in which a mute signal does not exist, the input video signal is added to a variable d.c. potential shifting circuit 2 and added through an output circuit 3 to one input of a switching circuit 10, and the output of the switching circuit 10 is outputted to an output edge 12. Further, the output of the output circuit 3 is compared with the d.c. voltage of a reference voltage source 9, and the output of a comparator 8 is connected to a sample-and-hold circuit 7. Thereafter, compared voltage is sampled at a capacitor 4 an a synchronizing signal period by a synchronizing signal added to a synchronizing signal input edge 6, the holding of the voltage is executed in the other periods, the variable d.c. potential shifting circuit 2 is controlled by the held voltage, and the synchronization head of a video signal to be outputted is clamped so that its voltage can be the same as the d.c. voltage of the reference voltage source 9. On the other hand, when the mute signal is inputted to a mute signal input edge 11, the input of the switching circuit 10 is switched to a reference voltage source 9 side.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a muting circuit for erasing a video signal for a predetermined period of time, and particularly to a muting circuit for video signals that involves a clamp operation.

[Conventional technology]

When recording and reproducing video signals on a VTR, the monitor screen is disturbed when switching between recording and reproduction, so it is necessary to mute the output using a mute circuit. Furthermore, during a search, vertical synchronization in the video signal is lost, so it is necessary to artificially insert a vertical synchronization signal using a mute circuit during the vertical synchronization period.

An example of a conventional muting circuit is shown in FIG.

When there is no mute signal, the input video signal input to the input terminal 1 is applied to one input of the switching circuit 15, passes through the variable DC potential shift circuit 2 and the output circuit 3, and is output to the output terminal 12. The output of the output circuit 3 is compared with a reference voltage from a reference voltage source 9 by a comparator 8, and is connected to a sample-and-hold circuit 7. The comparison voltage is sampled in the capacitor 4 during the synchronization signal period by the signal, held for another period, and the variable DC potential shift circuit 2 is controlled by this hold voltage, thereby clamping the synchronization tip of the output video signal. .

On the other hand, when the mute signal is applied to the mute signal input terminal 11, the input of the switching circuit 15 is switched to the DC voltage source 13 side, and the potential from the DC voltage source 13 is applied to the variable DC shift circuit 2 and the output circuit 3. and is output to the output terminal 12.

At the time of muting, the sample-and-hold circuit 7 is operated by the mute signal by the OR gate circuit 14 regardless of the presence or absence of the synchronization signal, so during the muting period, the DC voltage at the same potential as the DC voltage of the reference voltage source 9 is applied to the output terminal. 12 is output.

[Problem to be solved by the invention]

In the conventional muting circuit described above, during the transient period of switching from the normal recording/reproduction state to the mute state, the output terminal
There is a drawback that the potential of 2 becomes unstable.

This occurs because the sample-and-hold circuit 7 cannot respond quickly due to the time constant (1=cv) of the capacitor 4 when the mute state is entered.

As mentioned above, if the potential of the output terminal 12 becomes unstable during muting, synchronization may not be achieved and the monitor screen may become distorted.

[Means to solve the problem]

The muting circuit of the present invention includes a DC potential shift circuit connected to an input terminal into which a video signal is input, an output circuit that receives the output of the DC shift circuit, and a DC potential shift circuit that receives the output signal of the output circuit and a reference voltage source. a switching circuit that switches the voltage and voltage by a mute signal applied to a mute signal terminal; an output terminal that takes out an output from the switching circuit; a comparator that compares the output of the output circuit with the current and voltage of a reference voltage source; and a synchronization signal. Sample the output of the comparator in one period, hold it in another period,
and a sample-and-hold circuit that feeds back to the DC potential shift circuit.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention.

When there is no mute signal, the video signal input to the input terminal 1 is applied to the variable DC potential shift circuit 2,
It is applied to one input of the switching circuit 10 via the output circuit 3, and the output of the switching circuit 10 is outputted to the output terminal 12. Further, the output of the output circuit 3 is compared with the DC voltage of a reference voltage source 9 by a comparator 8, and the output of the comparator 8 is connected to a sample-and-hold circuit 7. By sampling the comparison voltage on the capacitor 4 during the synchronization signal period and holding it during other periods, and controlling the variable DC potential shift circuit 2 with this hold voltage, the synchronization tip of the output video signal is set to the reference voltage source 9.
Clamp the voltage so that it is the same as the DC voltage.

On the other hand, when the mute signal is input to the mute signal input terminal 11, the input of the switching circuit 100 is switched to the reference voltage source 9 side, and the DC potential from the DC voltage source 9 is outputted to the output terminal 12.

FIG. 3 is a specific circuit diagram of FIG. 1. The relationship between the blocks in Figure 1 and the blocks in Figure 3 is as follows:
The operation is the same as described above. In the blocks of FIGS. 1 and 3, the variable DC shift circuits 2 and 68, the output circuits 3 and 69, the sample-and-hold circuits 7 and 71, the switching circuits 10 and 70, and the comparator 8 and 72 correspond to the reference voltage sources 9 and 73.

〔Effect of the invention〕

As described above, according to the present invention, during muting, the input video signal is clamped without passing through a time constant circuit using a capacitor, and then switched to the muting voltage, so that the transient response during muting can be made faster.

Furthermore, since the same reference voltage source is used for the reference voltage of the clamp potential of the video signal and the mute voltage, it is possible to reduce variations in the clamp potential and the mute voltage.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram of a conventional muting circuit, and FIG. 3 is a specific circuit diagram of FIG. 1... Input end, 2, 68... Variable DC potential shift circuit, 3, 69... Output circuit, 4.
...Capacitor, 5,10. '15.70...
...Switching circuit, 6...Synchronization signal input terminal, 7.
71...Sample and hold circuit, 8,7
2...Comparator, 9,73...Reference voltage source, 11...Mute signal input terminal, 12...
...Output end, 13...DC voltage source, 14...
...OR gate circuit, 16, 20, 21, 23,
25, 27, 28, 32° 46.50, 51, 52.6
5,74,75,77.79,86°87...
Resistance, 17, 19, 22, 24, 26, 29, 30°3
3.34, 35, 36, 37, 38, 40, 42, 47
,48. 49.54, 57, 58, 59, 60, 61, 62, 6
3,76°78.81,82.85...transistor, 15,18°31.39,43,44,55,
56, 64, 80, 83, 84...constant current source,
41.53... Constant voltage source, 45... Capacitor, 66... High potential end, 67...
・Low potential end. Agent Patent Attorney Otoharu Uchihara Figure 1 MZ diagram

Claims (1)

[Claims] A DC potential shift circuit to which a video signal is supplied, an output circuit that receives the output of the DC shift circuit, and an output signal of the output circuit and a DC voltage of a reference voltage source are switched by a mute signal applied to a mute signal terminal. a switching circuit; an output terminal for taking out an output from the switching circuit; a comparator for comparing the output of the output circuit with a DC voltage of the reference voltage source; A muting circuit comprising a sample and hold circuit that holds the DC potential during a period and feeds it back to the DC potential shift circuit.