JPH01200656A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH01200656A JPH01200656A JP63025270A JP2527088A JPH01200656A JP H01200656 A JPH01200656 A JP H01200656A JP 63025270 A JP63025270 A JP 63025270A JP 2527088 A JP2527088 A JP 2527088A JP H01200656 A JPH01200656 A JP H01200656A
- Authority
- JP
- Japan
- Prior art keywords
- film
- metal
- polyimide resin
- protrusion electrode
- gold
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 9
- 239000004065 semiconductor Substances 0.000 title claims description 20
- 229910052751 metal Inorganic materials 0.000 claims abstract description 39
- 239000002184 metal Substances 0.000 claims abstract description 39
- 238000007747 plating Methods 0.000 claims abstract description 24
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 22
- 229920001721 polyimide Polymers 0.000 claims abstract description 20
- 239000009719 polyimide resin Substances 0.000 claims abstract description 20
- 238000000034 method Methods 0.000 claims abstract description 17
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 12
- 239000000758 substrate Substances 0.000 claims abstract description 11
- 230000004888 barrier function Effects 0.000 claims description 8
- 238000005530 etching Methods 0.000 claims description 8
- 238000000059 patterning Methods 0.000 claims description 4
- 238000000151 deposition Methods 0.000 claims description 2
- 238000000206 photolithography Methods 0.000 claims description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 abstract description 16
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 abstract description 12
- 239000010931 gold Substances 0.000 abstract description 12
- 229910052737 gold Inorganic materials 0.000 abstract description 12
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 abstract description 8
- 229910052697 platinum Inorganic materials 0.000 abstract description 8
- 229910052719 titanium Inorganic materials 0.000 abstract description 8
- 239000010936 titanium Substances 0.000 abstract description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 6
- 230000001681 protective effect Effects 0.000 abstract description 6
- 229910052710 silicon Inorganic materials 0.000 abstract description 6
- 239000010703 silicon Substances 0.000 abstract description 6
- 238000004528 spin coating Methods 0.000 abstract description 2
- UUWCBFKLGFQDME-UHFFFAOYSA-N platinum titanium Chemical compound [Ti].[Pt] UUWCBFKLGFQDME-UHFFFAOYSA-N 0.000 abstract 3
- 239000007788 liquid Substances 0.000 abstract 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 6
- 235000012239 silicon dioxide Nutrition 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000002344 surface layer Substances 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical group [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
Landscapes
- Electrodes Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置の製造方法に関し、特に金属突起電
極を有する半導体装置の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of manufacturing a semiconductor device having metal protruding electrodes.
従来、この種の半導体装置の金属突起電極の形成方法は
、下地配線形成終了後、めっきを行なう際の電流路を形
成するために金属膜を半導体基板表面全体に被着してめ
っき用配線等を形成し、その後レジスト膜を使用したり
フトオフ法により、金属膜上の金属突起電極形成領域内
にのみめっき成長部となるバリア膜を形成し、その後再
度パターニングを行ったフォトレジスト膜をマスクとし
てめっきを行ない、バリア膜上にのみ金属突起電極を形
成し、レジスト膜を剥離した後不要となっためっき用配
線・を金属突起電極をマスクとして全面除去し、その後
最終保護膜としてポリイミド樹脂膜を半導体基板表面全
体に塗布し、フォトレジスト膜パターンをマスクとして
、金属突起電極上のボンディング領域部のみのポリイミ
ド樹脂膜をエツチング法にて除去するというものであっ
た。Conventionally, the method for forming metal protruding electrodes for this type of semiconductor device is to coat the entire surface of the semiconductor substrate with a metal film to form a current path during plating after the formation of the base wiring, and to form the plating wiring, etc. Then, by using a resist film or using a foot-off method, a barrier film that will become a plating growth area is formed only in the metal protrusion electrode formation area on the metal film, and then patterned again using the photoresist film as a mask. Plating is performed to form metal protruding electrodes only on the barrier film, and after peeling off the resist film, unnecessary plating wiring is completely removed using the metal protruding electrodes as a mask, and then a polyimide resin film is applied as the final protective film. The method involved coating the entire surface of a semiconductor substrate, and using a photoresist film pattern as a mask, the polyimide resin film only in the bonding region on the metal protrusion electrode was removed by etching.
上述した従来の金属突起電極を有する半導体装置の製造
方法は、リフトオフ工程、めっき工程及び最終保護膜の
エツチング工程と、多数回のフォトレジストの塗布・パ
ターニング工程があるため、多大な製造工数・工期を要
する欠点を有していた。また、金属突起電極形成後に最
終保護膜としてポリイミド樹脂を塗布し、キャリアテー
プに圧着する際の接触部をエツチング法により金属突起
電極上に開孔するため、めっきによりポーラス状に成長
した金属突起電極の表層部にエツチング残渣が付着し、
キャリアテープと半導体装置の密着強度を著しく低下さ
せる要因ともなる欠点があった。The conventional manufacturing method of a semiconductor device having metal protruding electrodes described above involves a lift-off process, a plating process, a final protective film etching process, and multiple photoresist coating/patterning processes, which requires a large amount of manufacturing man-hours and time. It had the disadvantage of requiring In addition, polyimide resin is applied as a final protective film after the metal protrusion electrode is formed, and holes are formed on the metal protrusion electrode using an etching method at the contact area when the metal protrusion electrode is crimped onto the carrier tape. Etching residue adheres to the surface layer of the
There was also a drawback that it caused a significant decrease in the adhesion strength between the carrier tape and the semiconductor device.
本発明の半導体装置の製造方法は、半導体基板上に絶縁
膜を介して第1金属膜を形成しパターニングして金属突
起電極形成領域と該領域間を接続するめっき用配線を形
成する工程と、全面にポリイミド樹脂膜を形成したのち
フォトレジスト膜をマスクとし前記金属突起電極形成領
域上の該ポリイミド樹脂膜をエツチングし除去する工程
と、前記フォトレジスト膜を含む全面に第2金属膜を被
着したのちフォトレジスト膜を除去し前記金属突起電極
形成領域にのみ第2金属膜からなるバリア膜を形成する
工程と、前記ポリイミド樹脂膜をマスクとして金属をめ
っきし前記バリア膜上に金属突起電極を形成する工程と
を含んで構成される。The method for manufacturing a semiconductor device of the present invention includes the steps of forming a first metal film on a semiconductor substrate via an insulating film and patterning it to form a metal protrusion electrode formation region and a plating wiring connecting the regions; After forming a polyimide resin film on the entire surface, using a photoresist film as a mask, etching and removing the polyimide resin film on the metal protrusion electrode formation region, and depositing a second metal film on the entire surface including the photoresist film. After that, a step of removing the photoresist film and forming a barrier film made of a second metal film only in the region where the metal protrusion electrode is to be formed, and plating a metal using the polyimide resin film as a mask and forming a metal protrusion electrode on the barrier film. The structure includes a step of forming.
次に、本発明の実施例について図面を参照して説明する
。Next, embodiments of the present invention will be described with reference to the drawings.
第1図(a)〜(h)は本発明の一実施例を説明するた
めの工程順に示した半導体チップの断面図であり、特に
本発明をテープキャリア式半導体装置の金属突起電極形
成に適用した場合である。FIGS. 1(a) to 1(h) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining one embodiment of the present invention, and in particular, the present invention is applied to the formation of metal protruding electrodes of a tape carrier type semiconductor device. This is the case.
まず第1図(a)に示すように、素子が形成された半導
体基板1上に二酸化シリコン膜2を形成したのち、フォ
トリングラフィによりダイシング領域3上の二酸化シリ
コン膜2を除去する。First, as shown in FIG. 1(a), a silicon dioxide film 2 is formed on a semiconductor substrate 1 on which elements are formed, and then the silicon dioxide film 2 on a dicing region 3 is removed by photolithography.
次に第1図(b)及び第2図に示すように、スパッタ法
により全面に第1金属膜としてのアルミニウム[4を形
成しなのちその上にフォトレジスト膜5を形成する。次
でこのフォトレジスト膜5をパターニングしたのち、こ
のパターニングされたフォトレジスト膜5をマスクとし
てアルミニウム膜4をエツチングし、金突起電極形成領
域4Aとこれらの領域を接続するめっき用配線4Bを形
成する。このめっき用配線4Bにより金突起電極形成領
域4Aは、ダイシング領域3を通してシリコン基板1に
電気的に接続される。Next, as shown in FIGS. 1(b) and 2, aluminum [4] is formed as a first metal film on the entire surface by sputtering, and then a photoresist film 5 is formed thereon. Next, after patterning the photoresist film 5, the aluminum film 4 is etched using the patterned photoresist film 5 as a mask to form the gold protrusion electrode forming region 4A and the plating wiring 4B connecting these regions. . The plating wiring 4B electrically connects the gold protrusion electrode forming region 4A to the silicon substrate 1 through the dicing region 3.
次に第1図(c)及び第2図に示すように、フォトレジ
ストM5を除去したのち全面にポリイミド樹脂膜6を回
転塗布法により形成する。次でパターニングされたフォ
トレジスト膜5Aを用いて全突起電極形成領域4A上の
ポリイミド樹脂膜6を除去する。Next, as shown in FIGS. 1(c) and 2, after removing the photoresist M5, a polyimide resin film 6 is formed on the entire surface by spin coating. Next, the polyimide resin film 6 on all the protruding electrode forming regions 4A is removed using the patterned photoresist film 5A.
次に第1図(d)に示すように、フォトレジスト膜5A
を含む全面にチタン及び白金を連続的に被着し、チタン
・白金膜8を形成する。Next, as shown in FIG. 1(d), the photoresist film 5A is
Titanium and platinum are continuously deposited on the entire surface including the titanium and platinum to form a titanium/platinum film 8.
次に第1図(e)及び第2図に示すように、リフトオフ
法によりフォトレジスト膜5A及びその上に形成された
チタン・白金膜8を除去する。この工程によりバリア膜
としてのチタン・白金膜8は金属起電極形成後領域にの
み形成される。Next, as shown in FIGS. 1(e) and 2, the photoresist film 5A and the titanium/platinum film 8 formed thereon are removed by a lift-off method. Through this step, the titanium/platinum film 8 as a barrier film is formed only in the region after the metal electromotive electrode is formed.
次に第1図(f)に示すように、シリコン基板1の表面
のみを金めつき液に浸し金めつきを行ない、チタン・白
金H8上に全突起電極9を形成する。Next, as shown in FIG. 1(f), only the surface of the silicon substrate 1 is immersed in a gold plating solution to perform gold plating, thereby forming all protruding electrodes 9 on the titanium/platinum H8.
次に第1図(g)に示すように、全面にフォトレジスト
膜5Bを形成したのちパターニングし、ダイシング領域
3上のみを開孔し、ポリイミド樹脂膜6をエツチング除
去する。Next, as shown in FIG. 1(g), a photoresist film 5B is formed on the entire surface and then patterned to form holes only on the dicing area 3, and the polyimide resin film 6 is removed by etching.
続いて第1図(h)に示すように、ダイシング領域3上
のめっき用配線4Bをエツチングにより除去して全突起
電極9とシリコン基板1とを電気的に絶縁する。次でフ
ォトレジスト膜5Bを除去し半導体装置を完成させる。Subsequently, as shown in FIG. 1(h), the plating wiring 4B on the dicing area 3 is removed by etching to electrically insulate all the protruding electrodes 9 and the silicon substrate 1. Next, the photoresist film 5B is removed to complete the semiconductor device.
このように本実施例によれば、全突起電極9を形成する
前に最終保護膜であるポリイミド樹脂膜6を形成し、リ
フトオフ時の間隙膜及び金めつき時のマスクとして使用
するので、製造時間を大幅に短縮できる。更に従来のよ
うに、ポーラスな表面を有する金突起電極9上にポリイ
ミド樹脂膜を形成することがないので、キャリアテープ
と半導体装置の密着強度も低下することはなくなる。As described above, according to this embodiment, the polyimide resin film 6 as the final protective film is formed before forming the all-projecting electrodes 9, and is used as a gap film during lift-off and as a mask during gold plating. It can save you a lot of time. Further, unlike the conventional method, since a polyimide resin film is not formed on the gold protrusion electrode 9 having a porous surface, the adhesion strength between the carrier tape and the semiconductor device does not deteriorate.
尚、上記実施例においては、金属突起電極を形成するた
めに金めつきを行う場合について説明したが銅めっきを
用いることもできる。この場合はバリア膜とてクロム・
銅膜を用いる必要がある。In the above embodiments, the case where gold plating is used to form the metal protrusion electrodes has been described, but copper plating can also be used. In this case, the barrier film is chromium.
It is necessary to use a copper film.
更に第1図(d)でダイシング領域3上のアルミニウム
からなるめっき用配線4Bを除去したが、この部分のア
ルミニウムを陽極酸化して酸化アルミニウム、とし、シ
リコン基板1と全突起電極9とを絶縁分離してもよい。Furthermore, in FIG. 1(d), the plating wiring 4B made of aluminum on the dicing area 3 was removed, and the aluminum in this area was anodized to form aluminum oxide, thereby insulating the silicon substrate 1 and all the protruding electrodes 9. May be separated.
この場合、ダイシング領域3におけるアルミニウム膜の
露出がなくなるなめ、耐湿性が向上する。In this case, the aluminum film is no longer exposed in the dicing region 3, and moisture resistance is improved.
以上説明したように、本発明は金属突起電極形成前の工
程で最終保護膜であるポリイミド樹脂膜を形成し、第2
金属欣のリフトオフ時の間隙膜及び金属めっき時のマス
クとして使用するとにより、製造工数・工期を大幅に短
縮できる効果がある。さらに、従来のように金属突起電
極のポーラス状の表層部にポリイミド樹脂膜の残渣が発
生することもなくなるため、キャリアテープと半導体装
置の密着強度を確保することができる。As explained above, the present invention forms a polyimide resin film as a final protective film in a process before forming metal protruding electrodes, and
By using it as a gap film during lift-off of metal rods and as a mask during metal plating, it has the effect of significantly shortening manufacturing man-hours and time. Furthermore, since no residue of the polyimide resin film is generated on the porous surface layer of the metal protrusion electrode as in the prior art, the adhesion strength between the carrier tape and the semiconductor device can be ensured.
第1図(a)〜(h)は本発明の一実施例を説明するた
めの工程順に示した半導体チップの断面図、第2図は第
1図(e)で説明した工程における半導体チップの平面
図である。
1・・・シリコン基板、2・・・二酸化シリコン膜、3
・・・ダイシング領域、4・・・アルミニウム膜、4A
・・・全突起電極形成領域、4B・・・めっき用配線、
5A、5B・・・フォトレジスト膜、6・・・ポリイミ
ド樹脂膜、8・・・チタン・白金膜、9・・・全突起電
極。FIGS. 1(a) to (h) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining one embodiment of the present invention, and FIG. 2 is a cross-sectional view of a semiconductor chip in the steps explained in FIG. 1(e). FIG. 1... Silicon substrate, 2... Silicon dioxide film, 3
...Dicing area, 4...Aluminum film, 4A
...All protruding electrode formation areas, 4B... Plating wiring,
5A, 5B...Photoresist film, 6...Polyimide resin film, 8...Titanium/platinum film, 9...All protruding electrodes.
Claims (1)
ターニングして金属突起電極形成領域と該領域間を接続
するめっき用配線を形成する工程と、全面にポリイミド
樹脂膜を形成したのちフォトレジスト膜をマスクとし前
記金属突起電極形成領域上の該ポリイミド樹脂膜をエッ
チングし除去する工程と、前記フォトレジスト膜を含む
全面に第2金属膜を被着したのちフォトレジスト膜を除
去し前記金属突起電極形成領域にのみ第2金属膜からな
るバリア膜を形成する工程と、前記ポリイミド樹脂膜を
マスクとして金属をめっきし前記バリア膜上に金属突起
電極を形成する工程とを含むことを特徴とする半導体装
置の製造方法。A step of forming a first metal film on a semiconductor substrate via an insulating film and patterning it to form a metal protrusion electrode formation region and a plating wiring connecting the regions, and a step of forming a polyimide resin film on the entire surface and then photolithography. A step of etching and removing the polyimide resin film on the metal protrusion electrode formation region using a resist film as a mask, and depositing a second metal film on the entire surface including the photoresist film, removing the photoresist film and removing the metal. The method includes a step of forming a barrier film made of a second metal film only in the protruding electrode formation region, and a step of plating metal using the polyimide resin film as a mask and forming a metal protruding electrode on the barrier film. A method for manufacturing a semiconductor device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63025270A JPH01200656A (en) | 1988-02-04 | 1988-02-04 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63025270A JPH01200656A (en) | 1988-02-04 | 1988-02-04 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01200656A true JPH01200656A (en) | 1989-08-11 |
Family
ID=12161336
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP63025270A Pending JPH01200656A (en) | 1988-02-04 | 1988-02-04 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01200656A (en) |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS513379U (en) * | 1974-06-25 | 1976-01-12 | ||
JPS5127175U (en) * | 1974-08-19 | 1976-02-27 | ||
JPS5145506U (en) * | 1974-10-01 | 1976-04-03 | ||
JPS5170575U (en) * | 1974-11-29 | 1976-06-03 | ||
JPS5935834U (en) * | 1982-08-31 | 1984-03-06 | 株式会社テイエルブイ | Vibration meter |
JPS5968231U (en) * | 1982-10-28 | 1984-05-09 | 三菱油化株式会社 | flexible transducer |
-
1988
- 1988-02-04 JP JP63025270A patent/JPH01200656A/en active Pending
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS513379U (en) * | 1974-06-25 | 1976-01-12 | ||
JPS5127175U (en) * | 1974-08-19 | 1976-02-27 | ||
JPS5145506U (en) * | 1974-10-01 | 1976-04-03 | ||
JPS5170575U (en) * | 1974-11-29 | 1976-06-03 | ||
JPS5935834U (en) * | 1982-08-31 | 1984-03-06 | 株式会社テイエルブイ | Vibration meter |
JPS5968231U (en) * | 1982-10-28 | 1984-05-09 | 三菱油化株式会社 | flexible transducer |
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