JPH01200594A - Film type el element and its manufacture - Google Patents
Film type el element and its manufactureInfo
- Publication number
- JPH01200594A JPH01200594A JP63026218A JP2621888A JPH01200594A JP H01200594 A JPH01200594 A JP H01200594A JP 63026218 A JP63026218 A JP 63026218A JP 2621888 A JP2621888 A JP 2621888A JP H01200594 A JPH01200594 A JP H01200594A
- Authority
- JP
- Japan
- Prior art keywords
- light emitting
- emitting layer
- layer
- thin film
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 17
- 239000013078 crystal Substances 0.000 claims abstract description 22
- 238000000034 method Methods 0.000 claims abstract description 20
- 239000000758 substrate Substances 0.000 claims description 26
- 239000010409 thin film Substances 0.000 claims description 26
- 239000012212 insulator Substances 0.000 claims description 14
- 238000007740 vapor deposition Methods 0.000 claims description 11
- 239000011159 matrix material Substances 0.000 claims description 4
- 238000005530 etching Methods 0.000 abstract description 8
- 229910008903 TmF3 Inorganic materials 0.000 abstract description 6
- PBCFLUZVCVVTBY-UHFFFAOYSA-N tantalum pentoxide Inorganic materials O=[Ta](=O)O[Ta](=O)=O PBCFLUZVCVVTBY-UHFFFAOYSA-N 0.000 abstract description 2
- 229910001128 Sn alloy Inorganic materials 0.000 abstract 1
- 238000003475 lamination Methods 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 239000010408 film Substances 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 238000001451 molecular beam epitaxy Methods 0.000 description 1
- 238000001552 radio frequency sputter deposition Methods 0.000 description 1
- 229910052717 sulfur Inorganic materials 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
Landscapes
- Electroluminescent Light Sources (AREA)
Abstract
Description
【発明の詳細な説明】
Ｃ産業上の利用分野）
本発明は、基板上に少なくとも、発光体層と電極とを積
層してなる薄膜ＥＬ素子及びその製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application) The present invention relates to a thin film EL device having at least a light emitting layer and an electrode laminated on a substrate, and a method for manufacturing the same.
第５図は、従来の薄膜ＥＬ素子の構成を模式的に示した
断面図であって、ガラス等の非晶質基板１上に透明電極
２、第１絶縁体層３、発光体層４、第２絶縁体層５及び
背面電極６をこの順序にて積層した構造を有する。FIG. 5 is a cross-sectional view schematically showing the structure of a conventional thin film EL element, in which a transparent electrode 2, a first insulator layer 3, a light emitting layer 4, It has a structure in which the second insulator layer 5 and the back electrode 6 are laminated in this order.
このような構成の薄膜ＥＬ素子は、透明電極２と背面電
極６との間に電圧を印加して発光体層４を発光させるが
、その輝度は発光体Ｎ４の結晶性に関連が深い。即ち、
発光の中心となる不純物以外の不純物が少なく、また発
光体の母体結晶に格子欠陥等が少なく結晶性の良い発光
体層の方が輝度が高く、発光に必要な電圧も低く抑えら
れる。In the thin film EL element having such a configuration, a voltage is applied between the transparent electrode 2 and the back electrode 6 to cause the light emitting layer 4 to emit light, and the brightness thereof is closely related to the crystallinity of the light emitting material N4. That is,
A light-emitting layer that contains fewer impurities other than the impurity that is the center of light emission and has fewer lattice defects in the host crystal of the light-emitting body and has good crystallinity has higher brightness and can suppress the voltage required for light emission.
従って、分子線蒸着法（ＭＢＤ法）または有機金属化学
気相成長法（ＭＯＣＶＤ法）等を用い、比較的結晶性の
良い発光体層を得ている。Therefore, a light emitter layer with relatively good crystallinity is obtained by using a molecular beam deposition method (MBD method) or a metal organic chemical vapor deposition method (MOCVD method).
ところで、前記薄膜ＥＬ素子の製造プロセスでは、非晶
質絶縁体上に発光体層を形成するため、ＭＢＤ法、ＭＯ
ＣＶＤ法等を用いて多結晶の発光体層の結晶性向上を図
っても、発光体層には結晶粒界が多数化じており、単結
晶薄膜のように結晶性の良いものは得られない。By the way, in the manufacturing process of the thin film EL element, in order to form a light emitter layer on an amorphous insulator, MBD method, MO
Even if attempts are made to improve the crystallinity of a polycrystalline light emitter layer using CVD methods, etc., there are many crystal grain boundaries in the light emitter layer, and a product with good crystallinity like a single crystal thin film cannot be obtained. do not have.
即ち、多結晶の発光体層の結晶性を良くするために基板
温度を上げるか、または発光体層形成後に熱処理を施す
ことが考えられるが、高温では非晶質絶縁体層及び透明
電極が変性するため、処理温度には限度があり、輝度の
向上が困難であるという課題があった。That is, in order to improve the crystallinity of the polycrystalline light emitting layer, it is possible to raise the substrate temperature or to perform heat treatment after forming the light emitting layer, but at high temperatures the amorphous insulator layer and transparent electrode are denatured. Therefore, there is a limit to the processing temperature, making it difficult to improve brightness.
また、絶縁体層を２層有する二重絶縁構造であり、さら
に発光体層の結晶性が悪いため、比較的高い駆動電圧を
必要とするという課題があった。Furthermore, since the device has a double insulation structure including two insulator layers and the crystallinity of the light emitting layer is poor, there is a problem that a relatively high driving voltage is required.
本発明はこのような課題を解決するためになされたもの
であって、輝度が高く低電圧にて駆動し得る薄膜ＥＬ素
子及びその製造方法の提供を目的とする。The present invention was made to solve these problems, and aims to provide a thin film EL element that has high brightness and can be driven at low voltage, and a method for manufacturing the same.
本発明に係る薄膜ＥＬ素子は、基板に、少なくとも発光
体層と、該発光体層を介して対向する２つの電極とを積
層した薄膜ＥＬ素子において、単結晶体からなる発光体
層と、該発光体層を介して、基板の積層面の平行方向に
互いに対向する・２つの電極とを備えたことを特徴とす
る。A thin film EL device according to the present invention is a thin film EL device in which at least a light emitting layer and two electrodes facing each other with the light emitting layer interposed in between are laminated on a substrate. It is characterized by comprising two electrodes facing each other in a direction parallel to the laminated surfaces of the substrates with the light emitting layer interposed therebetween.
また、本発明に係る薄膜ＥＬ素子の製造方法は、単結晶
基板に、発光体層をエピタキシャル成長させ、該発光体
層をエツチングして、縞状またはマトリックス状に単結
晶発光体層を形成し、該単結晶発光体層の対向する２つ
の側面に絶縁体層を蒸着形成し、絶縁体層を蒸着形成し
た２つの側面にそれぞれ電極を蒸着形成することを特徴
とする。Further, the method for manufacturing a thin film EL device according to the present invention includes epitaxially growing a light emitting layer on a single crystal substrate, etching the light emitting layer to form a single crystal light emitting layer in a striped or matrix shape, The present invention is characterized in that an insulating layer is deposited on two opposing side surfaces of the single crystal light emitting layer, and electrodes are deposited on each of the two side surfaces on which the insulating layer is deposited.
さらに、本発明に係る薄膜ＥＬ素子の他の製造方法は、
溝を形成した非晶質基板に発光体層をエピタキシャル成
長させ、該発光体層をエツチングして、該発光体層の対
向する２つの側面に絶縁体層を蒸着形成し、絶縁体層を
蒸着形成したこれら側面にそれぞれ電極を蒸着形成する
ことを特徴とする。Furthermore, another method for manufacturing a thin film EL device according to the present invention is as follows:
A light emitting layer is epitaxially grown on an amorphous substrate in which a groove is formed, the light emitting layer is etched, an insulating layer is formed on two opposing sides of the light emitting layer, and an insulating layer is formed by vapor deposition. It is characterized in that electrodes are formed on each of these side surfaces by vapor deposition.
本発明に係る薄膜ＥＬ素子の製造方法は、単結晶基板に
、発光体層をエピタキシャル成長させ、該発光体層をエ
ツチングして、縞状またはマトリックス状に単結晶発光
体層を形成し、該単結晶発光体層の対向する２つの側面
に絶縁体層を蒸着形成し、絶縁体層を蒸着形成した２つ
の側面にそれぞれ電極を蒸着形成し、また、本発明に係
る薄膜ＥＬ素子の他の製造方法は、溝を形成した非晶質
基板に発光体層をエピタキシャル成長させ、該発光体層
をエツチングして、該発光体層の対向する２つの側面に
絶縁体層を蒸着形成し、絶縁体層を蒸着形成したこれら
側面にそれぞれ電極を蒸着形成し、発光体層を介して基
板に平行方向に対向する２つの電極間に電圧が印加され
ると、発光体層が発光する。The method for manufacturing a thin film EL device according to the present invention includes epitaxially growing a light emitting layer on a single crystal substrate, etching the light emitting layer to form a single crystal light emitting layer in a striped or matrix shape, and An insulator layer is formed by vapor deposition on two opposing side surfaces of the crystalline luminescent layer, and electrodes are formed by vapor deposition on each of the two side surfaces on which the insulator layer is vapor-deposited, and another method of manufacturing a thin film EL device according to the present invention The method involves epitaxially growing a light emitting layer on an amorphous substrate with grooves formed therein, etching the light emitting layer, and depositing an insulator layer on two opposing sides of the light emitting layer. Electrodes are formed on these side surfaces by vapor deposition, respectively, and when a voltage is applied between the two electrodes facing parallel to the substrate via the light emitting layer, the light emitting layer emits light.
以下、本発明をその１実施例を示す図面に基づき詳述す
る。第１図は、本発明に係る薄膜ＥＬ素子の構成を模式
的に示す断面図であって、図中７は、ＧａＰ等からなる
単結晶基板である。単結晶基板７上には断面形状が台形
の単結晶からなる発光体層８が縞状に形成され、この発
光体層８の断面形状に沿って、Ｔａ２０５ Ｍ！’から
なる絶縁体層９が積層され、この絶縁体層９を介して前
記発光体層８の台形断面の両側面それぞれにＩＴＯ膜か
らなる透明電極１０が形成されている。これらの透明電
極１０゜１０間に電圧を印加すると、発光体層８が発光
し、その光は単結晶基板７と反対方向である絶縁体層９
の方向から取り出される。Hereinafter, the present invention will be explained in detail based on the drawings showing one embodiment thereof. FIG. 1 is a sectional view schematically showing the structure of a thin film EL device according to the present invention, and 7 in the figure is a single crystal substrate made of GaP or the like. A light emitting layer 8 made of a single crystal having a trapezoidal cross section is formed in a striped manner on the single crystal substrate 7, and along the cross section of the light emitting layer 8, Ta205M! A transparent electrode 10 made of an ITO film is formed on each side of the trapezoidal cross section of the light emitting layer 8 via the insulating layer 9. When a voltage is applied between these transparent electrodes 10° and 10, the luminescent layer 8 emits light, and the light is transmitted to the insulating layer 9 in the opposite direction to the single crystal substrate 7.
taken out from the direction.
次に、本発明に係る薄膜ＥＬ素子として、例えば青色Ｅ
Ｌ素子の製造方法につき説明する。第３図は、素子の製
造工程を示した図であって、分子線エピタキシー法によ
り２エン角のＧａＰ単結晶基板１１上にＺｎＳ ： Ｔ
ｍＦ ３ （Ｔｓ １ ｍｏｌχ）をエピタキシャル成
長させる。そのＧａＰ単結晶基板１１を、〜１０−１゜
Ｔｏｒｒ中にて６５０℃で１時間サーマルクリーニング
し、Ｚｎ、 Ｓ、及びＴｍＦ３の蒸発源を用いて基板
温度３７０℃、成長速度３人／ｓｅｃで厚さ１．０ｐｍ
のＺｎＳ：ＴｍＦ３発光体層１２をエピタキシャル成長
させる（第３図（ａ））。Next, as a thin film EL element according to the present invention, for example, a blue E
The method for manufacturing the L element will be explained. FIG. 3 is a diagram showing the manufacturing process of the device, in which ZnS:T is deposited on a GaP single-crystal substrate 11 with a 2-en angle by molecular beam epitaxy.
mF 3 (Ts 1 molχ) is epitaxially grown. The GaP single crystal substrate 11 was thermally cleaned at 650° C. for 1 hour in ~10 −1° Torr, and then heated at a substrate temperature of 370° C. and a growth rate of 3 persons/sec using evaporation sources of Zn, S, and TmF3. Thickness 1.0pm
A ZnS:TmF3 emitter layer 12 is epitaxially grown (FIG. 3(a)).
続いて、ＺｎＳ ： ＴｍＦ ３発光体層１２上にレジ
ストを１μｍ塗布し、レジスト露光時の焦点を若干オー
バーにして、このレジストに幅０．３μ−の溝を〜１．
０μ閘間隔で作製する（第３図中））。Subsequently, a resist of 1 .mu.m thick is coated on the ZnS:TmF3 phosphor layer 12, and a groove with a width of 0.3 .mu.m is formed in the resist by slightly overfocusing the resist during exposure.
(Figure 3)).
さらに、ＥＣＲエツチング装置により、断面形状が上底
０．３μｍ、下底０．６μｍの台形をなした縞状のパタ
ーンからなる発光体層１２をエツチング形成する（第３
図（Ｃ））。エツチングの条件は、マイクロ波パワー８
００Ｗ、マイクロ波周波数２．４５ ＧＨｚ、 Ｍｉ場
８７５ Ｇａｕｓｓ、エツチングガスＣＩ２／ＳＦ６χ
１．圧力１５Ｔｏｒｒである。Furthermore, using an ECR etching device, a light emitter layer 12 is etched to form a striped pattern having a trapezoidal cross-sectional shape with an upper base of 0.3 μm and a lower base of 0.6 μm (third etching process).
Figure (C)). The etching conditions are microwave power 8
00W, microwave frequency 2.45 GHz, Mi field 875 Gauss, etching gas CI2/SF6χ
1. The pressure was 15 Torr.
次に、ＺｎＳ：ＴｍＦ３発光体層をｌＩ２３ガスＩ Ｔ
ｏｒｒ中にて５００℃で１時間熱処理し、この発光体層
１２に、Ｔａ金属をターゲットとして用いたＲＦスパッ
タリング法により、入射パワー１ｋｗ、ガス圧比Ａｒ１
０２ｙｌｌガス圧１ ＋ｗＴｏｒｒにて、厚さ０．３μ
ｍのＴａ２０５躾からなる絶縁体層１３を薄着形成する
（第３図（ｄ））。Next, the ZnS:TmF3 emitter layer was heated with lI23 gas IT
The luminescent layer 12 was heat-treated at 500° C. for 1 hour in a 300° C.
02yll gas pressure 1 +wTorr, thickness 0.3μ
Then, an insulator layer 13 made of Ta205 with a thickness of 100 mm is thinly formed (FIG. 3(d)).
このようにして断面形状が台形の発光体層１２の形状に
沿って絶縁体層１３が形成された台形断面の上底部分に
厚さ１μｍのレジスト１４を形成しく第３図（ｅｌ）
、このレジスト１４を含む絶縁体層１３上に、Ｉｎ−３
ｎ合金をターゲットとして用いたＲＦスパッタリング法
により、入射パワー１ ｋｗ、ガス圧比Ａｒ１０２夕１
．ガス圧１ ｍＴｏｒｒにて、厚さ０．２．１７１１１
のｒＴ。In this way, a resist 14 having a thickness of 1 μm is formed at the upper bottom portion of the trapezoidal cross section where the insulator layer 13 is formed along the shape of the light emitter layer 12 having a trapezoidal cross-sectional shape.
, In-3 is deposited on the insulator layer 13 including the resist 14.
By RF sputtering method using n-alloy as a target, the incident power was 1 kW and the gas pressure ratio Ar was 102 cm.
．． At gas pressure 1 mTorr, thickness 0.2.17111
rT.
膜１５を蒸着形成する（第３図（ｆ））。A film 15 is formed by vapor deposition (FIG. 3(f)).
さらに、発光体層１２の台形断面の上底部分に蒸着形成
されたＩＴＯ膜１５のみをリフトオフにより除去し、縞
上に形成された発光体層１２の台形断面の両側面にのみ
透明電極１５を形成する（第３図（梢）。Furthermore, only the ITO film 15 deposited on the upper bottom portion of the trapezoidal cross section of the light emitting layer 12 is removed by lift-off, and the transparent electrodes 15 are formed only on both sides of the trapezoidal cross section of the light emitting layer 12 formed on the stripes. form (Figure 3 (treetop).
第４図は、以上のように形成された青色ＥＬ素子の輝度
−電圧特性を示したものであって、図中点線は従来のＥ
Ｌ素子、実線は本発明に係るＥＬ素子の特性を示す。図
からも明らかなように、本発明に係るＥＬ素子は、輝度
が従来の５〜１０倍増加し、駆動電圧が２０〜４０％以
上減少した。FIG. 4 shows the brightness-voltage characteristics of the blue EL element formed as described above, and the dotted line in the figure shows the conventional E
The solid line in the L element indicates the characteristics of the EL element according to the present invention. As is clear from the figure, in the EL element according to the present invention, the luminance increased 5 to 10 times that of the conventional device, and the driving voltage decreased by 20 to 40% or more.
なお、本実施例では、発光体層を縞状に形成する場合に
つき詳述したが、発光面積を大きくするために発光体層
をマトリックス状に形成してもよい。In this embodiment, the case in which the light emitting layer is formed in a striped pattern has been described in detail, but the light emitting layer may be formed in a matrix shape in order to increase the light emitting area.
また、本発明に係る薄膜ＥＬ素子の製造方法として、幅
０．５ μｍ、深さ０．５μｍ１間隔０．５ μｍの溝
を形成したガラス基板上に、適切な温度を選んで、Ｚｎ
Ｓ：ＴｍＦ３をエピタキシャル成長させた場合であって
も、得られる素子特性は前述の第１実施伊１と同様に改
善されている。なお、その場合には基板側にも光が取り
出せる。In addition, as a method for manufacturing a thin film EL device according to the present invention, Zn is deposited on a glass substrate on which grooves are formed with a width of 0.5 μm, a depth of 0.5 μm, and an interval of 0.5 μm.
Even when S:TmF3 is epitaxially grown, the obtained device characteristics are improved in the same way as in the first embodiment 1 described above. In this case, light can also be extracted from the substrate side.
本発明に係る薄膜ＥＬ素子及びその製造方法は、基板上
にまず単結晶の発光体層を形成するため、発光体層形成
時の基板加熱等の熱処理プロセスによる薄膜ＥＬ素子の
他の層の劣化を回避するとともに、輝度が高く、駆動電
圧の低い薄膜ＥＬ素子を提供するという優れた効果を奏
する。In the thin film EL device and the manufacturing method thereof according to the present invention, since a single crystal light emitting layer is first formed on a substrate, other layers of the thin film EL device are deteriorated due to a heat treatment process such as substrate heating during formation of the light emitting layer. This has the excellent effect of avoiding the above problems and providing a thin film EL element with high brightness and low driving voltage.
第１図は本発明に係る薄膜ＥＬ素子の構造を示す模式的
断面図、第２図はその斜視図、第３図はその製造過程を
示す図、第４図は従来素子との輝度−電圧特性の比較図
、第５図は従来素子の構造を示す模式的断面図である。
７・・・単結晶基板 ８・・・発光体Ｎ ９・・・絶縁
体層１０・・・電極 １１・・・ＧａＰ単結晶基板 １
２・・・発光体層１３・・・絶縁体層 １５・・・ＩＴ
Ｏ膜特 許 出願人 住友金属工業株式会社代理人 弁
理士 河 野 登 夫ど
第 ２ 図
印加電圧 （■）
軍 ４ 図
采 ５ 図
（ａ）
（ｂ）
（Ｃ）
甫 ３
（ｅ）
（ｆ）
（ｇ）
図FIG. 1 is a schematic cross-sectional view showing the structure of a thin film EL device according to the present invention, FIG. 2 is a perspective view thereof, FIG. 3 is a diagram showing the manufacturing process, and FIG. 4 is a diagram showing the luminance vs. voltage of a conventional device. A characteristic comparison diagram, FIG. 5, is a schematic cross-sectional view showing the structure of a conventional element. 7...Single crystal substrate 8...Light emitter N 9...Insulator layer 10...Electrode 11...GaP single crystal substrate 1
2... Luminous layer 13... Insulator layer 15... IT
O membrane patent Applicant Sumitomo Metal Industries Co., Ltd. Agent Patent attorney Noboru Kono Figure 2 Applied voltage (■) Military 4 Figure 5 Figures (a) (b) (C) Ho 3 (e) (f ) (g) Figure
Claims (4)
して対向する２つの電極とを積層した薄膜ＥＬ素子にお
いて、 単結晶体からなる発光体層と、 該発光体層を介して、基板の積層面の平行方向に互い
に対向する２つの電極と を備えたことを特徴とする薄膜ＥＬ素子。1. In a thin film EL element in which at least a light emitting layer and two electrodes facing each other are laminated on a substrate, the light emitting layer made of a single crystal and the light emitting layer of the substrate are laminated through the light emitting layer. A thin film EL device comprising: two electrodes facing each other in a direction parallel to the laminated surfaces.
薄膜ＥＬ素子。2. A thin film EL device comprising a plurality of sets of light emitting layers according to claim 1 disposed on a substrate.
において、単結晶基板に、発光体層をエピタキシャル成
長させ、該発光体層をエッチングして、縞状またはマト
リックス状に単結晶発光体層を形成し、該単結晶発光体
層の対向する２つの側面に絶縁体層を蒸着形成し、絶縁
体層を蒸着形成した２つの側面にそれぞれ電極を蒸着形
成することを特徴とする薄膜ＥＬ素子の製造方法。3. 3. The method for manufacturing a thin film EL device according to claim 1, wherein a light emitting layer is epitaxially grown on a single crystal substrate, and the light emitting layer is etched to form a single crystal light emitting layer in a striped or matrix shape. , a method for producing a thin film EL device, characterized in that an insulating layer is formed by vapor deposition on two opposing side surfaces of the single crystal light emitting layer, and electrodes are formed by vapor deposition on each of the two side surfaces on which the insulating layer is formed by vapor deposition. .
において、溝を形成した非晶質基板に発光体層をエピタ
キシャル成長させ、該発光体層をエッチングして、該発
光体層の対向する２つの側面に絶縁体層を蒸着形成し、
絶縁体層を蒸着形成したこれら側面にそれぞれ電極を蒸
着形成することを特徴とする薄膜ＥＬ素子の製造方法。4. 3. The method of manufacturing a thin film EL device according to claim 1, wherein a light emitting layer is epitaxially grown on an amorphous substrate in which a groove is formed, and the light emitting layer is etched to form two opposing side surfaces of the light emitting layer. An insulator layer is deposited on the
A method for manufacturing a thin film EL device, characterized in that electrodes are formed by vapor deposition on each of these side surfaces on which an insulating layer is formed by vapor deposition.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63026218A JPH01200594A (en) | 1988-02-05 | 1988-02-05 | Film type el element and its manufacture |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63026218A JPH01200594A (en) | 1988-02-05 | 1988-02-05 | Film type el element and its manufacture |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01200594A true JPH01200594A (en) | 1989-08-11 |
Family
ID=12187262
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63026218A Pending JPH01200594A (en) | 1988-02-05 | 1988-02-05 | Film type el element and its manufacture |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01200594A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5888410A (en) * | 1996-04-01 | 1999-03-30 | Denso Corporation | Dry etching method and manufacturing method of manufacturing EL element using same |
| JP2009004314A (en) * | 2007-06-25 | 2009-01-08 | Panasonic Electric Works Co Ltd | Inorganic electroluminescent element |
-
1988
- 1988-02-05 JP JP63026218A patent/JPH01200594A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5888410A (en) * | 1996-04-01 | 1999-03-30 | Denso Corporation | Dry etching method and manufacturing method of manufacturing EL element using same |
| JP2009004314A (en) * | 2007-06-25 | 2009-01-08 | Panasonic Electric Works Co Ltd | Inorganic electroluminescent element |
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