JPH01196814A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To facilitate selective formation of an impurity region and formation of an electrode in the impurity region, by a method wherein a window is opened in a silicon oxide film, a polycrystalline silicon film is formed thereon, and an impurity is doped therein in the process of evaporation of the impurity. CONSTITUTION:A polycrystalline silicon film 14 is formed by evaporation on a window formed in a silicon oxide film 13 which is formed on a semiconductor substrate 12. An impurity is evaporated from above the film 14 at a high temperature and is doped in silicon. Since the impurity is diffused at a high speed through a particle boundary in the polycrystalline silicon differently from that in single crystal silicon, a time for the high-temperature evaporation is substantially the same as in the case when the polycrystalline silicon is absent. Thereby selective formation of an impurity region and formation of an electrode in the impurity region are facilitated.

Description

DETAILED DESCRIPTION OF THE INVENTION FIELD OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device that can be used for a contact portion between an electrode and silicon of a semiconductor device.

2. Description of the Related Art Conventionally, the manufacturing process shown in the step-by-step cross-sectional views of FIGS. 4(a) and 4(b) has been put into practice.
As shown in FIG. 2(a), a window is opened in the silicon oxide film 1 formed on the surface of the semiconductor substrate 2, and a high concentration impurity region 3 is formed therein. Then, an aluminum electrode 4 is formed and heat treated to form an aluminum-silicon eutectic.

Problems to be Solved by the Invention When the above method is used to form the emitter of a bipolar transistor, if the contact window 5 shown in FIG. 4(b) is not formed, the problem shown in FIG. 5 will occur. As a result, the aluminum-silicon eutectic portion 11 extends to the emitter-base junction, increasing the leakage current between the emitter and base. Therefore, there is a method of depositing polycrystalline silicon on the emitter window and doping impurities from above by ion implantation, but in this case, in the impurity distribution after heat treatment, the impurity concentration on the silicon surface is In addition, there is a limit to lowering the resistance of the polycrystalline silicon part with impurity doping by ion implantation, which is lower than when silicon is doped with an equivalent impurity. This tendency also means that the surface bond of the contact window becomes smaller (the thicker it becomes).

Means for Solving the Problems The present invention comprises the steps of forming a window in a silicon oxide film formed on a semiconductor substrate, forming a polycrystalline silicon film thereon, and depositing impurities at high temperature on the surface of the semiconductor substrate. and a step of doping the polycrystalline silicon film and the semiconductor substrate thereunder with the impurity during the vapor deposition.

According to the present invention, as a result of rapid impurity diffusion within the polycrystalline silicon film, the impurity concentrations of the polycrystalline silicon film and the surface of the semiconductor substrate immediately below it become approximately the same, making it possible to selectively form impurity regions and to It is easy to form electrodes in the area.

Examples - Next, the present invention will be explained in detail with reference to examples. Figure 1 (a
), a polycrystalline silicon film 14 is deposited on a window formed in a silicon oxide film 13 formed on a semiconductor substrate 12. Next, as shown in FIG. 1(b), impurities are deposited on top of the silicon at a high temperature to dope the impurities into the silicon. In polycrystalline silicon, unlike in single-crystalline silicon, impurities diffuse at high speed through grain boundaries, so the high-temperature evaporation time is approximately the same as in the case without polycrystalline silicon. In FIG. 2(a), a characteristic curve (area) 16 shows the impurity distribution level when impurities are doped through the polycrystalline silicon film 14 by high-temperature vapor deposition, and a characteristic curve (area) 17 shows the impurity distribution level when the impurity is doped through the polycrystalline silicon film 14. It shows the level of impurity distribution on the surface. The impurity concentration in the polycrystalline silicon film and the impurity concentration on the silicon surface are approximately equal.

Although not shown in FIG. 1, even if an aluminum electrode is formed on the polycrystalline silicon film 14, the highest concentration portion will not disappear due to the aluminum-silicon eutectic, and its distribution will change. As shown in FIG. 2(b), the lower layer distribution of the outermost aluminum electrode 18 and the aluminum-silicon eutectic 19 can be maintained as is.

FIG. 3 shows an example in which the present invention is applied to a PNP high frequency bipolar transistor. In this example, an aluminum electrode 22 is provided on the outermost surface, but high-temperature vapor deposition via polycrystalline silicon 23 is used for the emitter 25 portion, and BN vapor deposition is used as an impurity source.

As a result, an emitter-base junction depth of 0.3 μm and a cut-off layer wavenumber of 3 GHz were achieved. In FIG. 3, 24 is a silicon oxide film, 26 is a base region, 27 is a graft base region, and 28 is a collector region made of a semiconductor substrate.

Effects of the Invention By using the present invention, it is not necessary to form a window for contacting the emitter inside the emitter, and it is possible to eliminate the need to form a window for contacting the emitter inside the emitter. It was possible to form a eutectic with silicon.

[Brief explanation of the drawing]

FIGS. 1(a) and (b) are cross-sectional views schematically showing an example of the present invention in the order of steps, and FIGS. 2(a) and (b) are impurity distributions of a semiconductor device obtained in an example of the present invention, respectively. 3 is a sectional view of a semiconductor device obtained in another embodiment of the present invention, FIGS. 4(a) and 4(b) are sectional views of a conventional example in the order of steps, and FIG. 5 is a sectional view of a conventional device. FIG. 1.6, 13.24...Silicon oxide film, 2°8.12.28...Semiconductor substrate, 3,15...
...High concentration area, 4.10.18.22...
・Aluminum electrode, 5...Contact window, 7
, 26... base area, 9, 25...
Emitter region, 11.19...Aluminum-silicon eutectic, 14,16°20.23...Polycrystalline silicon, 17.21...Silicon, 27
...Graft base area. Name of agent: Patent attorney Toshio Nakao and one other person Figure 1 Figure 2 (α) χφ

Claims (1)

[Claims] a step of opening a window in a silicon oxide film formed on a semiconductor substrate; a step of forming a polycrystalline silicon film thereon;
A method for manufacturing a semiconductor device comprising the steps of: depositing an impurity on the surface of the semiconductor substrate at high temperature; and doping the impurity into the polycrystalline silicon film and the semiconductor substrate thereunder during the deposition.