JPH0119257B2 - - Google Patents
Info
- Publication number
- JPH0119257B2 JPH0119257B2 JP15546781A JP15546781A JPH0119257B2 JP H0119257 B2 JPH0119257 B2 JP H0119257B2 JP 15546781 A JP15546781 A JP 15546781A JP 15546781 A JP15546781 A JP 15546781A JP H0119257 B2 JPH0119257 B2 JP H0119257B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- stencil
- stencil layer
- substrate
- frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000000758 substrate Substances 0.000 claims description 20
- 238000000034 method Methods 0.000 claims description 19
- 239000002904 solvent Substances 0.000 claims description 13
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 10
- 229920002120 photoresistant polymer Polymers 0.000 description 7
- 239000004020 conductor Substances 0.000 description 6
- 239000011810 insulating material Substances 0.000 description 5
- 239000000463 material Substances 0.000 description 4
- 229910000978 Pb alloy Inorganic materials 0.000 description 3
- 238000012790 confirmation Methods 0.000 description 2
- 238000010894 electron beam technology Methods 0.000 description 2
- -1 2-ethoxylacetate Chemical compound 0.000 description 1
- YZGQDNOIGFBYKF-UHFFFAOYSA-N Ethoxyacetic acid Chemical compound CCOCC(O)=O YZGQDNOIGFBYKF-UHFFFAOYSA-N 0.000 description 1
- NTIZESTWPVYFNL-UHFFFAOYSA-N Methyl isobutyl ketone Chemical compound CC(C)CC(C)=O NTIZESTWPVYFNL-UHFFFAOYSA-N 0.000 description 1
- UIHCLUNTQKBZGK-UHFFFAOYSA-N Methyl isobutyl ketone Natural products CCC(C)C(C)=O UIHCLUNTQKBZGK-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 150000002168 ethanoic acid esters Chemical class 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000010419 fine particle Substances 0.000 description 1
- 150000002576 ketones Chemical class 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/14—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material, e.g. vapour evaporation
- H05K3/143—Masks therefor
Description
【発明の詳細な説明】
本発明は、所要の基板上に導電性材、絶縁性材
等でなる層による所望のパターンを形成するパタ
ーン形成法の改良に関し、特に半導体集積回路装
置、ジヨセフソン集積回路装置等の導体層、絶縁
層等を所望のパターンに形成する場合に適用して
好適なものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a pattern forming method for forming a desired pattern on a desired substrate using a layer made of a conductive material, an insulating material, etc., and in particular to a semiconductor integrated circuit device, Josephson integrated circuit It is suitable for application when forming a conductor layer, an insulating layer, etc. of a device or the like into a desired pattern.
斯種パターン形成法として従来、原理的に、第
１図を伴なつて以下述べる方法が提案されてい
る。 Conventionally, as a method for forming such a pattern, the method described below with reference to FIG. 1 has been proposed in principle.
即ち所要の基板１を予め用意し（第１図Ａ）、
而してその基板１上に、フオトレジスト、電子ビ
ームレジスト等でなるステンシル層２（実際上上
端縁より外側方に延長せる鍔５を形成している）
を所望のパターンに形成し（第１図Ｂ）、次にそ
の基板１上のステンシル層２の形成されていない
領域上に、導電性材、絶縁性材等でなるステンシ
ル層２に比し薄い厚さの層３を、ステンシル層２
の上の、層３と同じ導電性材、絶縁性材等でなり
且層３と同じ厚さでなる層４の形成を同時に伴な
つて、基板１の上方側よりの導電性材、絶縁性材
の蒸着、スパツタリング等によつて、形成し（第
１図Ｃ）、次にステンシル層２を、その溶媒を用
いて溶去することによつて、そのステンシル層２
を基板１上より除去すると共に、これに伴ないス
テンシル層２上の層４を除去し（第１図Ｄ）、斯
くて基板１上に層３による所望のパターン（ステ
ンシル層２とは反転せるパターン）を形成すると
いう方法が提案されている。 That is, the required substrate 1 is prepared in advance (FIG. 1A),
Then, on the substrate 1, a stencil layer 2 made of photoresist, electron beam resist, etc. (in fact, a flange 5 extending outward from the upper edge is formed).
is formed into a desired pattern (FIG. 1B), and then a layer thinner than the stencil layer 2 made of a conductive material, an insulating material, etc. is formed on the area on the substrate 1 where the stencil layer 2 is not formed. Thickness layer 3, stencil layer 2
At the same time, a layer 4 made of the same conductive material, insulating material, etc. as layer 3 and having the same thickness as layer 3 is formed on top of the substrate 1. The stencil layer 2 is formed by vapor deposition, sputtering, etc. of a material (FIG. 1C), and then the stencil layer 2 is dissolved away using the solvent.
is removed from the substrate 1, and the layer 4 on the stencil layer 2 is also removed (FIG. 1D). A method of forming a pattern) has been proposed.
所で斯るパターン形成法の場合、原理的には、
基板１上のステンシル層２の形成されていない領
域上に、層３をステンシル層２上の層４の形成を
伴なつて形成する工程（以下簡単の為第２の工程
と称す）に於て、その層３及び４は、それ等がス
テンシル層２に比し薄い厚さを有するので、互に
分離して形成されるものである。然し乍ら実際上
は、それ等層３及び４の形成する第２の工程に於
て、層３及び４を構成する材料の微粒子が散乱、
拡散等をなすことより、第２図に示す如く、層３
及び４を構成せる材料と同じ材料の薄い層６が、
ステンシル層２の側面上上に層３及び４と連接せ
る態様を以つて付着形成されるを余儀なくされる
ものである。 However, in the case of such a pattern forming method, in principle,
In the step of forming layer 3 on the region of substrate 1 where stencil layer 2 is not formed, together with the formation of layer 4 on stencil layer 2 (hereinafter referred to as the second step for simplicity) , the layers 3 and 4 are formed separately from each other since they have a smaller thickness than the stencil layer 2. However, in practice, in the second step of forming the layers 3 and 4, the fine particles of the material constituting the layers 3 and 4 are scattered,
As shown in Fig. 2, layer 3
and a thin layer 6 of the same material as that constituting 4,
It is forced to be deposited on the side surfaces of the stencil layer 2 in a manner that connects the layers 3 and 4.
この為、ステンシル層２を溶去することによつ
て、そのステンシル層２を基板１上より除去する
と共に、これに伴なつてステンシル層２上の層４
を除去する工程（以下簡単の為第３の工程と称
す）に於て、従来、ステンシル層２をその溶媒中
に浸漬せる状態（実際上ステンシル層２、層３及
び４を形成せる基板１をステンシル層２の溶媒中
に浸漬せる状態で）で、発振周波数25〜50kHz帯
の超音波発振器を用いて、ステンシル層２に25〜
50kHzの周波数を有する超音波の振動を与え、こ
れにより層６を破壊し乍らステンシル層２を溶解
せしめるという処理をとることがなされている。 Therefore, by dissolving the stencil layer 2, the stencil layer 2 is removed from the substrate 1, and at the same time, the layer 4 on the stencil layer 2 is removed.
In the step of removing the stencil layer 2 (hereinafter referred to as the third step for simplicity), the stencil layer 2 is conventionally immersed in the solvent (in practice, the substrate 1 on which the stencil layers 2, 3, and 4 are formed is immersed in the solvent). stencil layer 2) using an ultrasonic oscillator with an oscillation frequency of 25 to 50 kHz.
A process has been carried out in which ultrasonic vibrations having a frequency of 50 kHz are applied to destroy the layer 6 while dissolving the stencil layer 2.
然し乍ら、第３の工程に於て、斯る処理をとる
場合、超音波の振動出力を大とすれば、層３が基
板１上より剥離したり欠損したりする欠陥が生ず
る不都合を有していた。又斯る不都合を回避すべ
く、超音波の振動出力を小とすれば、ステンシル
層２の側面に付着せる層６の破壊が効果的になさ
れない理由で、ステンシル層２を基板１上より除
去するに長時間を要すると共に、第３図に示す如
くステンシル層２上の層４が基板１上に不要層
４′として残留したり、層６の一部が基板１上に
直立せる残査物６′として残留したり、層３上に
付着した残査物６″として残留したり、基板１の
層３の形成されていない領域上に付着した残査物
６として残留したりし、依つて層３による所望
のパターンを得るに長時間を要すると共に、その
層３による所望パターンが、不要層４′、残査物
６′，６″，６等を残留せるものとして得られる
という不都合を有していた。 However, when such a treatment is performed in the third step, if the vibration output of the ultrasonic wave is increased, there is a problem that defects such as peeling or chipping of the layer 3 from the substrate 1 occur. Ta. In addition, in order to avoid such inconvenience, if the vibration output of the ultrasonic wave is made small, the layer 6 attached to the side surface of the stencil layer 2 will not be effectively destroyed, so the stencil layer 2 is removed from the substrate 1. It takes a long time to do this, and the layer 4 on the stencil layer 2 remains as an unnecessary layer 4' on the substrate 1 as shown in FIG. 6', a residue 6'' attached to the layer 3, or a residue 6 attached to an area of the substrate 1 where the layer 3 is not formed; It takes a long time to obtain the desired pattern by the layer 3, and the desired pattern by the layer 3 is obtained with unnecessary layers 4', residues 6', 6'', 6, etc. remaining. Was.
叙上に鑑み、本発明者等は、第１図にて上述せ
るパターン形成法に於て種々の実験の結果、上述
せる第３の工程に於て、上述せる、ステンシル層
２をその溶媒中に浸漬せる状態で、ステンシル層
２に25〜50kHzの周波数を有する超音波の振動を
与える処理をとる場合に於て、その超音波の振動
出力を小とするときの不都合が、超音波の振動出
力が小であることにより、ステンシル層２の側面
に付着形成せる層６の破壊が効果的になされない
から生ずるというばかりでなく、超音波の周波数
が25〜50kHzであることにより、層６の破壊が効
果的になされないから生ずるものでもあることを
確認するに到つた。 In view of the above, the present inventors conducted various experiments in the pattern forming method described above in FIG. When applying ultrasonic vibrations with a frequency of 25 to 50 kHz to the stencil layer 2 while the stencil layer 2 is immersed in This occurs not only because the low power does not effectively destroy the layer 6 deposited on the side surfaces of the stencil layer 2, but also because the ultrasonic frequency is between 25 and 50 kHz. We have come to the conclusion that this may also be caused by destruction not being done effectively.
又本発明者等は、上述せる第３の工程に於て、
上述せる如くに、ステンシル層２をその溶媒中に
浸漬せる状態で、ステンシル層２に25〜50kHzの
周波数を有する超音波の振動を与える処理をとる
に代え、ステンシル層２をその溶媒中に浸漬せる
状態でステンシル層に80〜200kHzの周波数を有
する超音波の振動を与える処理をとる場合、その
超音波の振動出力が小であつても、その超音波の
周波数が80〜200kHzであることにより、ステン
シル層２の側面に付着形成せる層６の破壊が効果
的になされ、従つて前述せる不都合を有効に回避
し得ることを確認するに到つた。 In addition, the present inventors, in the third step mentioned above,
As described above, instead of applying ultrasonic vibrations having a frequency of 25 to 50 kHz to the stencil layer 2 while the stencil layer 2 is immersed in the solvent, the stencil layer 2 is immersed in the solvent. When applying ultrasonic vibrations with a frequency of 80 to 200 kHz to the stencil layer in a state where the It has now been confirmed that the layer 6 deposited on the side surface of the stencil layer 2 is effectively destroyed, and the above-mentioned disadvantages can therefore be effectively avoided.
更に上述せる確認事項は、上述せる第３の工程
に於て、ステンシル層２をその溶媒中に浸漬せる
状態で、ステンシル層２に超音波の振動を与える
処理をとる場合に於て、その超音波の周波数ｆを
パラメータとして、ステンシル層２に超音波の振
動を与える処理時間（分）に対しステンシル層２
及びその上の層４が第３図にて上述せる不要層
４′、残査物６′，６″，６等を残留せしめるこ
となしに基板１上より除去される率（％）を測定
した結果、第４図に示す結果が得られたことによ
りしても、確かであることが裏付けられた。又、
上述せる第３の工程に於て、ステンシル層２をそ
の溶媒中に浸漬せる状態で、ステンシル層２に80
〜200kHzの周波数を有する超音波の振動を与え
る処理をとる場合、層３による所望パターンが、
第５図に示す如く、不要層４′、残査物６′，６″，
６等を残留せざる、鮮明なものとして、短時間
で得られたことよりしても、確かであることが裏
付けされた。但し第４図及び第５図に示す結果
は、ステンシル層２が厚さ約1μｍを有して、AZ
−1470（シツプレイ社製商品名）ポジ型フオトレ
ジストでなり、又層３及び４が厚さ0.4μｍを有し
て鉛合金でなり、更にステンシル層２の溶媒がア
セトンでなり、尚更に超音波の振動出力が超音波
発振器の電気入力でみて200Wである場合の結果
である。然し乍ら、ステンシル層２がAZ−1470
ポジ型フオトレジストでなる外、AZ−1350J、
AZ−1450J、AZ−2400（何れもシツプレイ社製商
品名）ポジ型フオトレジスト、OFPRシリーズ
（東京応用化学社製商品名）等の他のポジ型フオ
トレジストでなる場合であつても、又層３及び４
が鉛合金でなる外、他の導電性材、SiO2等の絶
縁性材でなる場合であつても、更にステンシル層
２の溶媒がアセトンでなる外、ステンシル層２を
構成せる材料に応じたその良溶媒である場合であ
つても、即ち例えばステンシル層２がフオトレジ
スト又は電子ビームレジストである場合、メチル
イソブチルケトン等のケトン類、２−エトキシル
アセテート等の酢酸エステル類等であつても、第
４図に示すと同様の結果が得られた。 Furthermore, the above-mentioned confirmation items are to be confirmed when applying ultrasonic vibration to the stencil layer 2 while the stencil layer 2 is immersed in the solvent in the third step. Using the frequency f of the sound wave as a parameter, the stencil layer 2
And the rate (%) at which the layer 4 thereon was removed from the substrate 1 without leaving unnecessary layers 4', residues 6', 6'', 6, etc. as described above in FIG. 3 was measured. As a result, the results shown in Figure 4 were obtained, which confirmed that this was true.Also,
In the third step described above, while the stencil layer 2 is immersed in the solvent, the stencil layer 2 is coated with 80%
When applying ultrasonic vibrations having a frequency of ~200kHz, the desired pattern by layer 3 is
As shown in FIG. 5, unnecessary layer 4', residue 6', 6'',
The fact that it was obtained in a short period of time, as it was clear and did not leave any 6th grade, confirmed its authenticity. However, the results shown in FIGS. 4 and 5 show that the stencil layer 2 has a thickness of about 1 μm and the AZ
-1470 (trade name manufactured by Shipplay) is a positive type photoresist, layers 3 and 4 have a thickness of 0.4 μm and are made of a lead alloy, the solvent of the stencil layer 2 is acetone, and the ultrasonic These are the results when the vibration output is 200W in terms of the electrical input of the ultrasonic oscillator. However, stencil layer 2 is AZ-1470.
Made of positive photoresist, AZ-1350J,
Even if it is made of other positive photoresists such as AZ-1450J, AZ-2400 (both trade names manufactured by Shippray Co., Ltd.), or other positive photoresists such as OFPR series (trade names manufactured by Tokyo Applied Chemical Co., Ltd.), 3 and 4
Even if the stencil layer 2 is made of lead alloy, other conductive material, or insulating material such as SiO 2 , the solvent of the stencil layer 2 may be acetone, and the stencil layer 2 may be made of acetone. Even if the stencil layer 2 is a photoresist or an electron beam resist, ketones such as methyl isobutyl ketone, acetic acid esters such as 2-ethoxylacetate, etc., are good solvents. Similar results were obtained as shown in FIG.
尚上述せる確認事項に於て、超音波の周波数が
80〜200kHzであるとする、その下限周波数80kHz
は、超音波の周波数がその下限周波数80kHzより
低くなれば、その下限周波数を堺としてステンシ
ル層２に超音波の振動を与える処理時間が急激に
長くなることよりしても決められているものであ
る。又上限周波数200kHzは、超音波の周波数が
その上限周波数200kHzより高くなれば、その上
限周波数を堺として、ステンシル層２の溶媒中で
の超音波の振動出力の損失が急激に大になり、こ
の為ステンシル層２に効果的に超音波の振動出力
を与えることが出来なくなることによりしても決
められているものである。 In addition, in the confirmation items mentioned above, the frequency of the ultrasonic wave is
Its lower limit frequency is 80kHz, which is 80~200kHz
This is also determined from the fact that if the ultrasonic frequency becomes lower than the lower limit frequency of 80 kHz, the processing time for applying ultrasonic vibration to the stencil layer 2 with the lower limit frequency set as Sakai will suddenly become longer. be. Moreover, the upper limit frequency of 200 kHz is such that if the frequency of the ultrasonic wave becomes higher than the upper limit frequency of 200 kHz, the loss of vibration output of the ultrasonic wave in the solvent of the stencil layer 2 will suddenly increase, and this This is also determined by the fact that it becomes impossible to effectively apply ultrasonic vibration output to the stencil layer 2.
以上よりして、此処に特許請求の範囲所載のパ
ターン形成法を、本発明によるパターン形成法と
して提案するに到つたものである。 Based on the above, we have come to propose the pattern forming method described in the claims as a pattern forming method according to the present invention.
斯る本発明によるパターン形成法によれば、前
述せる所より明らかであるので、詳細説明はこれ
を省略するも、前述せる不都合を伴うことなし
に、所要の基板１上に導電性材、絶縁性材等でな
る層３による所望のパターンを形成することが出
来るという大なる特徴を有するものである。因み
にステンシル層２が、前述せる如く厚さ1μｍを
有して、AZ−1470フオトレジストでなり、又層
３及び４が厚さ0.4μｍを有して、鉛合金でなり、
更にステンシル層２に対する溶媒がアセトンでな
り、尚更に超音波の振動出力が超音波発振器の電
気入力でみて200Wである場合に於て、上述せる
第３の工程に於ける超音波の振動を与える処理を
３〜30分とし、又超音波の周波数を100kHz、
150kHzとした所、何れの場合でも、第５図に示
す如く、基板１上に層３による所望のパターン
を、基板１上に第３図に前述せる不要層４′、残
査物６′，６″，６等を残留せしめることなしに
得ることが出来た。尚本例の場合上述の第３の工
程后、全体をアセトン液中でリンスした后、乾燥
した。 According to the pattern forming method according to the present invention, it is possible to form a conductive material and an insulating material on a required substrate 1 without the above-mentioned disadvantages, although detailed explanation will be omitted since it is obvious from the above-mentioned points. A great feature is that a desired pattern can be formed using the layer 3 made of a rubber material or the like. Incidentally, as mentioned above, the stencil layer 2 has a thickness of 1 μm and is made of AZ-1470 photoresist, and the layers 3 and 4 have a thickness of 0.4 μm and are made of a lead alloy.
Furthermore, when the solvent for the stencil layer 2 is acetone and the ultrasonic vibration output is 200 W in terms of the electric input of the ultrasonic oscillator, ultrasonic vibration is applied in the third step described above. The treatment time was 3 to 30 minutes, and the ultrasonic frequency was 100kHz.
150kHz, in any case, as shown in FIG. 5, a desired pattern is formed on the substrate 1 by the layer 3, and the unnecessary layer 4', the residue 6', 6'', 6, etc. could be obtained without leaving any residue. In this example, after the above-mentioned third step, the entire product was rinsed in acetone solution and then dried.
第１図Ａ〜Ｄは、本発明によるパターン形成法
の基礎となる原理的なパターン形成法の順次の工
程に於ける略線的断面図、第２図は、第１図Ｃの
工程に対応する実際の工程に於ける略線的断面
図、第３図は従来のパターン形成法による場合
の、第１図Ｄの工程に対応する実際の工程に於け
る略線的断面図、第４図は本発明によるパターン
形成法の説明に供する曲線図、第５図は本発明に
よるパターン形成法による場合の第１図Ｄに示す
工程に於ける略線的断面図である。
図中、１は基板、２はステンシル層、３，４及
び６は層、４′は不要層、６′，６″，６は残査
物である。
1A to 1D are schematic cross-sectional views of the sequential steps of the fundamental pattern forming method that is the basis of the pattern forming method according to the present invention, and FIG. 2 corresponds to the step of FIG. 1 C. FIG. 3 is a schematic cross-sectional view of an actual process corresponding to the process of FIG. 1D when a conventional pattern forming method is used; FIG. 5 is a curve diagram for explaining the pattern forming method according to the present invention, and FIG. 5 is a schematic cross-sectional view in the step shown in FIG. 1D when the pattern forming method according to the present invention is used. In the figure, 1 is a substrate, 2 is a stencil layer, 3, 4, and 6 are layers, 4' is an unnecessary layer, and 6', 6'', and 6 are residues.
Claims (1)
ンシル層を形成する第１の工程と、上記基板上の
上記ステンシル層の形成されていない領域上に所
要の第１の層を、上記ステンシル層上の第２の層
の形成を伴なつて形成する第２の工程と、上記ス
テンシル層を溶去することによつて、当該ステン
シル層を上記基板上より除去すると共にこれに伴
い上記第２の層を除去する第３の工程とを含ん
で、上記第１の層による所望のパターンを形成す
るパターン形成法に於て、 上記第２の工程が、上記ステンシル層をその溶
媒中に浸漬せしめた状態で、上記ステンシル層に
80〜200kHzの周波数を有する超音波の振動を与
える処理を含む事を特徴とするパターン形成法。[Claims] 1. A first step of forming a stencil layer having a desired pattern on a desired substrate, and forming a desired first layer on a region of the substrate where the stencil layer is not formed. , a second step of forming a second layer on the stencil layer, and removing the stencil layer from the substrate by dissolving the stencil layer; and a third step of removing the second layer, in which the second step removes the stencil layer in its solvent. onto the above stencil layer while immersed in
A pattern forming method characterized by including a process of applying ultrasonic vibrations having a frequency of 80 to 200 kHz.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15546781A JPS5856424A (en) | 1981-09-30 | 1981-09-30 | Formation of pattern |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15546781A JPS5856424A (en) | 1981-09-30 | 1981-09-30 | Formation of pattern |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5856424A JPS5856424A (en) | 1983-04-04 |
| JPH0119257B2 true JPH0119257B2 (en) | 1989-04-11 |
Family
ID=15606683
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15546781A Granted JPS5856424A (en) | 1981-09-30 | 1981-09-30 | Formation of pattern |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5856424A (en) |
-
1981
- 1981-09-30 JP JP15546781A patent/JPS5856424A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5856424A (en) | 1983-04-04 |
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