JPH01191548A - Frequency detection type demodulation circuit - Google Patents

Abstract

PURPOSE:To quicken a leading response time and to avoid mis-demodulation of data by devising a differential integration device in a way of its integration time is made switchable by an external control signal and erasing a difference between a DC component of a signal obtained through the frequency detection and a reference voltage in a short period. CONSTITUTION:The differential integration device 2 is provided, which applies time integration to a difference between a detection output signal VE of a frequency detector 1 and a reference voltage VS, subtracts the DC voltage obtained from the detection output signal VE to obtain an output voltage VN of the differential integration device 2. The voltage is inverted by a polarity inverter 3 to obtain an output voltage VD, which is fed to an adder 4. Since an eye pattern VE is fed to the adder 4, the output voltage VF of the adder 4 has a waveform whose component only is changed. Then it is possible to correct the deviation of the DC component of the eye pattern in a short period by varying the voltage of the external setting signal VT to decrease the integration time of the differential integration device 2 at the leading. Thus, the demodulation circuit with fast leading is obtained and mis-demodulation is avoided.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a frequency detection demodulation circuit used for reproducing data in a GMSK system receiver, which is one of the data transmission systems in mobile communications, for example. It is something.

[Conventional technology]

This type of conventional circuit is configured to discriminate data by comparing a detection output signal (eye pattern) VE generated at the output of a frequency detector with a discrimination reference voltage vS. That is, as shown in FIG. 4, in order to eliminate the deviation of the DC component of the eye pattern WE that occurs when the transmitting frequency or receiving local frequency deviates from the center value, a A capacitor CO is inserted in series. This capacitor CO has a low impedance for low frequency components of data.
It is necessary to have a large capacitance.

[Problem that the invention seeks to solve]

If the capacitance is reduced, data may be erroneously demodulated. On the other hand, increasing the capacitance improves erroneous demodulation of data, but has the drawbacks of slow startup after power-on and slow response speed when the transmission frequency changes. In order to eliminate this drawback, the present invention provides a frequency detection type demodulation circuit which does not use the above-mentioned series capacitor, has a fast rise response time, and is free from erroneous demodulation of data.

[Means for solving problems]

The present invention for solving the above problems will be explained with reference to FIG. 1 corresponding to an embodiment.

As shown in the figure, the frequency detection type demodulation circuit for data transmission to which the present invention is applied includes a frequency detector 1 that frequency-detects a GMSK signal obtained by frequency-modulating a high-frequency signal using signal data; The detection output signal VE
A difference integrator 2 that time-integrates the difference between the difference between the difference integrator 2 and the reference voltage S, a polarity inverter 3 that inverts the polarity of the output voltage VN of the difference integrator 2, and a frequency detector 1 as described above for the output vn of the polarity inverter 3. It has an adder 4 which adds the output signal VE of , and a data discriminator 5 which inputs the output of the adder 4 and discriminates data. The differential integrator 2 receives an external control signal V.
The integration time can be changed by T.

[Effect]

Detection output signal VE obtained by frequency detection and reference voltage■
By time-integrating the difference with S and subtracting the resulting DC voltage from the detection output signal VE, the deviation in the DC component of the detection output signal VE is corrected, and further by shortening the integration time at the rise time, Startup response becomes faster. In other words, the DC component of the detection output signal VE and the reference voltage V
It becomes possible to eliminate the difference with S in a short time.

〔Example〕

The present invention will be explained in detail below.

FIG. 1 is a block diagram showing the overall configuration of an embodiment of a frequency detection type demodulation circuit to which the present invention is applied.

In the figure, 1 is a frequency detector, 2 is a differential integrator, 3 is a polarity inverter, 4 is an adder, and 5 is a data discriminator. VE is the eye pattern which is the detection output signal of frequency detector 1, vS
is the reference voltage, VN is the output voltage of the differential integrator 2, VD is the output voltage of the polarity inverter 3, and VF is the output voltage of the adder. VT is an external setting signal that switches the integration time.

FIG. 2 is a graph showing the voltage state of each part shown in FIG. 1. The DC component of the eye pattern VE is the reference voltage vS
The figure shows the case where the value is higher than . Now, difference integrator 2
This is the integration time of VT, and is switched by the setting signal VT.

The operation of the circuit block in FIG. 1 will be explained with reference to the graph in FIG. 2. As shown in Fig. 2, when the DC component of the eye pattern VE deviates to the higher side than the reference voltage appears as the output voltage VN of the differential integrator 2. Therefore, the output voltage VN becomes a voltage whose asymptote is the DC component of the eye pattern vE. This is inverted by the polarity inverter 3 and becomes the output voltage VD, and the adder 4
join. On the other hand, the eye pattern VE is added to the adder 4. Therefore, the output voltage VF of the adder 4 has a waveform in which only the DC component is changed so that the DC component of the eye pattern VE matches the reference voltage vS.

At the time of rising, by changing the voltage of the setting signal VT from the outside and reducing the integration time τ of the differential integrator 2, the change in the output voltage VN of the differential integrator 3!2 can be made faster. Therefore, it becomes possible to correct the deviation of the DC component of the eye pattern in a short time.

FIG. 3 is a circuit diagram of an example embodying the block diagram of the overall configuration shown in FIG. 1. In the circuit shown in the same figure, SL and S2 are analog switches that open and close using external setting signals VT, and R
1, RIP, R2, R3 are resistors, C is capacitor, IC
l, ic2 are differential amplifiers. The differential integrator 2 shown in FIG.
and an inverter 3. Resistor R2, resistor R3
, and a differential amplifier IC2 constitute the adder 4 shown in FIG.

When analog switches Sl and S2 are open, the integration time constant is determined by resistor R1 and capacitor C. Setting signal V
When T is input and switch Sl, 32 is closed, resistor RIF
and resistor R1 are connected in parallel, so the integration time constant becomes small and the integration time can be shortened.

In the example shown in Figure 3, the integral time constant is changed by changing the combined resistance value by connecting resistors in parallel, but in addition to this,
Even in the case of a circuit that uses a switched capacitor to create an equivalent resistance, the equivalent resistance may be changed by changing the clock frequency that controls the switched capacitor.
It is also possible to perform this using a digital control circuit.

〔Effect of the invention〕

As explained above, the frequency detection type demodulation circuit to which the present invention is applied can correct the difference between the DC component of the detection output signal and the reference voltage between short poems, thereby eliminating the influence of changes in the transmitting station wave number and receiving local frequency. A demodulation circuit that can be erased and has a fast rise can be realized, there is no erroneous demodulation of data, and there is no shift in the DC component in the input signal of the data discriminator, so the configuration of the data discriminator is facilitated. Furthermore, the frequency detection demodulation circuit of the present invention can be implemented in any demodulation circuit that uses frequency detection.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of main parts of an embodiment of a frequency detection demodulation circuit to which the present invention is applied, FIG. 2 is a diagram showing the voltage state of each part of the block diagram, and FIG. 3 is a block diagram of the block diagram shown in FIG. 1. FIG. 4 is a block diagram of a main part of a conventional frequency detection type demodulation circuit. 191 Frequency Detector 251. Differential integral base 39. Polarity inverter 430. Adder 5. 1. Data discriminator VE, Eye pattern VS, Reference voltage VN, VD, VF, Output voltage V
T, ,,,integration time switching signal S1. S2. , analog switch R1, RIP,
R2, R3, . . . Resistors Co, C... Capacitors icl, ic2. --9 Differential amplifier patent applicant Hiki Musen Co., Ltd. Agent Patent attorney Yoshio Komiya Figure 1 Figure 2 Figure 3

Claims (1)

[Claims] 1. A frequency detector that detects the frequency of a high-frequency signal frequency-modulated by signal data, a difference integrator that time-integrates the difference between the detection output signal of the frequency detector and a reference voltage, and a polarity of the output voltage of the difference integrator. It has a polarity inverter that inverts, an adder that adds the above-mentioned detection output signal to the output of the polarity inverter, and a data discriminator that inputs the output of the adder and discriminates data, and the difference integrator is connected to an external A frequency detection type demodulation circuit characterized in that the integration time can be changed by a control signal from the frequency detection type demodulation circuit, and the difference between the DC component of the signal obtained by frequency detection and the reference voltage can be erased in a short time.