JPH01184954A - Solid-state image sensing device - Google Patents

Solid-state image sensing device

Info

Publication number
JPH01184954A
JPH01184954A JP63010393A JP1039388A JPH01184954A JP H01184954 A JPH01184954 A JP H01184954A JP 63010393 A JP63010393 A JP 63010393A JP 1039388 A JP1039388 A JP 1039388A JP H01184954 A JPH01184954 A JP H01184954A
Authority
JP
Japan
Prior art keywords
photoelectric conversion
tft
solid
scanning circuit
amount
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63010393A
Other languages
Japanese (ja)
Inventor
Masabumi Kunii
正文 国井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP63010393A priority Critical patent/JPH01184954A/en
Publication of JPH01184954A publication Critical patent/JPH01184954A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To form a high-sensitivity contact type image sensor in low cost by a method wherein a means for amplifying a signal from a photoelectric conversion element is provided in every photoelectric conversion element and all of the photoelectric conversion elements, a scanning circuit and the amplifying means are formed on the same insulating substrate. CONSTITUTION:All of photoelectric conversion elements, a scanning circuit and amplifying means are formed on the same insulating, substrate. When light is emitted to a photodiode 104, a charge stored in this photodiode is discharged according to the amount of incident light. That is, when the amount of incident light is little, a voltage, which is applied to a gate of a thin film transistor TFT 102 for amplification, is high and reversely, when the amount of incident light is much, the gate voltage of the TFT transistor 102 is reduced. The signal output of the diode 104 is amplified through this TFT 102. The amplified signal is outputted to a video line 105 by the scanning circuit 100 through a TFT 101. Hereinafter, the operation similar to the above is conducted in every pixel and a read of the amount of one line is finished by one time of scanning.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は1、増幅型固体5&像装置に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to 1. an amplifying solid state 5 & imaging device;

〔従来の技術〕[Conventional technology]

一次元密行イメージセンナは原稿と同一サイズのセンナ
長を持つので、ファクシミリやイメージスキャナの小型
化、低価格化に大きく寄与する。
Since the one-dimensional covert image sensor has a sensor length that is the same size as the document, it greatly contributes to miniaturization and cost reduction of facsimiles and image scanners.

このため、近年その開発が活発化している。テレビジョ
ン学会技術報告V o 1.10 、N o−22ED
983に示すように、光電変換素子と、これを駆動する
走査回路とを同一の石英基板上に集積化した密着イメー
ジセンナが開発・実用化されている。
For this reason, its development has become active in recent years. Television Society Technical Report V o 1.10, No-22 ED
As shown in 983, a contact image sensor in which a photoelectric conversion element and a scanning circuit for driving the same are integrated on the same quartz substrate has been developed and put into practical use.

一方、固体撮像装置の高感度化を目的として、各画素ご
とに増幅機能を持たせた撮像索子が提察されてきている
。例えばテレビ全天3−4 (1986)に示すような
MOS型の撮像素子、IEEE  Trans、、  
 ED−33,8(1986)に示すようなSIT型の
撮像素子等がある。
On the other hand, with the aim of increasing the sensitivity of solid-state imaging devices, imaging probes in which each pixel is provided with an amplification function have been proposed. For example, a MOS type image sensor as shown in TV Zenten 3-4 (1986), IEEE Trans,
There are SIT type image pickup devices as shown in ED-33, 8 (1986).

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来例に示したようなMO3ffiの密着イメージセン
ナでは、センナの長尺化、高解像度化は比較的容易だが
、センナの出力信号が小さいため読取り速度を高速化す
ることが難しかった。また、従来からの増幅機能内蔵型
固体撮像装置では、単結晶のシリコンウェハ上に素子形
成をしているので、1チツプの長さが短く、センナの長
尺化を図ろうとすると、多数のチップを接続しな(では
ならず、センナの実装コストが高くつくという問題点を
有していた。
In the MO3ffi contact image sensor shown in the conventional example, it is relatively easy to increase the length of the sensor and increase the resolution, but it is difficult to increase the reading speed because the output signal of the sensor is small. In addition, in conventional solid-state imaging devices with built-in amplification functions, the elements are formed on single-crystal silicon wafers, so the length of one chip is short. However, there was a problem in that the Senna implementation cost was high.

本発明は、以上の問題点を解決するもので、その目的は
、低コストで高感度の密tUイメージセンナを提供する
ことにある。
The present invention solves the above problems, and its purpose is to provide a high-sensitivity dense tU image sensor at low cost.

〔課題を解決するための手段〕[Means to solve the problem]

本発明は、絶縁基板上に周期的に配列した複数の光電変
換素子と、前記光電変換素子を駆動する走査回路とを仔
する固体撮像装置において、前記光電変換素子からの信
号を増幅する手段を各光電変換素子ごとに備え、前記光
電変換素子、前記走査回路、前記増幅手段の全てを同一
の前記絶縁基板上に形成したことを特徴とする。
The present invention provides a solid-state imaging device that includes a plurality of photoelectric conversion elements arranged periodically on an insulating substrate and a scanning circuit that drives the photoelectric conversion elements, including means for amplifying signals from the photoelectric conversion elements. Each photoelectric conversion element is provided, and the photoelectric conversion element, the scanning circuit, and the amplifying means are all formed on the same insulating substrate.

〔作用〕 第3図に本発明の固体撮像装置の等価回路を示す。10
0が走査回路、101が薄膜トランジスタ(以下TET
)スイッチ、102が増幅用TFT1103がリセット
用TFT1104が7オト1ダイオード、105がビデ
オライン、106が遅延回路、200がビデオ出力端子
、201が正電圧印加端子、202がスタートパルス入
力端子である。図中、点線で回った部分が一画素分の等
価回路である。
[Operation] FIG. 3 shows an equivalent circuit of the solid-state imaging device of the present invention. 10
0 is a scanning circuit, 101 is a thin film transistor (hereinafter TET)
) switch, 102 is an amplification TFT 1103, reset TFT 1104 is a 7-to-1 diode, 105 is a video line, 106 is a delay circuit, 200 is a video output terminal, 201 is a positive voltage application terminal, and 202 is a start pulse input terminal. In the figure, the part surrounded by a dotted line is an equivalent circuit for one pixel.

以下に回路の動作を説明する。端子202にスタートパ
ルスを印加するとリセット用TPTIO3が出いてフォ
トダイオード104に端子201に印加された電圧v0
がかかる。この状態でフォトダイオードは逆バイアスさ
れており、フォトダイオードに電荷が蓄積された状態に
なっている。
The operation of the circuit will be explained below. When a start pulse is applied to the terminal 202, the reset TPTIO3 is output and the voltage v0 applied to the terminal 201 is applied to the photodiode 104.
It takes. In this state, the photodiode is reverse biased, and charges are accumulated in the photodiode.

フォトダイオードに光が入射すると、入射光量に応じて
フォトダイオードに蓄積された電荷がディスチャージさ
れる。即ち入射光量が少い時は増幅用TFT102のゲ
ートに印加される電圧が高く、逆に入射光量が多い時は
TFT102のゲート電圧は低(なる。このTFT10
2を通してフォトダイオードの信号出力が増幅されるこ
とになる。増幅された信号は走査回路100によりTF
Tlolを通してビデオライン105に出力される。以
下同様な動作が各画素毎に行なわれ、−回の走査で−ラ
イン分の読取りが終了する。
When light is incident on the photodiode, the charges accumulated in the photodiode are discharged according to the amount of incident light. That is, when the amount of incident light is small, the voltage applied to the gate of the amplifying TFT 102 is high, and conversely, when the amount of incident light is large, the gate voltage of the TFT 102 is low (this TFT 10
2, the signal output of the photodiode is amplified. The amplified signal is sent to the TF by the scanning circuit 100.
It is output to the video line 105 through Tlol. Similar operations are thereafter performed for each pixel, and reading for -line is completed in -times of scanning.

〔実施例〕〔Example〕

it図に本発明の固体撮像装置の断面図を示し、第2図
に本発明の固体撮像装置の作製工程図を示す。1が絶縁
基板、2がTPTスイッチ、3が増幅用TFT14が層
間絶縁膜、5が透明電極、6が光電変換素子、7が上部
電極及び配線材、8が保護膜である。
The it diagram shows a cross-sectional view of the solid-state imaging device of the invention, and FIG. 2 shows a manufacturing process diagram of the solid-state imaging device of the invention. 1 is an insulating substrate, 2 is a TPT switch, 3 is an amplification TFT 14 and an interlayer insulating film, 5 is a transparent electrode, 6 is a photoelectric conversion element, 7 is an upper electrode and wiring material, and 8 is a protective film.

以下に実施例を工程を追いながら説明する。まず絶縁基
板1上に減圧CVDで多結晶シリコン膜(以下poly
−3i)を1000〜2000人成膜する。この絶縁基
板はパイレックス7o59(商品名)でも溶融石英ガラ
スでも良いが、高性能のTPTを作成するには高温プロ
セスや使える石英基板が望ましい。次に基板上のpol
y−Siを所望のTPTバタンにフォトエツチングする
(第2図−(a))、この時のPo1y−3iがTPT
のチャネル部10となるものであり、第3図のTFTl
ol、102.103、及び走査回路を構成するTPT
を同時に作り込む。第1.2図ではこのうちTPTスイ
ッチ2と増幅用TFT3の2個だけ描いである。このP
o1y−3iの表面を熱酸化してゲート酸化膜11を形
成し、この上にゲート電極12となるpo I y−3
iを約5000人形成する。上部poly−3iにリン
を熱拡散させゲート電極の抵抗を下げる。ゲート電極1
2の形にpo ] y−3iをバクニングする。この状
態でB+イオンをイオン打込によりチャネル部10に打
込みPチャネル部を形成し、次いでPチャネル部20に
マスキングしてP+イオンをイオン打込してNチャネル
を形成する(第2図−b)6 、こうして形成したTPTの上部に居間絶縁膜のNSG
を約8000人CVD法で成膜する。次いで光電変換部
(画素部)の形成に移る。画素部の下部電極となる透明
電極をスパッタで約2000人形成し、所望のパタンに
パタニングする。本実施例では透明電極にITO(In
dium−Tin−Oxide)膜を用いたが、SnO
*膜でも良い(*2図−(C))。この透明電極の上に
光電変換素子となる非晶質シリコンをプラズマCVDで
約1μm形成し、画素のパタ/にパタニングする。次い
でTPTのコンタクトホー、ルをあける(第2図−(d
))。次に画素部の上部電極となるAJ2−8i−Cu
を約7000人スパッタし、所望のパタンに形成する。
Examples will be explained below, following the steps. First, a polycrystalline silicon film (hereinafter referred to as polycrystalline silicon) is deposited on an insulating substrate 1 by low pressure CVD.
-3i) is deposited by 1000 to 2000 people. This insulating substrate may be made of Pyrex 7o59 (trade name) or fused silica glass, but in order to create a high-performance TPT, a quartz substrate that can be used in a high-temperature process is desirable. Next, pol on the board
y-Si is photo-etched into the desired TPT pattern (Fig. 2-(a)). At this time, Po1y-3i is TPT.
This is the channel section 10 of the TFTl shown in FIG.
ol, 102, 103, and TPT that constitutes the scanning circuit
Create at the same time. In FIG. 1.2, only two of these, the TPT switch 2 and the amplifying TFT 3, are depicted. This P
The surface of o1y-3i is thermally oxidized to form a gate oxide film 11, and po Iy-3, which will become the gate electrode 12, is formed on this.
About 5,000 people will form i. Phosphorus is thermally diffused into the upper poly-3i to lower the resistance of the gate electrode. Gate electrode 1
Baking po]y-3i into the form of 2. In this state, B+ ions are implanted into the channel section 10 to form a P channel section, and then P+ ions are implanted into the P channel section 20 with masking to form an N channel (Fig. 2-b). )6, the NSG of the living room insulating film is placed on top of the TPT thus formed.
Approximately 8,000 people will form a film using the CVD method. Next, the process moves on to forming a photoelectric conversion section (pixel section). Approximately 2,000 transparent electrodes, which will become the lower electrodes of the pixel portion, are formed by sputtering and patterned into a desired pattern. In this example, the transparent electrode is made of ITO (In
dium-Tin-Oxide) film was used, but SnO
*A membrane may also be used (*Figure 2-(C)). On this transparent electrode, amorphous silicon that will become a photoelectric conversion element is formed to a thickness of about 1 μm by plasma CVD, and patterned into a pixel pattern. Next, open the TPT contact hole (Fig. 2-(d)
)). Next, AJ2-8i-Cu becomes the upper electrode of the pixel part.
Approximately 7,000 people are sputtering to form a desired pattern.

この時TPTの配線も同時に行う。最後に保護膜となる
を横系ポリイミド膜(フォトニース(商品名)等)を約
1μmスピンコードし、220’ CのN、ガス中でキ
ュアすれば、固体撮像装置のチップが完成する(第2図
−(e))。
At this time, TPT wiring is also done at the same time. Finally, a horizontal polyimide film (such as Photonice (trade name)) that will serve as a protective film is spin-coded to a thickness of approximately 1 μm, and cured in 220'C N gas to complete the solid-state imaging device chip. Figure 2-(e)).

本実施例ではTPTの材料にpoly−3iを用いたが
、第2図−(a)のpoly−3iを成膜した(パタニ
ング前)の段階で、例えばレーザーアニーリングや同相
エピタキシャル成長等の手段を用いてpoly−31を
単結晶化し、TFTを高性能化することが可能である。
In this example, poly-3i was used as the TPT material, but at the stage of poly-3i film formation (before patterning) in Figure 2-(a), means such as laser annealing or in-phase epitaxial growth were used. It is possible to single-crystallize poly-31 and improve the performance of TFTs.

特に増幅用のTFT102 (第3図)の性能のみ高性
能化が要求されるような場合、レーザーアニーリングで
は、基板上でTPT’102が位置する場所だけにレー
ザー照射すれば良く、スループットを上げることもでき
る。また、第2図−(C)のITOスバフタ前の段階で
TPTにH,プラズマをかけることにより、P o 1
 y −S iの界面準位を低減させ、電子易動度を上
げることによりTPTの高性能化をはかることも可能で
ある。また場合によっては第2図−(a)のpoly−
3tの代わりに、プラズマCVOによる非晶質5isS
i−Ge1等でもよい。
In particular, when high performance is required only for the amplification TFT 102 (Figure 3), laser annealing only needs to irradiate the area where the TPT' 102 is located on the substrate, increasing throughput. You can also do it. In addition, by applying H and plasma to the TPT at a stage before the ITO buffing in FIG. 2-(C), P o 1
It is also possible to improve the performance of TPT by reducing the interface state of y-S i and increasing electron mobility. In some cases, the poly-
Amorphous 5isS by plasma CVO instead of 3t
i-Ge1 etc. may also be used.

また第3図における回路例では信号増幅素子にFETを
用いていたが、回路構成は異なるが増幅素子に薄膜で構
成したバイポーラトランジスタや静m誘導トランジスタ
(SIT)等を用いるととももちろん可能である。更に
第8図では信号増幅はFET−段のみで行なっているが
、ゲインを更に高めたい場合は回路を多段増幅構成にす
るとともできる。この場合も、必要な全てのトランジス
タを薄膜化して同一基板上に集積すれば、工程は従来の
増幅機能を持たない密着型イメージセンナと全く同一で
済み、かつ、増幅素子、走査回路ともに光電変換素子に
近接して集積化されているので、SZN比を高く取れる
という利点もある。
Furthermore, in the circuit example shown in Fig. 3, an FET is used as the signal amplification element, but it is of course possible to use a thin-film bipolar transistor, static induction transistor (SIT), etc. as the amplification element, although the circuit configuration is different. . Further, in FIG. 8, signal amplification is performed only by FET-stages, but if it is desired to further increase the gain, the circuit can be configured to have a multi-stage amplification structure. In this case as well, if all the necessary transistors are made into thin films and integrated on the same substrate, the process can be exactly the same as that for conventional contact type image sensors that do not have an amplification function, and both the amplification element and the scanning circuit can be used for photoelectric conversion. Since it is integrated close to the element, it also has the advantage of achieving a high SZN ratio.

本実施例で示した固体撮像装置は、増幅機能を持たない
固体撮像装置に比べると100倍以上の信号出力が得ら
れている。
The solid-state imaging device shown in this embodiment has a signal output that is 100 times or more greater than that of a solid-state imaging device that does not have an amplification function.

〔発明の効果〕 以上に示したように、本発明によれば、外部の増幅手段
を用いずとも本質的に大出力電流を取り出すことのでき
る密着型イメージセンナを実現できる。今後、密着型イ
メージセンナの高速化身高解像化が進むと、蓄積時間が
短縮し、画素面積が更に微細になり、画素から直接取り
出せる出力電流は小さくなっていく。こうした傾向を考
えると、本質的に大出力が取り出せる本発明の固体撮像
装置の効果は極めて大きい。
[Effects of the Invention] As described above, according to the present invention, it is possible to realize a close-contact image sensor that can essentially extract a large output current without using an external amplification means. In the future, as contact image sensors become faster and higher in resolution, the storage time will become shorter, the pixel area will become even finer, and the output current that can be extracted directly from the pixels will become smaller. Considering these trends, the effect of the solid-state imaging device of the present invention, which can essentially produce a large output, is extremely large.

また、工程的には全ての工程を薄膜プロセスで行うこと
ができるため、フォトマスクの変更だけで従来の密着イ
メージヤ/fと同一の工程で作製することができ、セン
ナの長尺化も容易である。
In addition, since all processes can be performed using thin film processes, it can be manufactured in the same process as the conventional contact imager/f by simply changing the photomask, and it is easy to lengthen the senna. It is.

このため、増幅機能が付与されていながら従来の密着イ
メ゛−ジセ/すと同様の低コストで作製することができ
る。
Therefore, although it is provided with an amplification function, it can be manufactured at the same low cost as conventional contact imagers.

このように、本発明により低コストで高機能の固体撮像
装置を実現でき、発明の効果は絶大なものがある。
As described above, the present invention makes it possible to realize a high-performance solid-state imaging device at low cost, and the effects of the invention are tremendous.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の固体撮像装置の断面図。 第2図(a)〜(e)は本発明の固体撮像装置のイ乍製
工程図。 第3図は本発明の固体撮像装置の等価回路図。 1・・・絶縁基板 2・・・TPTスイッチ 3・・・増幅用TPT 4・・・層間絶縁膜 5・・・透明電極 6・・・光電変換素子 7・・・上部電極及び配線材 8・・・保護膜 10・・・TPTチャネル部 11・・・ゲート絶縁膜 12・・・ゲート絶縁膜 13・・・コンタクトホール 20・・・ソース(ドレイン)部 100・・・走査回路 101・・・TPTスイッチ 102・・・増幅用TPT 103・・・リセット用TPT 104・・・フォトダイオード 105・・・ビデオライン 106・・・遅延回路 200・・・ビデオ出力端子 201・・・正電圧印加端子 202・・・スタートパルス入力端子 量  上 出願人 セイコーエブンン株式会社 ノ 、 ノl:?Jヒ14 裁 第1図
FIG. 1 is a sectional view of the solid-state imaging device of the present invention. FIGS. 2(a) to 2(e) are process diagrams for manufacturing the solid-state imaging device of the present invention. FIG. 3 is an equivalent circuit diagram of the solid-state imaging device of the present invention. 1... Insulating substrate 2... TPT switch 3... TPT for amplification 4... Interlayer insulating film 5... Transparent electrode 6... Photoelectric conversion element 7... Upper electrode and wiring material 8. ...Protective film 10...TPT channel part 11...Gate insulating film 12...Gate insulating film 13...Contact hole 20...Source (drain) part 100...Scanning circuit 101... TPT switch 102... TPT for amplification 103... TPT for reset 104... Photodiode 105... Video line 106... Delay circuit 200... Video output terminal 201... Positive voltage application terminal 202 ...Start pulse input terminal amount Applicant Seiko Even Co., Ltd., Nol:? J Hi 14 Judgment Figure 1

Claims (2)

【特許請求の範囲】[Claims] (1)絶縁基板上に周期的に配列した複数の光電変換素
子と、前記光電変換素子を駆動する走査回路とを有する
固体撮像装置において、前記光電変換素子からの信号を
増幅する手段を各光電変換素子ごとに備え、前記光電変
換素子、前記走査回路、前記増幅手段の全てを同一の前
記絶縁基板上に形成したことを特徴とする固体撮像装置
(1) In a solid-state imaging device having a plurality of photoelectric conversion elements arranged periodically on an insulating substrate and a scanning circuit for driving the photoelectric conversion elements, each photoelectric conversion element has a means for amplifying a signal from the photoelectric conversion elements. A solid-state imaging device characterized in that each conversion element is provided, and the photoelectric conversion element, the scanning circuit, and the amplification means are all formed on the same insulating substrate.
(2)前記光電変換素子、前記走査回路、前記増幅手段
を全て薄膜材料で形成したことを特徴とする特許請求の
範囲第1項記載の固体撮像装置。
(2) The solid-state imaging device according to claim 1, wherein the photoelectric conversion element, the scanning circuit, and the amplification means are all formed of a thin film material.
JP63010393A 1988-01-20 1988-01-20 Solid-state image sensing device Pending JPH01184954A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63010393A JPH01184954A (en) 1988-01-20 1988-01-20 Solid-state image sensing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63010393A JPH01184954A (en) 1988-01-20 1988-01-20 Solid-state image sensing device

Publications (1)

Publication Number Publication Date
JPH01184954A true JPH01184954A (en) 1989-07-24

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0825763A2 (en) * 1996-08-20 1998-02-25 Xerox Corporation High sensitivity image sensor arrays
JP2013093872A (en) * 2012-12-19 2013-05-16 Semiconductor Energy Lab Co Ltd Semiconductor device, x-ray camera, and electronic equipment
US8743250B2 (en) 2000-04-12 2014-06-03 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of driving the same
US9712770B2 (en) 2015-04-24 2017-07-18 Nlt Technologies, Ltd. Image sensor

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0825763A2 (en) * 1996-08-20 1998-02-25 Xerox Corporation High sensitivity image sensor arrays
EP0825763A3 (en) * 1996-08-20 2001-05-02 Xerox Corporation High sensitivity image sensor arrays
US8743250B2 (en) 2000-04-12 2014-06-03 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of driving the same
US9019408B2 (en) 2000-04-12 2015-04-28 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of driving the same
US9274236B2 (en) 2000-04-12 2016-03-01 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of driving the same
US9568615B2 (en) 2000-04-12 2017-02-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of driving the same
JP2013093872A (en) * 2012-12-19 2013-05-16 Semiconductor Energy Lab Co Ltd Semiconductor device, x-ray camera, and electronic equipment
US9712770B2 (en) 2015-04-24 2017-07-18 Nlt Technologies, Ltd. Image sensor

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