JPH01184144A - Image recording apparatus - Google Patents

Abstract

PURPOSE:To effectively utilize a memory, by making it possible to divide a page memory in a depth direction and performing the allotment to the arbitrary bit plane of a page memory corresponding to the depth of the pattern formed by a translation part developing page describing language (PDL) into a pattern. CONSTITUTION:The image data of a bit map system formed in a translation part 3 is written in a page memory 5 having the depth corresponding to the reproduction capacity of a recording part through a memory controller 8. For example, when the recording part has the expression capacity of 256 gradations based on each of R, G and B, the page memory 5 has 24 planes in total at a unit of 8 bits. When the number of the colors used in the image formed in the translation part 3 are 256, data of a 8-bit length may be used in order to express all of said colors by code and, therefore, this image is converted to a 8-bit color code by the memory controller 8 and arbitrary 8 bit planes of the page memory 5 are selected to be written. Therefore, the total capacity of the page memory 5 may be limited to 1/3.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to an image storage device, and particularly to an image storage device suitable for use with an image forming device.

<Prior Art> In recent years, page printers such as laser beam printers have become widespread, and a page description language (PDL) that can express images such as various characters and figures is known.

When printing various patterns expressed in such a PDL using a printer, the PDL is first developed as a pattern on, for example, a bit plane (page memory), and the bit planes are sequentially read out and printed.

On the other hand, multilevel printers that can handle multi-tone natural color images and color images such as photographic images are also known.

<Problems to be Solved by the Invention> It is desirable for the above-mentioned multivalue printer to have a memory whose number of bits in the depth direction corresponds to its gradation reproducibility and color reproducibility. For example, if the printer has gradation reproducibility of 256 gradations for each color of RlG and B, each pixel 1
It is desirable to have a memory with a depth of 8 bits for each color and 24 bits for the three colors total.

However, when supporting the above-mentioned PDL, the types of colors used are often limited.

For example, when targeting characters and figures, the number of colors used is at most 6 to 32 (which can be expressed with 4 to 5 bits). Expanding the value onto the memory for the printer has problems from the point of view of its utilization efficiency.

Such problems are not necessarily limited to images expressed in PDL, but similarly occur when dealing with images encoded and expressed in other formats, for example, other compression methods.

It is an object of the present invention to solve this problem and to make effective use of memory.

<Means for Solving the Problems> In order to achieve the above-mentioned object, the present invention provides an image memory having a predetermined number of bit planes in the depth direction, each pixel data having a predetermined number of bits smaller than the predetermined number. and means for selecting an arbitrary plane of the bit planes and storing it in the memory when storing the code data in the image memory.

Function> In the above configuration, the storing means selects an arbitrary plane of the bit planes and stores the code data.

<Embodiment> In the embodiment of the present invention described below, the page memory is divided according to the number of colors used, and image information for one or more pages can be developed in the page memory. Although the present invention is intended to make effective use of memory, it goes without saying that the present invention is not limited to division according to the number of colors.

Specifically, the page memory can be divided in the depth direction, and the page memory can be allocated to any bit plane of the page memory according to the depth of the pattern generated by the translation unit that develops the page description language (PDL) into patterns. This is how it was done.

The present invention will be explained in detail below using the drawings.

FIGS. 1, 3, 4, and 5 are block diagrams illustrating the configuration of an embodiment of the present invention.

FIG. 1 is a block diagram showing the overall configuration. In FIG. 1, 1 is a host computer, and image information written in a page description language is transferred from the host computer 1 to the communication section 2 of the printer. It is then sent to the translation section 3 via the translation section 3.

The host computer 1 and the communication section 2 are connected through a standard interface such as GP-IB or 5CRS. The page description language sent to the translation department 3 is
sequentially decoded by an upper microprocessor (not shown). Adobe as a representative page description language
There is Po5tScript developed by e company,
Its specifications are (Adobe Systems Inc.
, :Po5tScript Languaga
:Reference Manual, Addis
on-Wesley, 1985), (Adobe Sys
tem Inc,: Postscript Language
age:Tutorial and Cookbook
, Addison-Wesley, 1985), (Page Description Language PDLI, published by East Co., Ltd.). The memory controller 8 develops this result in the page memory 5.

That is, the page memory 5 has a capacity of 8 bits in the depth direction,
The controller 8 performs control for managing each bit plane. That is, the bitmap format image information generated by the translation section 3 is written via the memory controller 8 into the page memory 5 having a depth corresponding to the reproduction ability of the recording section 7. However, the number of gradations and colors used in one page of image information generated by the recording unit 7
If the number of bits is limited, the image signal is converted into a color code with a corresponding number of bits, and information is written using only the plane with that number of bits. When outputting, the color code is decoded, the image signal is reproduced, and the image is output. For example, if the recording section 7 has the ability to express 256 gradations in terms of R, G, and B, the page memory 5 will have a total of 24 planes each with 8 bits. On the other hand, if the number of colors used in the image generated by the translation unit 3 is 256, in order to represent all the colors, 8-bit length data is sufficient when expressed as a code, so the memory controller 8 uses this code. The image is converted into an 8-bit color code, and arbitrary 8 bit planes in the page memory 5 are selected and written. In other words, since only 1/3 of the total capacity of the page memory 5 is used, three pages of images of the same format can be stored simultaneously.

FIG. 3 is a diagram showing the detailed configuration of this memory controller 8. The microcomputer (microcomputer) 20 not only controls each bit plane 27-0 to 27-23 of the memory section but also communicates with the translation section 3 in order to obtain information that serves as a reference for the control. As a result, the number of colors used within the page is known, and each part is controlled based on this.

First, the image signals R, G, and B of 8 bits each for each pixel inputted to the memory controller 8 are converted into a color code corresponding to the number of colors by the color coder 25, and each pixel is converted into a color code of an arbitrary bit length. be done.

Color coder 25 is a kind of lookup table (LU
T), which are prepared depending on the type of bit length to be converted. The microcomputer 20 gives this instruction to the code length register 23 based on the bit length instruction data obtained through communication with the translation section 3. Each bit of the color code in which each pixel has a predetermined bit length corresponds to each bit plane 27-0 of the page memory.
.about.27-23 are allocated to the number of bit planes corresponding to the bit length. This allocation is performed by data selectors 26-0 to 26- arranged for each bit plane.
It will be held on the 23rd. FIG. 4 shows each data selector 26-o
26-23 is a detailed diagram showing the configuration of FIG. The same color code is manually input to all data selectors 26-o to 26-23, and each selector separately receives a color code of a predetermined bit length according to an instruction from the microcomputer 20, and in the configuration shown in FIG. Select one bit of the color code, or select none of the bits. This is done by latching instruction data from the microcomputer into the register 40, and inputting this data as a gate signal to the AND circuits 41-0 to 41-9 and the output circuits corresponding to the bits of each color code.
This is realized by the R circuit 42. In this embodiment, the capacity of the register 4o is 10 bits in accordance with the bit length of the color code. In other words, only the bit corresponding to the gate signal is set to '1', and all other parts are set to '1'.
Data such as "0" may be given to the register 40. If that plane is not used then all °
Data "0" is written to the register 40. Data is written to the register 40 by synchronizing the address of the microcomputer with a strobe signal generated by the strobe decoder 22. This strobe signal is decoded by the strobe decoder 22. In addition, in this embodiment, a maximum length of 10 bits is considered as a color code, but this is due to the length between the output signal line of the register 4° and the AND circuit 41.
Therefore, by appropriately selecting this number depending on the application, a configuration suitable for a color code with an arbitrary maximum bit length can be obtained. Also, in the data selector,
A memory plane enable signal En is generated. This is obtained by calculating the gate signal of the register 4o in the NOR circuit 43. In other words, if the corresponding bit plane is selected, one of the gate signals is
”.

Therefore, the negative logic enable signal En becomes active at "O", and conversely, if no writing is performed on that plane, all gate signals become "0", and the enable signal E
n becomes "1".

In this way, the image data is converted into a color code of an arbitrary code length and stored in the corresponding bit plane. The microcomputer 20 calculates actual coordinates from the position information obtained through communication with the translation section 3, and the addresses are given to each plane via the address selector 21 via the address bus. In this embodiment, the microcomputer 20 of the memory controller provides the address, but this function may be included in the translation section 3 and the memory address signal may be provided as coordinate data in synchronization with the image data.

Now, regarding reading from the bit plane memory 27-O to 2-Fu 23, first, the address signal is a rask address signal AR synchronized with the recording section from the printer driver, which is switched to the address bus of the microcomputer by the address selector 21, and the memory given to each plane. The read data reproduces the color code by selecting only the data from the corresponding plane using the plane selectors 28-0 to 28-9. Plane selector 28-〇~2
8-9 correspond to each bit of the color code, and the number of pits in the maximum length of the color code is required. In this embodiment, since the color code is 10 bits, the plane selector 28 has 10 bits.
Provided. Each plane selector 28-O~28-
9 is shown in detail in FIG. Similar to the data selector, data given to the register 50 by the microcomputer 20 is input as a gate signal to an AND circuit 51 and an OR circuit 52, and one of plane data 0 to 23 is selected. In other words, in the data given to the register 50, only the bit corresponding to the plane to be selected is 1°°, and all other bits are 0". In this way, the data is reproduced and the color code is 1, palette R29, palette G30, palette It is converted into the R2O, B signal by the three glues U and T of B31.A signal indicating a predetermined code length for each pixel, similar to the color coder 25, is input to each palette LUT, and a conversion prepared for each code length is input. Switching tables.

Note that natural images expressed with 8 bits each for R, G, and B can be dealt with by setting the maximum color code length to 24, but this is not efficient because the hardware becomes large. Therefore, for natural images, it is better to separately prepare and switch paths in which the R, G, and B signals are directly input/output to the memory.

To do this, place the CPU2 in the position indicated by the dotted line in Figure 3.
Each pixel may be provided with a switching circuit that outputs data as shown by arrows in the figure in response to a signal indicating whether the pixel is a natural pixel starting from 0 or not.

[Other Examples]

FIG. 6 shows a second embodiment, which is an application example of the first embodiment.

By dividing the page memory in the depth direction, when one page or more of image data is stored in the memory, the image data is combined and output when read out, making efficient memory use. The purpose is to measure.

As before, the page memory 5 in FIG.
It has a depth of 4 bits. Now 8 bits i.e. 25
Images expressed in 6 colors are planes 0 to 7 of page memory.
It is assumed that this is stored in planes 8 to 15. The output of the memory 5 is input to a composite plane selector 60 prepared for the maximum bits of the color code. Details of this composite plane selector 60 are shown in FIG. The difference between this composite plane selector 60 and the plane selector 28 in the first embodiment is that there are two registers for holding gate signals, register 162 and register 263. The AND circuit 6 is switched by the selector 64 based on the switching signal based on the
This is where the gate signal becomes No. 5. The register 162 has a bit corresponding to one of planes 0 to 7 as 1°, and the register 263 has a bit corresponding to one of planes 8 to 1.
By setting the bit corresponding to one of the 5 planes to 1'°, it is possible to switch between two images expressed in 256 colors using a switching signal.

This switching signal is a memory read address signal, that is, a signal synchronized with the recording section, and the composite signal generator 61
generated by. The designation of the synthesis area may be, for example, input by an operator using a digitizer or the like, direct designation from the host computer to the generation circuit 65, or description in a page description language and instructions from the translation unit.

The composite color code signals reproduced in this manner are converted into conversion table palettes R29, G30, . It is converted into 8-bit RlG, B signals by palette B31.

At this time, it is not necessary if the two image signals are the same or can be converted using U and T, but if the two images have different color codes, it is necessary to correspond to each, or prepare U and T as a switching signal. It is necessary to switch tables in synchronization with

In this way, it is possible to obtain an image in which two images are combined in an arbitrary area. Further, although this embodiment shows the combination of two images, this can be easily handled by increasing the number of bits of the switching signal and increasing the number of registers of the combination plane selector.

[Third Embodiment] Although the drawing numbers are different, FIG. 2 shows the configuration of the third embodiment.

This is because the switching signal for image composition in the second embodiment is stored in advance as a switching pattern using an empty plane of the page memory, and when the image is output, it is read out at the same time as the image signal to perform image composition. It features:

In FIG. 8, a control plane selector 70 is a block for selecting a plane in which a switching pattern is stored and outputting it as a switching signal.It has the same configuration as the plane selector in FIG. can be used as a control plane. In addition, the number of composite images can be increased by increasing the number of bits of the switching signal accordingly, so the control plane selector 70
It is sufficient to adopt a configuration using .

The advantages of this embodiment over the second embodiment are that the hardware configuration is simpler than the switching signal generator, and since the switching pattern is stored in a bit plane, it can be expressed in any form. Therefore, image synthesis of complex areas can be easily realized.

Although the three embodiments have been explained above, R, G, B
The conversion of each 8-bit pixel data into a color code having an arbitrary code length is realized using U and T, but it is also possible to have this in the translation unit 3. That is, when the color code is developed into a bitmap image, the color code may be simultaneously converted and developed into the memory controller as image data.

Furthermore, when programming images in a page description language on the host computer 1, adopting an expression format that expresses colors using color codes also eliminates the need for glue, U, and T for color code conversion. be able to.

As explained above, according to this embodiment, an image signal is converted into a color code with a number of bits corresponding to the number of colors used in a page, and is stored in a page memory using only planes corresponding to the number of bits. More than one page of images can be stored, allowing efficient use of page memory.

Furthermore, by combining two or more pages of image data stored in the page memory at the time of output, various composite images can be obtained without losing the original image.

Furthermore, by writing the synthesis instruction data into an empty plane of the page memory and using it as a synthesis signal when reading, it is possible not only to reduce the burden on the hardware but also to easily synthesize arbitrary areas.

In the embodiment of the present invention described above, the image memory having a predetermined number of bit planes in the depth direction is
Although the bit planes 27-0 to 27-23 shown in the figure are configured to support R, G, and B colors, the present invention may also be applied to a memory of a single color, for example, only R. Further, the means for supplying code data in which each pixel data has been converted into a predetermined number of bits smaller than the predetermined number is, for example, the color coder 25 shown in FIG. It may be provided internally. Furthermore, in the case of handling monochrome, it may be used as a backup table that only converts the gradation of input data.

Further, when storing the code data in the image memory, the means for selecting an arbitrary plane of the bit planes and storing it in the memory is, for example, data selectors 26-1 to 26-23 shown in FIG. , this does not necessarily have to be provided corresponding to each bit plane, and it may be possible to select a plurality of bit planes at once. This makes configuration easier.

<Effects of the Invention> As explained above, according to the present invention, memory can be used effectively, and with the same capacity of memory, more memory can be used. A block diagram of another embodiment of the present invention, FIG. 3 is a diagram showing details of the memory controller 8 shown in FIG. 1, and FIG. 4 is a diagram showing the data selectors 26-1 to 26 shown in FIG. 3.
-23; FIG. 5 is a block diagram showing the configuration of the plane selectors 28-0 to 28-9 shown in FIG. 3; FIG. 6 is a block diagram of the second embodiment; This figure is a block diagram showing the configuration of the combining plane selector 60 shown in FIG. 6.

Claims (6)

[Claims] (1) An image memory having a predetermined number of bit planes in the depth direction, means for supplying code data in which each pixel data is converted to a predetermined number of bits smaller than the predetermined number, and the code data is supplied to the image memory. When storing,
An image storage device comprising means for selecting an arbitrary plane of the bit planes and storing the selected plane in the memory. (2) The storage means is a means for simultaneously storing images of a plurality of screens by dividing the image memory into an arbitrary number of planes.
The image storage device described in Section 1. (3) The image storage device according to claim 2, further comprising means for composing the images of the plurality of screens in the image memory at the time of reading. (4) The image storage device according to claim 3, wherein a composition control signal for controlling the composition means is written in a bit plane of the image memory. (5) The image storage device according to claim 1, 2, or 3, wherein the code data is data indicating the color of each pixel. (6) The image storage device according to claim 1, 2, 3, or 5, wherein the image memory is a buffer memory of a printer.