JP2004080175A - Image processor, data processing method, computer readable storage medium and program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To generate composite image data based on first and second image data with a small memory capacity. <P>SOLUTION: The method comprises tile-dividing input image data into first and second tile image data, discretely storing the divided first or second image data in tile image units on a first or second image memory, forming a first and second address management tables 511, 513 for managing the head address and the image size of each tile image, forming a third address management table 515 for controlling the read of the first and second image data by referring to the first and second management tables, and controlling the reading order of individual image data on the first and second image memories by referring to the first to third address management tables, using a memory controller 516. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an image processing apparatus and a data processing method for performing a process of synthesizing a plurality of image data, a computer-readable storage medium, and a program.
[0002]
[Prior art]
Conventionally, in image synthesis processing for synthesizing a plurality of image data such as N-UP and inset synthesis, image synthesis processing is realized by preparing a memory for an image after synthesis in addition to a memory for image data of a synthesis source. Was.
[0003]
FIG. 8 is a diagram illustrating an example of a memory map at the time of image synthesis processing in a conventional image processing apparatus.
[0004]
That is, as in the example illustrated in FIG. 8, when a composite image 303 is generated by 2-upping the image 301 and the image 302, a memory 307 for the composite image is prepared on the memory 304, and the composite image is the original image. The data of the composite image 303 has been created by copying data from the memory 305 for the image 301 and the memory 306 for the image 302.
[0005]
[Problems to be solved by the invention]
However, in such a conventional image synthesizing method, it is necessary to simultaneously secure the image memory of the original image and the image memory of the original image, and a large amount of memory is required for the image synthesizing process. As the size of the image data becomes larger, furthermore, when the image data is a color image, a larger memory capacity is required, and the cost of the entire image processing apparatus is increased.
[0006]
The present invention has been made to solve the above problems, and an object of the present invention is to divide input image data into first and second tile image data having a predetermined M × N pixel configuration, When the divided first or second image data is discretely stored on the first or second image memory in tile image units, the tile image of each of the stored first and second image data is stored. First and second address management tables for managing the start address and the tile image size are created on the corresponding first and second image memories, and the first and second address management tables stored in the first or second image memory are stored. , A third address management table for controlling reading of the second image data to generate the composite image data with reference to the first and second management tables, and creating the third address management table. See the third address management table Then, by controlling the reading order of tile image data discretely arranged on the first and second image memories to generate composite image data, it is possible to secure an area for storing composite tile image data, To freely construct an inexpensive image processing system capable of generating composite image data based on the first and second image data with a simple configuration of managing read addresses for the first and second image memories. It is an object of the present invention to provide an image processing apparatus and a data processing method, and a computer-readable storage medium and a program.
[0007]
[Means for Solving the Problems]
According to a first aspect of the present invention, there is provided an image processing apparatus for performing a process of synthesizing a plurality of pieces of image data, comprising dividing input image data into first and second tile image data having a predetermined M × N pixel configuration A tile dividing unit (corresponding to the tile dividing unit 509 shown in FIG. 1), and the first image data or the second image data divided by the tile dividing unit in the first image memory or the second image Image data storage means (corresponding to the tile division unit 509 shown in FIG. 1) which discretely stores the image data on the image memory; and the first and second image data stored in the first image memory or the second image memory. First table creating means (FIG. 1) for creating first and second address management tables for managing the start address and tile image size of each tile image of image data in the corresponding first and second image memories. Show And a third address management table for controlling reading of the first and second image data stored in the first or second image memory to generate composite image data. A second table creating means (corresponding to the image synthesizing unit 514 shown in FIG. 1) for creating the first, second, and third address management tables with reference to the first and second management tables. A read control unit (memory controller 516 shown in FIG. 1) for controlling the read order of tile image data discretely arranged on the first and second image memories to generate composite image data. It is characterized by the following.
[0008]
In a second aspect according to the present invention, the tile division unit is configured to convert image data having a plane including attribute data for each pixel in addition to a plane including luminance or density data. Characterized as input.
[0009]
A third invention according to the present invention is characterized in that the tile image data stored in the first and second image memories is compressed image data.
[0010]
A fourth invention according to the present invention is a data processing method in an image processing apparatus for performing a combining process of a plurality of image data, wherein input image data is converted into first and second tile images having a predetermined M × N pixel configuration. A tile dividing step for dividing the data into tiles (step (1) shown in FIG. 6); and a first image memory or a second image data dividing the first image data or the second image data divided by the tile dividing step in tile image units. Image data storing steps (steps (2) and (4) shown in FIG. 6) discretely stored on the second image memory, and a first image data stored in the first image memory or the second image memory. , A first table for creating first and second address management tables for managing the start address and tile image size of each tile image of the second image data in the corresponding first and second image memories. And the reading of the first and second image data stored in the first or second image memory to control the combined image data. A second table creation step (step (6) shown in FIG. 6) for creating a third address management table for creating with reference to the first and second management tables, and the first and second tables; A read control step of controlling the read order of tile image data discretely arranged on the first and second image memories with reference to the third address management table to generate composite image data (see FIG. 6). (7)).
[0011]
According to a fifth aspect of the present invention, in the tile dividing step, the image data including a plurality of planes, and a plane including attribute data for each pixel, in addition to a plane including luminance or density data, Characterized as input.
[0012]
A sixth invention according to the present invention is characterized in that the tile image data stored in the first and second image memories is compressed image data.
[0013]
A seventh invention according to the present invention is a computer-readable storage medium storing a program for implementing the data processing method according to any one of the fourth to sixth aspects.
[0014]
An eighth invention according to the present invention is a program for realizing the data processing method according to any one of the fourth to sixth aspects.
[0015]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 is a block diagram illustrating a configuration of an image processing apparatus according to an embodiment of the present invention.
[0016]
In FIG. 1, an image scanner unit 501 and a page description language (PDL) rendering unit 502 are provided as image input units, and output image data 503 and 505 and attribute data 504 and 506, respectively.
[0017]
The image scanner unit 501 and the PDL rendering unit 502 include a well-known image area separation processing unit. For example, the image scanner unit 501 and the PDL rendering unit 502 generate attribute data for identifying pixels constituting a black character portion in an image in pixel units, The data 504 and 506 are output. Reference numeral 507 denotes a selector for switching an image input system, and reference numeral 508 denotes a line buffer for storing input images for a plurality of lines.
[0018]
The tile division unit 509 reads image data from the line buffer 508 in units of M × N pixels, generates tile image data divided in tiles in units of M × N pixels, and generates the first image memory 510 or a 2 to the second image memory 512.
[0019]
Here, the first image memory 510 and the second image memory 512 store image data of different pages. In addition, the tile division unit 509 outputs the image data for one page on a discrete memory in tile image units, and also includes an address management table for managing the tile image data discretely arranged on these memories. Output to the top.
[0020]
The tables corresponding to the first image memory 510 and the second image memory 512 are a first address management table 511 and a second address management table 513, respectively.
[0021]
An image synthesizing unit 514 receives the first address management table 511 and the second address management table 513 as inputs, and outputs a third address management table 515.
[0022]
A memory controller 516 sequentially reads each row of the third address management table 515, accesses the discrete memory addresses described in each row, sequentially reads out image data, and outputs the image data to the subsequent line buffer 517. A printer unit 518 sequentially reads out the contents of the line buffer 517 and performs printing.
[0023]
FIG. 2 is a diagram illustrating an example of a tile division process of image data by the tile division unit 509 illustrated in FIG.
[0024]
In FIG. 2, reference numeral 101 denotes image data of Px pixels in the X direction and Py pixels in the Y direction. When this image is divided into tiles of M pixels in the X direction and N pixels in the Y direction, the image is divided into Tx tiles in the X direction and Ty tiles in the Y direction.
[0025]
Tile coordinates (x, y) are assigned to tiles located at the x-th position in the X direction and the y-th position in the Y direction from the origin at the upper left of the image. The value of Tx is a minimum integer value that is a value obtained by multiplying Tx and N is equal to or greater than Px. 111 to 114 and 116 are tile image data.
[0026]
In the example of FIG. 1, Px is not an integer multiple of N, and therefore, a portion of the tile whose x-coordinate is Tx−1 that extends beyond the image data 101 (for example, a portion that extends beyond the image data 101 in the tile image data 116). ) Are filled with white pixels. The same applies to the tile having the Ty value and the y coordinate of the tile Ty-1 as in the case of the tile having the Tx value and the x coordinate of the tile Tx-1.
[0027]
Each tile is image data composed of a pixel set of M × N pixels, and each pixel is composed of a plurality of color data such as RGB, RGBA, CMYK, and LAB. In the example of this figure, the tile 102 indicated by the tile coordinates (1, 3) is configured by M × N pixels including the pixel 103, and the pixel 103 is configured by RGB color data 104.
[0028]
In the present embodiment, the tile image data is described as being uncompressed image data. However, the present invention does not limit the format of a tile image to an uncompressed image, Needless to say, the case is also included.
[0029]
FIG. 3 is a diagram for explaining the correspondence between the tile image data and the management table for the image data 101 shown in FIG. 2. Hereinafter, with reference to FIG. The arrangement of the tile image data on the memory and the address management table for managing the discrete memory will be described.
[0030]
In FIG. 3, a memory 210 is a memory for storing tiled image data. The tile blocks 211, 212, 213, 214, 215, and 216 are memory blocks that store the tile image data 111, 112, 113, 114, and 116 shown in FIG. 2, respectively. The arrangement of each tile in the memory is discretely arranged independently for each tile block.
[0031]
These discretely arranged memory blocks are managed by the address management table 220.
[0032]
The address management table 220 is composed of a tile block start address 230 corresponding to each tile block and a tile length 231 indicating the size of the tile block.
[0033]
When the tile image data is compressed data, the tile length may be different for each tile. The elements 221, 223, 224, 225, 226 of the management table correspond to the tile blocks 211, 212, 213, 214, 215, 216, respectively. Each element constituting the table is stored in the table in the order of the tile coordinates.
[0034]
FIG. 4 is a view for explaining an example of image synthesis processing in the image processing apparatus according to the present invention. For example, image synthesis for obtaining an image C303 obtained by 2-UP synthesizing the image data 301 and the image data 302 shown in FIG. It is an example showing a processing method.
[0035]
In FIG. 4, reference numeral 400 denotes tiled image data. For example, the image data 301 is divided into twelve tiles Ta00 to Ta32.
[0036]
Reference numeral 410 denotes tiled image data. For example, the image data 302 is divided into twelve tiles Tb00 to Tb32.
[0037]
Reference numeral 420 denotes a memory image, which represents a state in which the image data 400 is arranged on the memory for each tile block.
[0038]
The image data 401 indicated by the tile Ta00 is stored in the tile block 421 to which the tile block number a00 is assigned.
[0039]
The image data 402 indicated by the tile Ta01 is stored in the tile block 422 to which the tile block number a01 is assigned.
[0040]
The tile blocks 421 and 422 do not need to be continuously arranged on the memory 420, but are generally arranged discretely for each tile block.
[0041]
A memory image 430 indicates a state in which the image data 410 is arranged on the memory for each tile block.
[0042]
The image data 411 indicated by the tile Tb00 is stored in the tile block 431 to which the tile block number b00 is assigned.
[0043]
The image data 412 indicated by the tile Tb01 is stored in the tile block 432 to which the tile block number b01 is assigned.
[0044]
Note that the tile blocks 431 and 432 need not be continuously arranged on the memory 430, but are generally arranged discretely for each tile block.
[0045]
An address management table 440 manages the address of each tile block corresponding to the image data 400 discretely arranged on the memory 420 and the tile length indicating the size of the tile block, and the table itself is also stored in a memory area (not shown). You.
[0046]
The elements of the address management table are arranged in the order of the tile coordinates. The area 441, which is the first element, has the top address in the memory of the tile block number a00 (tile block 421) whose tile coordinates are (0, 0) and the tile. This area stores the length.
[0047]
The area 442 is an area for storing the start address of the tile block number a01 (tile block 422) on the memory and the tile length.
[0048]
An address management table 450 manages the address of each tile block corresponding to the image data 410 discretely arranged on the memory 430 and the tile length indicating the size of the tile block, and the table itself is stored in a memory area (not shown). You.
[0049]
The area 451 is an area for storing the start address of the tile block number b00 (tile block 431) on the memory and the tile length. The area 452 is an area for storing the start address of the tile block number b01 (tile block 432) on the memory and the tile length.
[0050]
Reference numeral 460 denotes an address management table for managing the address of the combined image data 600 obtained by 2-UP combining the image data 400 and the image data 410 output by the image combining unit 514 shown in FIG.
[0051]
FIG. 5 is a diagram illustrating an example of the combined image data obtained by combining the images by the image combining unit 514 illustrated in FIG. 1. Each tile image is managed by the address management table 460 illustrated in FIG.
[0052]
In FIG. 5, the composite image data 600 is an example of a composite image obtained by combining the image data 400 and the image data 410 in the left and right directions. It is synthesized based on
[0053]
FIG. 6 is a flowchart showing an example of an image data processing procedure in the image processing apparatus according to the present invention. The tile dividing unit 509, the image synthesizing unit 514, and the memory controller 516 in the image processing apparatus shown in FIG. Etc. corresponds to an image data processing procedure executed according to a control program stored in the storage device. (1) to (8) indicate each step.
[0054]
First, the tile dividing unit 509 divides the image data 400 and 410 input from the image scanner unit 501 or the page description language rendering unit 502 into tile images of predetermined M × N pixels (1). Then, the divided first image data 400 is discretely stored in the first image memory 510 in tile image units (2), and the first image data 400 stored in the first image memory 510 is stored. The first address and the tile image size of each tile image are registered together in the first address management table 511 stored in the memory (3).
[0055]
Further, the divided second image data 410 is discretely stored in the second image memory 512 in tile image units (4), and the second image data 410 stored in the second image memory 512 is stored. The head address of each tile image and the tile image size are registered together in the second address management table 513 stored in the memory (5).
[0056]
Next, the first and second address management tables 511 and 513 are input, and some or all of the tile images in the first image data 400 and some or all of the A third address management table 515 including the head address and tile image size corresponding to each of all the tile images is output (created (6)).
[0057]
Next, the memory controller 516 refers to the first, second, and third address management tables 511, 513, and 515, and sequentially stores the tile image data discretely arranged on the first and second image memories 510 and 512. It is read and output to the printer unit 518 (7), and it is determined whether the tile image data is completed (8). If NO, the process returns to the step (7), and if YES, the process ends.
[0058]
Note that the tile division unit 509 illustrated in FIG. 1 receives, as input, image data including a plane including luminance or density data and a plane including attribute data for each pixel in addition to a plane including luminance or density data. It is configured to be possible.
[0059]
In addition, compressed image data is also included as tile image data stored in the first and second image memories 510 and 512.
[0060]
According to the above embodiment, it is not necessary to secure the image memory area (the memory 307 as shown in FIG. 8) for the synthesized image in the image synthesis processing for synthesizing a plurality of images. Combining processing can be realized.
[0061]
Hereinafter, the configuration of a data processing program that can be read by the image processing apparatus according to the present invention will be described with reference to a memory map shown in FIG.
[0062]
FIG. 7 is a diagram illustrating a memory map of a storage medium that stores various data processing programs that can be read by the image processing apparatus according to the present invention.
[0063]
Although not shown, information for managing a group of programs stored in the storage medium, for example, version information, a creator, and the like are also stored, and information dependent on the OS or the like on the program reading side, for example, a program is identified and displayed. Icons and the like may also be stored.
[0064]
Further, data dependent on various programs is also managed in the directory. In addition, a program for installing various programs on a computer or a program for decompressing a program to be installed when the program to be installed is compressed may be stored.
[0065]
The functions shown in FIG. 6 in this embodiment may be performed by a host computer by a program installed from the outside. In this case, the present invention is applied even when a group of information including a program is supplied to the output device from a storage medium such as a CD-ROM, a flash memory, or an FD, or from an external storage medium via a network. Things.
[0066]
As described above, the storage medium storing the program codes of the software for realizing the functions of the above-described embodiments is supplied to the system or the apparatus, and the computer (or CPU or MPU) of the system or the apparatus stores the storage medium in the storage medium. It goes without saying that the object of the present invention is also achieved by reading and executing the program code thus obtained.
[0067]
In this case, the program code itself read from the storage medium implements the novel function of the present invention, and the storage medium storing the program code constitutes the present invention.
[0068]
As a storage medium for supplying the program code, for example, a flexible disk, hard disk, optical disk, magneto-optical disk, CD-ROM, CD-R, magnetic tape, nonvolatile memory card, ROM, EEPROM, or the like may be used. it can.
[0069]
When the computer executes the readout program code, not only the functions of the above-described embodiments are realized, but also an OS (Operating System) running on the computer based on the instruction of the program code. It goes without saying that a part or all of the actual processing is performed and the functions of the above-described embodiments are realized by the processing.
[0070]
Further, after the program code read from the storage medium is written into a memory provided on a function expansion board inserted into the computer or a function expansion unit connected to the computer, the function expansion is performed based on the instruction of the program code. It goes without saying that a CPU or the like provided in the board or the function expansion unit performs part or all of the actual processing, and the processing realizes the functions of the above-described embodiments.
[0071]
【The invention's effect】
As described above, according to the present invention, input image data is tile-divided into first and second tile image data having a predetermined M × N pixel configuration, and the divided first or second image data is divided. Are discretely stored on the first or second image memory in tile image units, and the first and second addresses for managing the head address and the tile image size of each tile image of the stored first and second image data are stored. A second address management table is created on the corresponding first and second image memories, and reading of the first and second image data stored in the first or second image memory is controlled. A third address management table for generating composite image data is created with reference to the first and second management tables, and a third address management table is created with reference to the first, second, and third address management tables. 1. On the second image memory Since the composite image data is generated by controlling the reading order of the scattered tile image data, the read addresses for the first and second image memories are managed without securing an area for storing the composite tile image data. With such a simple configuration, it is possible to freely construct an inexpensive image processing system capable of generating composite image data based on the first and second image data.
[Brief description of the drawings]
FIG. 1 is a block diagram illustrating a configuration of an image processing apparatus according to an embodiment of the present invention.
FIG. 2 is a diagram illustrating an example of a tile division process of image data by a tile division unit illustrated in FIG. 1;
FIG. 3 is a diagram for explaining the correspondence between tile image data and the management table for the image data shown in FIG. 2;
FIG. 4 is a diagram illustrating an example of an image combining process in the image processing apparatus according to the present invention.
FIG. 5 is a diagram illustrating an example of combined image data obtained by combining images by the image combining unit illustrated in FIG. 1;
FIG. 6 is a flowchart illustrating an example of an image data processing procedure in the image processing apparatus according to the present invention.
FIG. 7 is a diagram illustrating a memory map of a storage medium that stores various data processing programs that can be read by the image processing apparatus according to the present invention.
FIG. 8 is a diagram illustrating an example of a memory map at the time of image synthesis processing in a conventional image processing apparatus.
[Explanation of symbols]
501 Image scanner unit 502 Page description language rendering unit 507 Selector 508 Line buffer 509 Tile division unit 510 First image memory 511 First address management table 512 Second image memory 513 Second address management table 514 Image synthesis unit 515 Third address management table 516 Memory controller 517 Line buffer 518 Printer section

Claims (8)

An image processing device that performs a combining process of a plurality of image data,
Tile dividing means for dividing input image data into first and second tile image data having a predetermined M × N pixel configuration;
Image data storage means for discretely storing the first image data or the second image data divided by the tile division means in a first image memory or a second image memory in tile image units;
The first address and the second address management table for managing the tile image size and the start address of each tile image of the first and second image data stored in the first image memory or the second image memory correspond to each other. First table creating means for creating on the first and second image memories;
The third address management table for controlling the reading of the first and second image data stored in the first or second image memory and generating the composite image data is stored in the first and second management tables. Second table creating means for creating with reference to the table;
Readout for generating composite image data by controlling the readout order of tile image data discretely arranged on the first and second image memories with reference to the first, second, and third address management tables Control means;
An image processing apparatus comprising: The image processing apparatus according to claim 1, wherein the tile division unit receives, as input, image data including a plane including attribute data for each pixel in addition to a plane including luminance or density data. 2. The image processing device according to 1. 3. The image processing apparatus according to claim 1, wherein the tile image data stored in the first and second image memories is compressed image data. A data processing method in an image processing device that performs a synthesis process of a plurality of image data,
A tile dividing step of dividing input image data into first and second tile image data having a predetermined M × N pixel configuration;
An image data storing step of discretely storing the first image data or the second image data divided by the tile dividing step on a first image memory or a second image memory in tile image units;
The first address and the second address management table for managing the tile image size and the start address of each tile image of the first and second image data stored in the first image memory or the second image memory correspond to each other. A first table creating step for creating on the first and second image memories;
The third address management table for controlling the reading of the first and second image data stored in the first or second image memory and generating the composite image data is stored in the first and second management tables. A second table creation step for creating with reference to the table;
Readout for generating composite image data by controlling the readout order of tile image data discretely arranged on the first and second image memories with reference to the first, second, and third address management tables A control step;
A data processing method comprising: The image processing apparatus according to claim 1, wherein the tile division step receives, as input, image data including a plane including attribute data for each pixel in addition to a plane including luminance or density data. 4. The data processing method according to 4. 6. The data processing method according to claim 4, wherein the tile image data stored in the first and second image memories is compressed image data. A computer-readable storage medium storing a program for realizing the data processing method according to claim 4. A program for realizing the data processing method according to any one of claims 4 to 6.

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