JPH01183719A - Power supply control system for computer system - Google Patents

Abstract

PURPOSE:To facilitate the study for the cause of a fault by deciding whether a power supply interruption signal is transmitted from a switch of a service processor, in response to the set time, or based on the end of a job and storing said interruption signal. CONSTITUTION:The power supply interruption signal received from a timer 9 of an external power supply controller 8 is stored in a state memory means 11 of a power supply controller 13 together with the power supply interruption signal received from a switch 10 operated by an operator of a service processor 14, and the job end signal received from a CPU 1. Then the record showing the requester for a power supply interruption instruction stored in the means 11 is stored in a nonvolatile file 24 via a state information storing means 12 of the processor 14. The the processor 14 informs the controller 13 the power supply interruption order for each device of a computer system. In such a way, the study is facilitated for the cause of a fault.

Description

[Detailed Description of the Invention] [Summary] Regarding a power control method for a computer system that makes it possible to keep a record of the causes of power-off in a computer system, the causes of power-off are distinguished and recorded in a file of a service processor, and causes of failure can be investigated. For the purpose of facilitating Based on the above, a computer is equipped with a power supply control device that sends out an interrupt signal for power-off, and a service processor that receives the interrupt signal and instructs the power supply control device to send a power-off signal to each device constituting the computer system. In the system, the power control device has a status memory that distinguishes and stores whether the power cut signal was sent from a switch, was sent according to a set time, or was sent based on job completion when a power cut signal was received. and the service processor is provided with state information storage means for reading the storage contents stored in the state storage means and writing them into a non-volatile file when the service processor receives a power-off interrupt signal sent by the power supply control device. It was composed of

[Industrial application field]

The present invention relates to a power control method for powering on or powering down a computer system using a plurality of methods, and in particular, a power control method for a computer system that makes it possible to keep a record of which method was used to turn off the power. Regarding.

When powering on a large-scale computer system, a power-on signal is sent to the power control device from a timer installed in the external power control device or a power switch installed in the service processor that monitors the operation of the computer system. , this power supply control device sends a power-on interrupt signal to the service processor, so that the service processor instructs the power supply control device in the order in which to power on each device of the computer system, and the power supply control device receives this instruction. Accordingly, a power-on signal No. 13 is sent to each device of the computer system.

In addition, the power to the computer system is cut off based on the operation of a timer of an external power supply control device, the operation of a power switch provided in the service processor, or the end signal sent by the central processing unit of the computer system when the job is completed. A power-off signal is sent to the power control device, and the power control device sends a power-off interrupt signal to the service processor, so that the service processor instructs the power control device in the order in which to turn off the power to each device in the computer system. In accordance with this instruction, the power supply control device sends a power-off signal to each device of the computer system.

As described above, since the computer system is powered off based on a plurality of instructions, it is necessary to easily investigate the cause of the power off.

[Conventional technology]

FIG. 4 is a block diagram illustrating the conventional technique, and FIG. 5 is a flowchart illustrating the operation of FIG. 4.

The computer system is powered on by operating a timer 9 provided in the external power control device 8 or by operating a switch 10 provided in the service processor 7 by an operator. First, power-on by the operation of the timer 9 will be explained.

When the timer 9 provided in the external power supply control device 8 reaches a predetermined time, the timer 9 operates as shown in FIG. External power control device 8
Turn on the power, then turn on the power control bag Y16 as shown in ■.
and power on the service processor 7. And ■
As shown in (2), a signal instructing the power supply control device 6 to turn on the power to the computer system is sent. When the power supply control device 6 receives this signal, it sends an interrupt signal to the service processor 7 to turn on the power, as shown in (2).

When the service processor 7 receives this interrupt signal, it notifies the power supply control device 6 of the order in which power is to be turned on to each device of the computer system, as shown in (3). Power control device 6
Based on instructions from the service processor 7, it sends power-on signals to the central processing unit 1, main memory control unit 2, main memory 3, channel 4, and input/output device 5 in the specified order.

When the operator operates the switch IO of the service processor 7 to turn on the power of the computer system, the power of the external power control device 8, the power control device 6, and the service processor 7 are activated while they are turned on. Therefore,
A signal instructing to turn on the power is sent to the power supply control device 6 by the switch 10 . The power supply control device 6 sends an interrupt signal to the service processor 7 in response to this power-on instruction signal. The subsequent operations are similar to those described above, and detailed explanation will be omitted.

As shown in ■, the service processor 7 is a central processing unit l.
The initial program of O8 is loaded into the main storage device 3 via the main storage control device 2, and the central processing unit 1 executes the job according to the instructions of this O8 (as shown in ■). Check to see if it has finished.

The power to the computer system is cut off by the operation signal of the timer 9 provided in the external power control device 8, the operation signal of the switch 10 provided in the service processor 7, and the termination signal sent by the central processing unit 1 upon job completion. Implemented.

First, we will explain how the power is cut off by the end signal sent by the central processing unit 1 upon completion of a job. The central processing unit 1 checks the end of the job as shown in (■), and when the job is completed,
As shown in FIG. 2, a job end signal is sent to the external power supply control device 8 via the service processor 7. When the external power supply control device 8 receives this job end signal, it sends a signal instructing the power supply control device 6 to turn off the power in response to the job end signal, as shown in [phase].

The power supply control device 6 sends a power-off interrupt signal to the service process 7 as shown in (3). When the service processor 7 receives this interrupt signal, it records in a non-volatile file that the power-off interrupt signal has been input, as shown in (), and then sends each of the computer system to the power supply control device 6 as shown in (). Notifies the order in which devices should be powered down.

Based on the instructions from the service processor 7, the power supply control device 6 controls the central processing unit 1, the main storage control device 2, the main storage device 3,
A power-off signal is sent to the channel 4 and the input/output device 5 in the specified order.

When the power supply to the central processing unit 1, main memory control unit 2, main memory 3, channel 4, and input/output device 5 is completed, the external power supply control unit 8 switches the service processor 7 and the power supply control unit 6 to each other, as shown in (3). After the power is turned off, the power to the external power control device 8 is turned off, except for the timer 9, as shown in (2).

Furthermore, when the timer 9 of the external power supply control device 8 reaches a predetermined time, it sends a signal instructing the power supply control device 6 to turn off the power, and as shown in (3), the power supply control device 6 sends an interrupt to the service processor 7 to cut off the power. Send a signal. The subsequent operations are the same as above.

Also, the operator may switch 10 of the service processor 7.
When the power control device 6 is operated to instruct the power supply control device 6 to turn off the power,
The power supply control device 6 has a service processor 7 as shown in FIG.
Sends a power-off interrupt signal to Then, steps ① and ② are executed, but the processing after [phase] is not performed.

[Problem that the invention seeks to solve]

As mentioned above, the power of a conventional computer system is cut off when the operator operates the switch 10 of the service processor 7 to instruct the power to be cut off, when the timer 9 operates and instructs the power to be cut off, and when the central processing unit 1 Executed when sends a job end signal.

However, in any case, in the file of the service processor 7, as shown in FIG. Therefore, it is unclear whether the operator accidentally operated the switch 10 of the service processor 7, whether the job end signal was sent due to a malfunction of the central processing unit 1, or whether it was due to an incorrect setting or malfunction of the timer 9, and the computer system There is a problem in that when a failure such as power cutoff occurs during operation, it is difficult to investigate the cause.

In view of these problems, the present invention includes a file in the service processor 7 that includes a disconnection signal from the timer 9, a disconnection signal based on a job end signal from the central processing unit 1, a disconnection signal from the switch IO, a power supply The purpose is to leave a history that distinguishes the cause of disconnection, making it easier to investigate the cause of the failure.

[Means for solving problems]

FIG. 1 is a block diagram of the principle of the present invention.

A power-off signal is sent from the timer 9 of the external power supply control device 8 to the state storage means 11 of the power supply control device 13 according to a preset time, and the state storage means 11 is instructed to turn off the power by the timer 9. remember things.

Further, a power cutoff signal is sent from the switch 10 operated by the operator of the service processor 14 to the state storage means 11 of the power supply control device 13, and the state storage means 11 similarly stores that the power cutoff instruction has been issued from the switch 1o. do.

Further, a job end signal is sent from the central processing unit l to the state storage means 11 of the power supply control device 13, and the state storage means 11
stores that the central processing unit 1 has given an instruction to turn off the power.

When the power control device 13 is instructed to turn off the power in the same manner as described above, it sends an interrupt signal to the service processor 14 to turn off the power. Based on this power-off interrupt signal, the service processor 14 causes the state information storage means 12 to read the record indicating the source of the power-off instruction stored in the state storage means 11 of the power supply control device 13, and causes the non-volatile file 24
After that, the power control device 13 is notified of the order in which power is to be cut off to each device of the computer system as described above.

[Effect]

With the above configuration, the state storage means 11 of the power supply control device 13 distinguishes and stores whether the instruction source to turn off the power is the timer 9, the switch 10, or the central processing unit 1, and the service processor 14 stores state information. Since the storage means 12 leaves the power-off instruction source stored by the state storage means 11 in the non-volatile file 24, it is possible to easily check which instruction was used to turn off the power of the computer system.

〔Example〕

FIG. 2 is a block diagram of a circuit showing an embodiment of the present invention.
FIG. 3 is a flowchart illustrating the operation of FIG. 2.

The processor 17 of the service processor 14 has a ROM1
8 and starts the operation, a program including the state storage instruction program 21 is read from the disk 23 via the disk control circuit 22 and stored in the RAM 20, and the operation is performed according to the instructions of the program stored in the RAM 20.

Since the timer 9 of the external power supply control device 8 has reached a predetermined time, a signal instructing to turn off the power is sent to the power supply control device 13, and the register 16 of the power supply control device 13
It remembers that a power-off signal was sent from. Then, the OR circuit 15 receives the power cutoff signal sent by the timer 9.
Send to the input/output port 19 of the service processor 14,
Used as a power-off interrupt signal.

Further, when the switch lO of the service processor 14 is operated, the driver 25 sends a power cut signal to the power control device 13.
The output is sent to the OR circuit 15 and the register 16, and the OR circuit 15
sends this signal to input/output port 1 of the service processor 14.
9 as a power-off interrupt signal, and register 16.
remembers that switch IO has sent a power-off signal.

Further, when the central processing unit 1 sends a job end signal to the input/output port 19 of the service processor 14, the processor 17 adjusts the timing etc. and sends it to the driver 26 of the external power control device 8, and the driver 26 A job end signal is sent to the OR circuit 15 and register 16 of the power supply control device 13.

The OR circuit 15 sends this job end signal to the input/output port 19 of the service processor 14 as a power-off interrupt signal, and the register 16 stores that the central processing unit 1 has sent the power-off signal.

As shown in FIG. 3, the processor 17 checks the transmission of the interrupt signal sent in FIG. When an interrupt signal is input, it is checked whether the interrupt is an instruction to turn off the power, and if it is not an instruction to turn off the power, other processing is executed; The contents of the register 16 are read through the input/output port 19, the interrupt factor is analyzed, the source of the power cut signal is recognized, and this is written through the disk control circuit 22 to the disk 23 used as a file.

When the processor 17 writes the source of the power-off signal to the disk 23, as shown in FIG. do.

In the above case, the power-off history can be left in a file, but if you want to leave the power-on history, the power-on factors are stored in the register 16, and between ■ and ■ in Figure 5, this is stored on the disk 23. This can be achieved by writing in.

〔Effect of the invention〕

As explained above, in the present invention, since the destination of the power-off signal is recorded in the file of the service processor, when a power-off failure occurs in the computer system, it is possible to easily investigate the failure.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of the principle of the present invention, FIG. 2 is a block diagram of a circuit showing an embodiment of the present invention, FIG. 3 is a flowchart explaining the operation of FIG. 2, and FIG.
The figure is a block diagram explaining the conventional technique, and FIG. 5 is a flowchart explaining the operation of FIG. 4. In the figure, 1 is a central processing unit, 2 is a main memory controller, 3 is a main memory device, 4 is a channel, 5 is an input/output device,
6.13 is a power supply control device, 7.14 is a service processor, 8 is an external power supply control device, 9 is a timer, IO is a switch, 11 is a state storage means, 12 is a state information storage means, 15 is an OR circuit, 16 is a register,
17 is a processor, 18 is a ROM,
19 is an input/output port, and 20 is a RAM. 21 is a state storage instruction program, 22 is a disk control circuit, 23 is a disk, 24 is a nonvolatile file, and 25 and 26 are drivers. The principle of wood pounding pro.../7 Figure 1 Concave χ Sui Tsu version 2 ■ History π IE & A - + 1r Allow 3 Arrows x
Figure 3

Claims (1)

[Claims] A power-off signal sent from the switch (10), a power-off signal sent out according to a preset time, and a power-off signal sent out based on job completion of the computer system. a power supply control device (13) that sends a power-off interrupt signal based on the power supply control device (13); and a power supply control device (13) that receives the interrupt signal and instructs the power supply control device (13) to send a power-off signal to each device constituting the computer system. In a computer system equipped with a service processor (14) that performs status storage means for distinguishing and storing whether the data was sent based on the job completion or the data was sent based on the completion of the job;
11), and the service processor (14) includes the power supply control device (14).
13) When receiving the power-off interrupt signal sent by
A power supply control method for a computer system, characterized in that a state information storage means (12) is provided for reading the storage contents stored in the state storage means (11) and writing them into a nonvolatile file (24).