JPH0519881A - Electronic equipment - Google Patents

Electronic equipment

Info

Publication number
JPH0519881A
JPH0519881A JP3175165A JP17516591A JPH0519881A JP H0519881 A JPH0519881 A JP H0519881A JP 3175165 A JP3175165 A JP 3175165A JP 17516591 A JP17516591 A JP 17516591A JP H0519881 A JPH0519881 A JP H0519881A
Authority
JP
Japan
Prior art keywords
state
power supply
devices
resume
electronic equipment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3175165A
Other languages
Japanese (ja)
Other versions
JP3101349B2 (en
Inventor
Nobuyuki Kasuga
信之 春日
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP03175165A priority Critical patent/JP3101349B2/en
Priority to EP92112062A priority patent/EP0523652B1/en
Priority to DE69228340T priority patent/DE69228340T2/en
Publication of JPH0519881A publication Critical patent/JPH0519881A/en
Priority to US08/408,471 priority patent/US5721930A/en
Application granted granted Critical
Publication of JP3101349B2 publication Critical patent/JP3101349B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To reproduce a state again even in an incomplete resuming state by performing resuming operation in stages and performing power-source control, device by device. CONSTITUTION:The electronic equipment is equipped with a means which controls power supply to the individual devices when the use of the computer device 1 of the electronic equipment consisting of the devices and the computer device 1 with a built in memory(RAM) 2 is quitted and a means which turns OFF power of the devices, one by one, in stages. Further, the equipment is provided with a means which saves the current operation state of the computer such as the states of the devices and memory contents when power supply is stopped and a means which restores the original operation state when the electric power is supplied again. When the restoring operation is performed, information is written back for only devices which require the restoring operation according to the recording contents. Consequently, the equipment is put back into the original operation state even in the incomplete resuming state.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は1つ1つのデバイスに対
して電源の制御を行ないレジユームの状態再生をする電
子機器に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic apparatus which controls the power supply of each device and reproduces the status of a resume.

【0002】[0002]

【従来の技術】従来、コンピユータ装置などの電子機器
において、電源を切断する直前のコンピユータの各種動
作情報をメモリ中などに保存しておき、再び電源を投入
したときに元の状態を復元できるいわゆるレジユーム機
能を持つものがあった。
2. Description of the Related Art Conventionally, in electronic equipment such as a computer device, various operation information of the computer immediately before the power is turned off is stored in a memory or the like, and the original state can be restored when the power is turned on again. Some had a resume function.

【0003】しかしながら上記従来例では、レジユーム
が完全に完了しない前に、再びスイツチを押すなどして
レジユームからの復帰をさせようとすると、各種状態の
保存処理が途中で中断されてしまうため、不完全なレジ
ユーム状態から復帰しようとしても、復帰ができないよ
うな場合がある。
However, in the above-mentioned conventional example, if an attempt is made to return from the resume by pressing the switch again before the resume is not completely completed, the saving process of various states is interrupted on the way, which is unsatisfactory. Even if you try to recover from a completely resumed state, you may not be able to recover.

【0004】[0004]

【発明が解決しようとする課題】前述のようにレジユー
ムが完全に完了しない前のSW操作で各種状態の保存処
理が途中で中断されて、不完全なレジユーム状態から復
帰できなくなる欠点があった。
As described above, the SW operation before the resume is not completely completed interrupts the saving process of various states, which makes it impossible to recover from the incomplete resume state.

【0005】[0005]

【課題を解決するための手段】本発明によれば、レジユ
ーム状態への移行を段階毎にとらえ、各段階の完了毎に
メモリ上に記録を取る。各段階が完了するとその段階で
格納した情報は破壊されても構わないものとし、そのデ
バイスへの電力の供給を止める。そして復帰動作を行な
う場合には、この記録内容に従い復帰動作が必要なデバ
イスに対してのみ情報を書き戻すようにしたものであ
る。これにより、レジユームが不完全な状態でも再び元
の動作状態に復帰させることができるようにしたもので
ある。
According to the present invention, the transition to the resume state is detected for each stage, and a record is made on the memory at the completion of each stage. When each step is completed, the information stored at that step may be destroyed, and the power supply to the device is stopped. Then, when the restoring operation is performed, the information is written back only to the device that needs the restoring operation according to the recorded contents. As a result, even if the resume is incomplete, the original operating state can be restored again.

【0006】[0006]

【実施例】図1は本発明の特徴を最もよく表わす図面で
あり、同図に於て1は制御の中心となる中央制御装置で
あるCPU、2は各種データを格納する読み書き可能な
メモリであるRAM、3はCPU1が動作するために必
要なプログラムが格納されて読み出し専用メモリである
ROM、4はSW5の状態の変化に応じて割り込み要求
を出すSW制御装置、5はSW(スイツチ)、6はデバ
イスからの割り込み要求に応じてCPU1に対して割り
込みを出す割り込みコントローラ、7は表示器に対する
制御信号を作り出す表示制御回路、8は電源装置9のO
N/OFFの動作を制御する電源制御装置、9は電源装
置である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a drawing which best represents the features of the present invention. In FIG. 1, 1 is a CPU which is a central control unit which is the center of control, and 2 is a readable / writable memory for storing various data. A certain RAM, ROM 3 which is a read-only memory in which a program necessary for the CPU 1 to operate is stored, 4 is an SW control device which issues an interrupt request in response to a change in the state of SW 5, 5 is SW (switch), 6 is an interrupt controller that issues an interrupt to the CPU 1 in response to an interrupt request from the device, 7 is a display control circuit that generates a control signal for the display, and 8 is an O of the power supply device 9.
A power supply control device for controlling N / OFF operation, and 9 is a power supply device.

【0007】また図2はROM3内に格納されているレ
ジユーム機能を実現するための状態保存時のプログラム
のフローチヤート図であり、図3はその状態復帰時の処
理を実現するためのプログラムのフローチヤート図であ
る。
FIG. 2 is a flow chart of a program stored in the ROM 3 at the time of saving the state for realizing the resume function. FIG. 3 is a flow chart of the program for realizing the process at the time of returning to the state. It is a chart.

【0008】図1のような構成のコンピユータ装置にお
いて、使用者がその使用を中断するためのスイツチであ
るSW5を押すと、SW制御装置4は割り込みコントロ
ーラ6に対して割り込み要求を送出する。すると割り込
みコントローラ6は、CPU1に対してハードウエア割
り込みを発生する。CPU1はこの割り込みを受けて現
在の処理を中断し、ROM3内に格納されているレジユ
ーム処理プログラムを実行する。
In the computer device configured as shown in FIG. 1, when the user presses SW5 which is a switch for interrupting the use, the SW control device 4 sends an interrupt request to the interrupt controller 6. Then, the interrupt controller 6 issues a hardware interrupt to the CPU 1. Upon receiving this interrupt, the CPU 1 interrupts the current processing and executes the resume processing program stored in the ROM 3.

【0009】このプログラムは図2に示すステツプS1
でまずCPU1のレジスタ情報を保存する。そしてステ
ツプS2でCPU1の保存が完了したことをRAM2上
に記録する。同様にしてステツプS3で割り込みコント
ローラ6のレジスタ情報を保存し、ステツプS4でその
完了をRAM2上に記録する。そしてステツプS5で割
り込みコントローラへの電力供給を止める。ついでステ
ツプS6で表示制御装置7のレジスタ情報を記録し、ス
テツプS7でその完了をRAM2上に記録してステツプ
S8で電力供給を止める。そして他のデバイスのレジユ
ームが完了したならば、ステツプS9でCPU1自身へ
の電力供給を止めて完全なレジユーム状態に入る。
This program is executed in step S1 shown in FIG.
First, the register information of the CPU 1 is saved. Then, in step S2, the fact that the saving of the CPU1 is completed is recorded in the RAM2. Similarly, the register information of the interrupt controller 6 is saved in step S3, and its completion is recorded in the RAM 2 in step S4. Then, in step S5, the power supply to the interrupt controller is stopped. Then, in step S6, the register information of the display controller 7 is recorded, in step S7 the completion is recorded on the RAM 2, and in step S8 the power supply is stopped. When the resume of the other device is completed, the power supply to the CPU 1 itself is stopped in step S9 to enter the complete resume state.

【0010】レジユームからの復帰時は図1に示すSW
5が押されて復帰が指示されると、図3のステツプS1
0で全デバイスへの電力供給が再開され初期化処理され
る。次にステツプS11でRAM2上に記録されている
レジユームの完了情報を参照し、どのデバイスから復帰
処理を行なう必要があるのかを判断する。例えばレジユ
ームが完全に完了していたならばステツプS12へ進む
ことになる。そしてステツプS12〜15で個々のデバ
イスについて復帰処理を行ない、RAM2上にあるレジ
ユームの記録を消去して、レジユームが指示された時点
のポインタ位置へ処理が渡される。
When returning from the resume mode, the SW shown in FIG.
When 5 is pressed and a return is instructed, step S1 in FIG.
At 0, power supply to all devices is restarted and initialization processing is performed. Next, at step S11, the device completion information recorded in the RAM 2 is referred to, and which device needs to perform the restoration process is determined. For example, if the resume is completely completed, the process proceeds to step S12. Then, in steps S12 to S15, the recovery process is performed for each device, the record of the resume on the RAM 2 is erased, and the process is passed to the pointer position at the time when the resume is instructed.

【0011】[0011]

【発明の効果】以上のように、レジユームを段階毎に行
ない、1つ1つのデバイスに対して電源制御を行なうこ
とにより、レジユームが不完全な状態からでも、再び状
態を再生することが可能となる。
As described above, by performing the resume in stages and controlling the power supply for each device, it is possible to reproduce the state again even when the resume is incomplete. Become.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明を実施したコンピユータのシステムブロ
ツク図である。
FIG. 1 is a system block diagram of a computer implementing the present invention.

【図2】ROM内に格納されたレジユーム機能を実現す
る状態保存時の処理プログラムのフローチヤート図であ
る。
FIG. 2 is a flowchart of a processing program at the time of state saving that realizes a resume function stored in a ROM.

【図3】ROM内に格納されたレジユーム機能を実現す
る状態復帰時の処理プログラムのフローチヤート図であ
る。
FIG. 3 is a flowchart of a processing program stored in a ROM at the time of returning from a state for realizing a resume function.

【符号の説明】[Explanation of symbols]

1 CPU 2 RAM 3 ROM 4 SW制御回路 5 SW(スイツチ) 6 割り込みコントローラ 7 表示制御装置 8 電源制御装置 9 電源装置 1 CPU 2 RAM 3 ROM 4 SW control circuit 5 SW (switch) 6 Interrupt controller 7 Display control device 8 Power supply control device 9 Power supply device

Claims (1)

【特許請求の範囲】 【請求項1】 デバイス及びメモリを内蔵したコンピユ
ータ装置から成る電子機器において、 前記コンピユータ装置の使用を中断する際に、個々のデ
バイスの電力供給を制御する手段と、デバイスへの電力
供給を1つ1つ段階毎に断つ手段と、電力の供給を止め
る際にデバイスの状態やメモリ内容など現在のコンピユ
ータ動作状態を保存する手段と、再び通電が開始された
際に元の動作状態を復元する手段とを設けたことを特徴
とする電子機器。
Claim: What is claimed is: 1. An electronic device comprising a computer device having a device and a memory built-in, wherein when the use of the computer device is interrupted, a means for controlling power supply to each device, Means to cut off the power supply of each step by step, a means to save the current computer operation status such as the device state and memory contents when the power supply is stopped, and the original power supply when the power supply is started again. An electronic device comprising means for restoring an operating state.
JP03175165A 1991-07-16 1991-07-16 Electronic device and control method for electronic device Expired - Lifetime JP3101349B2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP03175165A JP3101349B2 (en) 1991-07-16 1991-07-16 Electronic device and control method for electronic device
EP92112062A EP0523652B1 (en) 1991-07-16 1992-07-15 Electronic apparatus with resume function
DE69228340T DE69228340T2 (en) 1991-07-16 1992-07-15 Electronic device with repeat function
US08/408,471 US5721930A (en) 1991-07-16 1995-03-21 Electronic apparatus with component operating state control

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP03175165A JP3101349B2 (en) 1991-07-16 1991-07-16 Electronic device and control method for electronic device

Publications (2)

Publication Number Publication Date
JPH0519881A true JPH0519881A (en) 1993-01-29
JP3101349B2 JP3101349B2 (en) 2000-10-23

Family

ID=15991405

Family Applications (1)

Application Number Title Priority Date Filing Date
JP03175165A Expired - Lifetime JP3101349B2 (en) 1991-07-16 1991-07-16 Electronic device and control method for electronic device

Country Status (1)

Country Link
JP (1) JP3101349B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8261107B2 (en) 2009-02-24 2012-09-04 Seiko Epson Corporation Printing device controller and printing device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8261107B2 (en) 2009-02-24 2012-09-04 Seiko Epson Corporation Printing device controller and printing device

Also Published As

Publication number Publication date
JP3101349B2 (en) 2000-10-23

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