JPH01175604A - Controller - Google Patents
ControllerInfo
- Publication number
- JPH01175604A JPH01175604A JP33588987A JP33588987A JPH01175604A JP H01175604 A JPH01175604 A JP H01175604A JP 33588987 A JP33588987 A JP 33588987A JP 33588987 A JP33588987 A JP 33588987A JP H01175604 A JPH01175604 A JP H01175604A
- Authority
- JP
- Japan
- Prior art keywords
- reference value
- value
- control
- output value
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000000670 limiting effect Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 2
- 238000001514 detection method Methods 0.000 description 1
Landscapes
- Feedback Control In General (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、制御対象の出力値を制御基準値に制御しな
がら制限対象の出力値を上限基準値、下限基準値からな
る制限値内に制御する制御装置に関するものである。[Detailed Description of the Invention] [Field of Industrial Application] The present invention is directed to controlling the output value of a controlled object to a control reference value while keeping the output value of a limiting object within a limit value consisting of an upper limit reference value and a lower limit reference value. The present invention relates to a control device for controlling.
第5図は従来の制御装置を示すブロック図であり、図に
おいて、1は後述する制御対象6の制御基準値B re
fを設定する制御基準値設定器、2は制御基準値B r
efから制御対象6の出力値Bを差し引く減算器、3は
増幅器、4は増幅器3の出力信号と増幅器8の出力信号
とを加える加算器、5は伝達関数aの制限対象、6は伝
達関数すの制御対象、7は制限対象5の上限および下限
リミッタを示す。FIG. 5 is a block diagram showing a conventional control device.
A control reference value setter for setting f, 2 is a control reference value B r
3 is an amplifier, 4 is an adder that adds the output signal of amplifier 3 and the output signal of amplifier 8, 5 is the limit target of transfer function a, 6 is transfer function 7 indicates the upper and lower limiters of the controlled object 5.
次に、動作について説明する。Next, the operation will be explained.
制御対象6の制御基準値Brefを制御・基準値設定器
1に設定し、制御対象6の出力値Bを制御するとともに
、制限対象5の出力値人を上限基準値Amaxと下限基
準値A mi nとの範囲内、すなわち制限値内に制御
する場合、上限および下限りミツタフは出力値Aが上限
基準値Amaxを上回ると負信号を出力し、出力値Aが
下限基準値Am i nを下回ると正信号を出力する。The control reference value Bref of the controlled object 6 is set in the control/reference value setter 1, and the output value B of the controlled object 6 is controlled, and the output value of the restricted object 5 is set to the upper limit reference value Amax and the lower limit reference value Ami. When controlling within the range of n, that is, within the limit value, the upper and lower limit Mitsutaf outputs a negative signal when the output value A exceeds the upper limit reference value Amax, and the output value A falls below the lower limit reference value Amin. and outputs a positive signal.
そして、所定の制限効果が得られるように上限および下
限りミツタフの出力信号を増幅器8によって増幅する。Then, the output signals of the upper and lower limits are amplified by the amplifier 8 so as to obtain a predetermined limiting effect.
次に、増幅器3,8の出力信号を加算器4で加算し、そ
の出力信号によって制限対象5の出力値Aを制限値内に
制御するとともに、制御対象6を制御基準値Brefに
制御する。Next, the output signals of the amplifiers 3 and 8 are added by an adder 4, and the output value A of the limiting object 5 is controlled within the limit value, and the controlled object 6 is controlled to the control reference value Bref.
従来の制御装置は以上のように構成されているので、制
限対象5の出力値Aが制限値外となった場合でも制御対
象6の出力値Bとの加算値によって制御するため、制御
対象6の安定を図シつつ、制限対象5を制限値内に維持
するように増幅器7の伝達関数を決定するのが難しいと
いう問題点があった。Since the conventional control device is configured as described above, even if the output value A of the restricted object 5 is outside the limit value, the control is performed using the added value with the output value B of the controlled object 6. There is a problem in that it is difficult to determine the transfer function of the amplifier 7 so as to maintain the restriction target 5 within the limit value while maintaining stability.
この発明は、上記のような問題点を解消するためになさ
れたもので、制限対象の出力値を制限値内に維持しつつ
、制御対象を安定に制御できる制御装置を得ることを目
的とする。This invention was made to solve the above-mentioned problems, and an object of the present invention is to obtain a control device that can stably control a controlled object while maintaining the output value of the limited object within the limit value. .
この発明に係る制御装置は、制限対象の検出値と制限値
とを第1の比較回路で比較し、第1の比較回路の出力信
号によって制御対象の検出値と制御基準値とを第2.第
3の比較回路で比較するとともに、第1.第2および第
3の比較回路の出力信号によって制御基準値一定制御回
路選択器または制限基準値一定制御回路選択器を選択す
る構成としたものである。The control device according to the present invention compares the detected value of the controlled object with the limit value in the first comparing circuit, and compares the detected value of the controlled object with the control reference value with the output signal of the first comparing circuit. The third comparison circuit performs a comparison, and the first. The configuration is such that the constant control reference value control circuit selector or the constant limit reference value control circuit selector is selected based on the output signals of the second and third comparison circuits.
この発明における制御装置は、制御基準値一定制御回路
選択器が選択されると、制御対象の出力値を制御基準値
にする制御基準値一定制御が行われ、制限基準値一定制
御回路選択器が選択されると、制御対象の出力値を制限
値内にする制限基準値一定制御が行われる。In the control device according to the present invention, when the constant control reference value control circuit selector is selected, the constant control reference value control is performed to set the output value of the controlled object to the control reference value, and the constant limit reference value control circuit selector is When selected, limit reference value constant control is performed to keep the output value of the controlled object within the limit value.
以下、この発明の一実施例を図について説明する。 An embodiment of the present invention will be described below with reference to the drawings.
第1図において、第5図と同一部分には同一符号が付し
てあシ、9は後述する制御基準値一定制御回路選択器の
選択と連動してオンとなるスイッチ、10は制限対象5
の上限基準値Amaxおよび下限基準値Am1nを設定
する制限基準値設定器を示し、制限基準値Arefとし
て上限基準値Amaxまたは下限基準値Am1nを出力
するものである。In FIG. 1, parts that are the same as those in FIG.
This figure shows a limit reference value setter for setting an upper limit reference value Amax and a lower limit reference value Am1n, and outputs the upper limit reference value Amax or the lower limit reference value Am1n as the limit reference value Aref.
11は制限基準値A r e fから制限対象5の出力
値Aを差し引く減算器、12は後述する制限値一定制御
回路選択器の選択と連動してオンとなるスイッチを示す
。Reference numeral 11 denotes a subtractor that subtracts the output value A of the restriction target 5 from the restriction reference value A r e f, and 12 represents a switch that is turned on in conjunction with selection of a constant limit value control circuit selector, which will be described later.
第2図は制御装置の制限回路を示す回路図であシ、図に
おいて、21は第1の比較回路を示し、制限対象5(第
1図)の出力値Aと上限基準値Amaxとを比較する比
較器22A、22Bと、出力値Aと下限基準値Am1n
とを比較する比較器23A 、23Bとで構成されてい
る。24A〜24FはOR回路、25A、25Bは第2
.第3の比較回路としての比較器を示し、比較器25A
は出力値Aが上限基準値A m axを上回ったときに
制御対象6(第1図)の出力値Bと制御基準値B re
fとを比較し、比較器25Bは出力値Bが下限基準値A
m1nを下回ったときに出力値Bと制御基準値B re
fとを比較するものである。26Aは制限対象5の制御
基準値Arefを上限基準値A m a xに設定する
ための第1の設定器、26Bは制限対象5の制限基準値
Arefを下限基準値A mi nに設定するための第
2の設定器、27は制御対象6を制御基準値B ref
のみで制御する制御基準値一定制御回路選択器、28は
制限対象5を制限基準値A r e fのみで制御する
制限基準値一定制御回路選択器、29A〜29Dは第1
〜第4の論理回路選択器を示し、各比較器22A、22
B 、23A、23B。FIG. 2 is a circuit diagram showing a limiting circuit of the control device. In the figure, 21 indicates a first comparison circuit, which compares the output value A of the limiting object 5 (FIG. 1) with the upper limit reference value Amax. Comparators 22A and 22B, output value A and lower limit reference value Am1n
It is composed of comparators 23A and 23B for comparing. 24A to 24F are OR circuits, 25A and 25B are second
.. A comparator as a third comparison circuit is shown, and comparator 25A
is the output value B of the controlled object 6 (Fig. 1) and the control reference value B re when the output value A exceeds the upper limit reference value A max
f, and the comparator 25B determines that the output value B is the lower limit reference value A.
Output value B and control reference value B re when the value is less than m1n
It is compared with f. 26A is a first setting device for setting the control reference value Aref of the restriction target 5 to the upper limit reference value Amax, and 26B is a first setting device for setting the restriction reference value Aref of the restriction target 5 to the lower limit reference value Amin. A second setter 27 sets the control target 6 to the control reference value B ref
28 is a limit reference value constant control circuit selector that controls the restriction target 5 only with the limit reference value A r e f; 29A to 29D are first control reference value constant control circuit selectors;
- shows a fourth logic circuit selector, each comparator 22A, 22
B, 23A, 23B.
25A、25Bの出力信号が同じ状態を維持している限
シは同じ論理ルートを通るようにするためのものである
。This is to ensure that the output signals of 25A and 25B pass through the same logical route as long as they maintain the same state.
上記した各比較器22A、22B 、23A、23B。Each of the above-mentioned comparators 22A, 22B, 23A, 23B.
25Aおよび25Bは第3図に示すように1比較入力例
号X1.X2の大小関係によって出力信号Y1.Y2を
出力する。25A and 25B are 1 comparison input example No. X1. as shown in FIG. Depending on the magnitude relationship of X2, the output signal Y1. Output Y2.
次に、動作について説明する。Next, the operation will be explained.
制限、制御動作が開始されると、まず、第1の論理回路
選択器29Aが選択され、比較器22Aで制限対象5の
出力値人と上限基準値Amaxとを比較し、出力値Aが
上限基準値Amaxを下回ってhると、比較器23Aで
出力値Aと下限基準値A m i nとを比較する。そ
の結果、出力値Aが下限基準値Am1nを上回っている
と、制御基準値一定制御回路選択器27が選択されてス
イッチ9がオンとなり、出力値Bが制御基準値Href
となるように制御基準値一定制御が行われる。これと同
時に、第1の論理回路選択器29Aが選択され、比較器
22A、23Aでの出力値A、上限基準値A m a
xおよび下限基準値Am1nの大小関係に変化がなけれ
ば、両選択器27.29Aの選択が継続される。When the restriction and control operations are started, first, the first logic circuit selector 29A is selected, and the comparator 22A compares the output value of the restriction target 5 with the upper limit reference value Amax, and the output value A is the upper limit. When the value falls below the reference value Amax for h, the comparator 23A compares the output value A with the lower limit reference value A min. As a result, if the output value A exceeds the lower limit reference value Am1n, the control reference value constant control circuit selector 27 is selected, the switch 9 is turned on, and the output value B is set to the control reference value Href.
Control reference value constant control is performed so that. At the same time, the first logic circuit selector 29A is selected, and the output value A at the comparators 22A and 23A is the upper limit reference value A m a
If there is no change in the magnitude relationship between x and the lower limit reference value Am1n, selection by both selectors 27.29A is continued.
次に1比較器22Aで出力値Aと上限基準値Amaxと
を比較して出力値Aが上限基準値Am axを上回って
いると、比較器25Aで制御対象6の出力値Bと制御基
準値B refとを比較する。その結果、出力値Bが制
御基準値B refを下回っていると、制限対象5の制
限基準値Arefとして上限基準値Amaxを設定し、
制限基準値一定制御回路選択器28が選択されてスイッ
チ12がオンとなシ、出力値Aが制限基準値Aref、
つまシ上限基準値Amaxを下回るように制限基準値一
定制御が行われる。これと同時に、第4の論理回路選択
器29Dが選択され、比較器24Aでの出力値Bと制御
基準値B refの大小関係に変化がなければ、両選択
器28.29Dの選択が継続される。同様にして両選択
器27.29Bまたは28,290が選択され、制御基
準値または制限基準値一定制御が行われる。Next, the comparator 22A compares the output value A with the upper limit reference value Amax, and if the output value A exceeds the upper limit reference value Amax, the comparator 25A compares the output value B of the controlled object 6 with the control reference value. Compare with B ref. As a result, if the output value B is lower than the control reference value B ref, the upper limit reference value Amax is set as the restriction reference value Aref of the restriction target 5,
When the limit reference value constant control circuit selector 28 is selected and the switch 12 is turned on, the output value A becomes the limit reference value Aref,
Limit reference value constant control is performed so that the limit reference value is below the upper limit reference value Amax. At the same time, the fourth logic circuit selector 29D is selected, and if there is no change in the magnitude relationship between the output value B of the comparator 24A and the control reference value Bref, the selection of both selectors 28 and 29D is continued. Ru. Similarly, both selectors 27, 29B or 28, 290 are selected, and the control reference value or limit reference value constant control is performed.
とのよ5fk制御を第4図の7a−チャートに示す。Tonoyo 5fk control is shown in chart 7a of FIG.
以上のように、出力値A、上限基準値Amaxおよび下
限基準値A m t n%または出力値B、制御基準値
Brefの大小関係により、第1〜第4の論理回路選択
器29A〜29Dの選択を変更しながら制御基準値また
は制限基準値一定制御を行うので、制限対象5の出力値
Aを制限値内に維持しつつ、制御対象6の出力値Bを安
定して制御基準値B refに制御することが容易に、
かつ、早くできる。As described above, depending on the magnitude relationship of the output value A, the upper limit reference value Amax and the lower limit reference value A m t n% or the output value B and the control reference value Bref, the first to fourth logic circuit selectors 29A to 29D are selected. Since the control reference value or limit reference value constant control is performed while changing the selection, the output value A of the limit object 5 is maintained within the limit value, and the output value B of the control object 6 is stabilized to the control reference value B ref. Easy to control,
And it can be done quickly.
なお、上記実施例では制限基準値Arefを上限基準値
Amaxまたは下限基準値Am inとして説明したが
、出力値Aの検出誤差および制限誤差を考慮した補正値
としてもよい。In the above embodiment, the limit reference value Aref has been described as the upper limit reference value Amax or the lower limit reference value Amin, but it may be a correction value that takes into account the detection error and limit error of the output value A.
以上のように、この発明によれば、第1.第2および第
3の比較回路の出力信号によって制御基準値一定制御回
路選択器または制限基準値一定制御回路選択器を選択す
る構成としたので、制限対象の出力値を制限値内に維持
しつつ、制御対象の出力値を安定して制御基準値に制御
することが容易に、かつ、早くできるという効果がある
。As described above, according to the present invention, the first. Since the configuration is such that the constant control reference value control circuit selector or the constant limit reference value control circuit selector is selected based on the output signals of the second and third comparison circuits, the output value to be limited is maintained within the limit value. This has the effect that the output value of the controlled object can be stably controlled to the control reference value easily and quickly.
第1図はこの発明の一実施例による制御装置を示すブロ
ック図、第2図はこの発明の一実施例による制御装置の
制限回路を示す回路図、第3図は比較器の入力信号と出
力信号との関係を示す説明図、第4図は動作を示すフロ
ーチャート、第5図は従来の制御装置を示すブロック図
である。
1は制御基準値設定器、5は制限対象、6は制御対象、
9,12はスイッチ、10は制限基準値設定器、21は
第1の比較器、25A、25Bは比較器、27は制御基
準値一定制御回路選択器、28は制限基準値一定制御回
路選択器を示す。
図中、同一符号は同一、または相当部分を示す。FIG. 1 is a block diagram showing a control device according to an embodiment of the present invention, FIG. 2 is a circuit diagram showing a limiting circuit of the control device according to an embodiment of the invention, and FIG. 3 is an input signal and output of a comparator. FIG. 4 is a flowchart showing the operation, and FIG. 5 is a block diagram showing a conventional control device. 1 is a control reference value setter, 5 is a restriction target, 6 is a control target,
9 and 12 are switches, 10 is a limit reference value setter, 21 is a first comparator, 25A and 25B are comparators, 27 is a control reference value constant control circuit selector, and 28 is a limit reference value constant control circuit selector. shows. In the figures, the same reference numerals indicate the same or corresponding parts.
Claims (1)
限値とを比較し、前記出力値が前記制限値内にある第1
の信号、前記出力値が前記上限基準値よりも大きい第2
の信号、または前記出力値が前記下限基準値よりも小さ
い第3の信号を出力する第1の比較回路と、前記第2の
信号によつて制御対象の出力値と制御基準値とを比較し
、前記制御対象の出力値が前記制御基準値よりも大きい
第4の信号、または前記制御対象の出力値が前記制御基
準値よりも小さい第5の信号を出力する第2の比較回路
と、前記第3の信号によつて前記制御対象の出力値と前
記制御基準値とを比較し、前記制御対象の出力値が前記
制御基準値よりも大きい第6の信号、または前記制御対
象の出力値が前記制御基準値よりも小さい第7の信号を
出力する第3の比較回路と、前記第1、第4または第7
の信号によつて選択される制御基準値一定制御回路選択
器と、前記第5または第6の信号によつて選択される制
限基準値一定制御回路選択器とを備えた制御装置。The output value to be limited is compared with a limit value consisting of an upper limit reference value and a lower limit reference value, and the output value is within the limit value.
a second signal, the output value of which is greater than the upper reference value;
or a third signal whose output value is smaller than the lower limit reference value, and a first comparison circuit that outputs a signal of , a second comparison circuit that outputs a fourth signal in which the output value of the controlled object is larger than the control reference value, or a fifth signal in which the output value of the controlled object is smaller than the control reference value; A third signal is used to compare the output value of the controlled object with the control reference value, and a sixth signal indicates that the output value of the controlled object is larger than the control reference value, or the output value of the controlled object is larger than the control reference value. a third comparison circuit that outputs a seventh signal smaller than the control reference value;
A control device comprising: a constant control reference value control circuit selector selected by the signal; and a constant limit reference value control circuit selector selected by the fifth or sixth signal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP33588987A JPH0743601B2 (en) | 1987-12-29 | 1987-12-29 | Control device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP33588987A JPH0743601B2 (en) | 1987-12-29 | 1987-12-29 | Control device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH01175604A true JPH01175604A (en) | 1989-07-12 |
JPH0743601B2 JPH0743601B2 (en) | 1995-05-15 |
Family
ID=18293506
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP33588987A Expired - Lifetime JPH0743601B2 (en) | 1987-12-29 | 1987-12-29 | Control device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0743601B2 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010178510A (en) * | 2009-01-29 | 2010-08-12 | Mitsubishi Electric Corp | Motor synchronization control device |
JP2010178509A (en) * | 2009-01-29 | 2010-08-12 | Mitsubishi Electric Corp | Motor drive control device |
JP2012120412A (en) * | 2010-12-03 | 2012-06-21 | Mitsubishi Electric Corp | Controller |
-
1987
- 1987-12-29 JP JP33588987A patent/JPH0743601B2/en not_active Expired - Lifetime
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010178510A (en) * | 2009-01-29 | 2010-08-12 | Mitsubishi Electric Corp | Motor synchronization control device |
JP2010178509A (en) * | 2009-01-29 | 2010-08-12 | Mitsubishi Electric Corp | Motor drive control device |
JP2012120412A (en) * | 2010-12-03 | 2012-06-21 | Mitsubishi Electric Corp | Controller |
Also Published As
Publication number | Publication date |
---|---|
JPH0743601B2 (en) | 1995-05-15 |
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