JPH01169826U - - Google Patents

Info

Publication number
JPH01169826U
JPH01169826U JP1988066703U JP6670388U JPH01169826U JP H01169826 U JPH01169826 U JP H01169826U JP 1988066703 U JP1988066703 U JP 1988066703U JP 6670388 U JP6670388 U JP 6670388U JP H01169826 U JPH01169826 U JP H01169826U
Authority
JP
Japan
Prior art keywords
circuit
pull
devices
utility
model registration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1988066703U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988066703U priority Critical patent/JPH01169826U/ja
Publication of JPH01169826U publication Critical patent/JPH01169826U/ja
Pending legal-status Critical Current

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  • Maintenance And Management Of Digital Transmission (AREA)
  • Power Sources (AREA)
  • Logic Circuits (AREA)
  • Dc Digital Transmission (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案によるカメラとデータバツクの
外観図、第2図はそれらの回路ブロツク図、第3
図は本考案による第1実施例を示す回路図、第4
図は本考案による第2実施例を示す回路図である
。 〔主要部分の符号の説明〕、1……カメラ、2
……データバツク、7,10……CPU、8,9
……インターフエイス回路、25,35,55,
56……ダイオード。
Figure 1 is an external view of the camera and data bag according to the present invention, Figure 2 is their circuit block diagram, and Figure 3 is a diagram of their circuit block diagram.
The figure is a circuit diagram showing the first embodiment of the present invention;
The figure is a circuit diagram showing a second embodiment of the present invention. [Explanation of symbols of main parts], 1...Camera, 2
...Data back, 7,10...CPU, 8,9
...Interface circuit, 25, 35, 55,
56...Diode.

Claims (1)

【実用新案登録請求の範囲】 互いに作動電圧の異なる装置間の信号伝達用イ
ンターフエイス回路において、 プルアツプ回路と逆流逆流阻止回路と受信信号
の電圧判別回路を備えた事を特徴とする装置間の
インターフエイス回路。
[Claims for Utility Model Registration] An interface circuit for signal transmission between devices having different operating voltages, characterized by comprising a pull-up circuit, a backflow prevention circuit, and a received signal voltage discrimination circuit. face circuit.
JP1988066703U 1988-05-20 1988-05-20 Pending JPH01169826U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988066703U JPH01169826U (en) 1988-05-20 1988-05-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988066703U JPH01169826U (en) 1988-05-20 1988-05-20

Publications (1)

Publication Number Publication Date
JPH01169826U true JPH01169826U (en) 1989-11-30

Family

ID=31292099

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988066703U Pending JPH01169826U (en) 1988-05-20 1988-05-20

Country Status (1)

Country Link
JP (1) JPH01169826U (en)

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