JPS6129558U - active receive circuit - Google Patents

active receive circuit

Info

Publication number
JPS6129558U
JPS6129558U JP11260584U JP11260584U JPS6129558U JP S6129558 U JPS6129558 U JP S6129558U JP 11260584 U JP11260584 U JP 11260584U JP 11260584 U JP11260584 U JP 11260584U JP S6129558 U JPS6129558 U JP S6129558U
Authority
JP
Japan
Prior art keywords
receive circuit
active receive
signal
cable
current signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11260584U
Other languages
Japanese (ja)
Inventor
聡 夏井
義嗣 森岡
Original Assignee
横河電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 横河電機株式会社 filed Critical 横河電機株式会社
Priority to JP11260584U priority Critical patent/JPS6129558U/en
Publication of JPS6129558U publication Critical patent/JPS6129558U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本考案を実施したアクティブレシーブ回路の
回路図、第2図は、本考案を★施したアクティブレシー
ブ回路の動作を説明するためのタイムチャート、第3図
は、従来のアクティブレシ一ブ回路の回路図、第4図は
、従来のアクティブレシーブ回路の動作を説明するため
のタイムチャート、第5図は従来のアクティブレシーブ
回路の回路図、第6区は、第5図に示す従来のアクティ
ブレシーブ回路の等価回路図、第7図は、第5図に示す
従来のアクティブレシーブ回路の動作を説明するための
タイムチャート、第8図は、第7図の′タイムチャート
の一部を拡大した図。 1・・・送信側、2・・・伝送ケーブル、3・・・受信
側、R, R1, R2, R3, R,, R5−.
一抵抗器、s ”’スイッチ素子、d1,d2−・・ダ
イ1−ド素子、1q・・・ツエナ一ダイオード。
Fig. 1 is a circuit diagram of an active receive circuit implementing the present invention, Fig. 2 is a time chart for explaining the operation of the active receive circuit implementing the present invention, and Fig. 3 is a circuit diagram of a conventional active receive circuit. Figure 4 is a time chart for explaining the operation of a conventional active receive circuit. Figure 5 is a circuit diagram of a conventional active receive circuit. Section 6 is shown in Figure 5. An equivalent circuit diagram of a conventional active receive circuit, FIG. 7 is a time chart for explaining the operation of the conventional active receive circuit shown in FIG. 5, and FIG. 8 is a part of the 'time chart of FIG. 7. An enlarged view. 1... Transmission side, 2... Transmission cable, 3... Receiving side, R, R1, R2, R3, R,, R5-.
1 resistor, s'' switch element, d1, d2--die 1-de element, 1q... Zener-1 diode.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 送信側スイッチ素子のオンオフより電流信号をケーブル
を介して送信し、受信側において前記電流信号を電圧信
号に変換して受信し送信された信号に対応する信号を出
力するアクティブレシーブ回路において、前記受信側の
電源とケーブルの中間にツエナーダイオードを設けてな
ることを特徴とするアクティブレシーブ回路。
In an active receive circuit that transmits a current signal via a cable by turning on and off a switching element on a transmitting side, converts the current signal into a voltage signal on a receiving side, and outputs a signal corresponding to the transmitted signal. An active receive circuit characterized by a Zener diode provided between the side power supply and the cable.
JP11260584U 1984-07-25 1984-07-25 active receive circuit Pending JPS6129558U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11260584U JPS6129558U (en) 1984-07-25 1984-07-25 active receive circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11260584U JPS6129558U (en) 1984-07-25 1984-07-25 active receive circuit

Publications (1)

Publication Number Publication Date
JPS6129558U true JPS6129558U (en) 1986-02-22

Family

ID=30671647

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11260584U Pending JPS6129558U (en) 1984-07-25 1984-07-25 active receive circuit

Country Status (1)

Country Link
JP (1) JPS6129558U (en)

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