JPH01169773A - Hard disk control device - Google Patents

Abstract

PURPOSE:To attain the efficient using of a waiting time for other working with a host computer by providing an interruption circuit and discriminating the possible condition of a signal transferring based on an interrupt signal with the host computer. CONSTITUTION:For a hard disk control device HDD1, when a disk becomes a constant rotation, a ready signal (b) of an HDD control microcomputer 11 is reversed at a high level. Then, a low level signal is outputted as an interrupt signal (i) from an interrupt circuit 2. In a host computer 20, an interrupt processing routine is practiced by a signal 1, the signal (b) is discriminated whether it is the low level or the high level, and the ready condition of the HDD1 is discriminated. Then, from the time when the signal (i) and the ready signal are obtained at the same time, the interruption processing of the HDD1 is executed. But, after an electric power supply is turned on there is a waiting time till a signal transmission and reception with the computer 20 comes to be possible. Since during the waiting time, the computer 20 can executes other working, an efficient using is attained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a hard disk control device used as an auxiliary storage device for a personal computer or the like.

[Prior Art 1 The control system of, for example, a winchiesta type hard disk driver (hereinafter referred to as HDD) used as an auxiliary storage for personal computers, etc. is as follows:
The configuration is as shown in Figure 3.

As shown in FIG. 3, II D D I O is l-I
The HDD control microcomputer 11 controls the host station and the HDD control microcomputer 11.
It controls signal exchange with the D main unit, that is, the hard disk memory.

When this HDDIO is powered on, a hard disk (not shown) rotates, and each time the hard disk rotates once, the index sensor 12 detects an index signal a.

This index (g number a is l (DD) is monitored by the DD control microcomputer 11.

In the HDD control microcomputer 11, the index signal a has a fixed period (for example, 16.67 m5ec).
When the signal starts to be output, it is determined that it is possible to send and receive signals to the hard disk, and at this time, the ready signal is set to a high level state.

On the host computer 20 side, the drive select signal (DRIVE 5 ELECT) is determined so that the readiness signal from the HDD control microcomputer 11 becomes high level.

That is, when the drive select signal C is set to low level, the signal inputted to the Nant gate 14 by the inverter 13 becomes high level.

Therefore, in this state, the output signal from the Nant gate 14 is an inverted version of the ready signal from the HDD control microcomputer 11.

On the host computer 20 side, the ready signal t
(Inverted signal) is low level, HD Dlo and (
It was determined that the transfer of No. 3 was possible.

[Problems to be Solved by the Invention] By the way, in the above-described configuration, the 1-I D
It takes 10 to 20 seconds from the time the power is turned on until signals can be exchanged between the computer 10 and the host computer 20.

Therefore, on the host computer 20 side, the ready signal line had to be polled until the ready signal line 42 was obtained.

However, there was a problem in that the host computer 20 could not execute other jobs during polling.

Therefore, the present invention solves these conventional problems with a simple structure, and provides a hard disk control system that enables the host computer to effectively use the waiting time (the time it takes for the HDD to become ready). This paper proposes a device.

[Technical means for solving the problems] In order to solve the above problems, the present invention includes an index sensor that detects a signal output every time the data recording hard disk rotates once, and In a hard disk control device consisting of a control microcomputer or the like that controls signals, an interrupt circuit is provided that sends an interrupt signal to the host computer when signals can be exchanged after power is turned on. The present invention is characterized in that the host computer determines whether a signal can be exchanged based on an interrupt signal from the interrupt circuit.

[Function] In this configuration, hard disk control device 4 (DD)
1, after the power is turned on, when the disk starts rotating at a constant cycle, the ready signal of the HDD control icon 11 is inverted to high level.

When the ready signal becomes high level, the interrupt circuit 2 outputs a low level signal 411 as an interrupt signal i.

On the host computer 20 side, an interrupt processing routine is executed by this interrupt signal i, and the ready state of the HDD 1 can be determined.

In other words, on the host computer 20 side, it is determined from the state of the ready signal whether or not the HDD 1 signal transfer is possible, and after the interrupt signal i and the ready signal t are obtained at the same time, the interrupt signal of the HDD 1 is determined. The loading process is executed.

Therefore, from the time the power is turned on to the HDD 1 until it becomes possible to exchange signals with the host computer 20, that is, until the interrupt signal i is set to low level, the host computer 20 side is unable to perform other tasks. (job) can be executed.

[Embodiment] Next, a case in which an example of the HDD according to the present invention is applied to a personal computer will be described in detail with reference to FIG. 1 and subsequent figures.

FIG. 1 shows a Windisk type HDD according to the present invention.
FIG. 3 is a diagram showing signal exchange between the computer and the host computer.

In the figure, 1 is a hard disk control device (HDD),
The HDD 1 includes an interrupt circuit 2, an HDD control microcomputer 11, an index sensor 12, and the like.

The interrupt circuit 2 is composed of a NOR gate 3, a D-type flip-flop 4, and an oven collector buffer 5, and an interrupt signal i is outputted from the interrupt circuit 2 to an interconnected terminal of the host computer 20.

The index sensor 12 detects the rotational state of a hard disk (not shown), and in this example, one index signal (pulse) a is output every time the hard disk rotates once.

The HDD control microcomputer 11 monitors the index signal a after turning on the power to the HDD 1, and outputs a ready signal as a high-level signal when the hard disk starts rotating at regular intervals (for example, 16, 67 m5ec). be done.

The following describes the operation of the HDD 1 having the above configuration from power-on to interrupt processing.

First, when the HDD 1 is powered on, the HDD control microcomputer 11 monitors the index signal a.

Until this index signal a is inputted at a constant cycle, that is, until the rotation is stabilized, the ready signal S is kept at a low level.

Therefore, the output of the D-type flip-flop 4 is not inverted during this period.

Moreover, immediately after the power is turned on, the reset signal r from the HDDI reset circuit (not shown) is at a high level.
The output signal n of the NOR gate 3 becomes low level, and the type I rough flip-flop 4 is cleared, and as a result, the interrupt signal i
becomes high level.

Interrupt processing is active when the interrupt signal i is at a low level.As mentioned above, while the interrupt signal i is at a high level, the HDD 1 is not in a ready state, so the host computer 20 is unable to perform other tasks ( job) can be executed.

Next, when the rotation of the disk becomes stable and the index signal a reaches a constant period, the ready signal a is inverted to a high level.

Since the input terminal of the D-type flip-flop 4 is pulled up to the power supply voltage through the resistor R, the level of the D terminal is latched at the timing of the ready signal input to the clock terminal ck.

Therefore, the output terminal Q of the D-type flip-flop 4 is inverted to high level.

This output signal is outputted to the host computer 20 via the oven collector buffer 5 as an interrupt signal i (low level).

As described above, since the interrupt signal i becomes active when it is at a low level, the host computer 20 executes interrupt processing only after receiving the interrupt signal i.

When the interrupt processing routine is called, the drive select signal C is set to low level, and the state of the ready signal, that is, whether the ready signal is high or low level, is determined, and the state of the ready signal is stored in the memory in the host computer 20. Stored.

At this time, since the NOR gate 3 is supplied with the inverted signal (high level signal) of the drive select signal and the reset signal r (low level signal), the D-type flip-flop 4 is cleared by the output, and the interrupt signal i will be reset (high level signal).

That is, the D-type flip-flop 4 is returned to its original state.

After the host computer 20 side determines the ready state of I-IDDI by the ready signal, the drive select signal C is reset (High Reno Sule No. 13), and the state is returned to the state before the interrupt routine. .

By executing such an interrupt routine, the host computer 20 can determine whether the HDD I is in a ready state.

This HDDI ready state is maintained until the power of H1) D1 is turned off, so the post computer 2
Even if it is entered from the 0 side, it is possible to exchange signals with l(D D 1).

Next, a case where two or more HDDs are connected to the host computer 20 by a daisy chain or the like will be described.

All the host computer 20 has to do is determine which HDD 1 is in the ready state when the interrupt signal i is set to low level.

Therefore, the host computer 20 executes an interrupt processing routine as shown in FIG.
) ] is in the ready state.

Therefore, as shown in Figure 2, the interrupt handling routine is as follows:
First, the counter N is initialized to °゛O''゛ (Sl).

For example, when the number of I-(DDLs connected to the host computer 20 is n), this counter N is "
o'' to °゛n-1°°.

Next, in the host computer 20, drive select No. 48C is set to low level (S2). That is, the drive select signal of the first HDD control microcomputer 11 (N=0) is set.

As a result, the state of the ready 48 of the IIDD control microcomputer 11 is determined by the ready signal, and the state is stored in the memory in the host computer 2o (S3).

In the host computer 20, after determining the ready state of the HDDI, the drive select signal C is returned to high level (S4).

That is, the first HDD control microcomputer 11
(N=O) drive select number 48 is reset.

Next, the value of the counter N is the number of l-[D D 1 connected to the host computer 20, zunawara "'n-1
It can be determined whether or not it matches (S5).

As a result, if they do not match, the counter N is incremented by 1 (
S6), the next HDD control microcomputer 11 (
N=1) drive select signal is set (S2
).

Thereafter, the interrupt processing routine described above is executed again.

When the counter N matches BIl(n-1) of f(D D 1) connected to the host computer 20 at 85, this interrupt handling routine ends.

As described above, even when a plurality of HDDs 1 are connected to the host computer 20, the post computer 20 can determine the ready status of each HDD 1.

As a result, the host computer 20 can perform other tasks (jo b) until it receives the interrupt signal i from the HDD control microcomputer 11.

[Effects of the Invention] As explained above, the present invention is composed of an index sensor that detects a signal output every time a data recording hard disk rotates once, and a control microcomputer that controls the signal after power is turned on. In the hard disk control device, an interrupt circuit is provided which sends an interrupt signal to the host computer at the point when signal exchange is enabled after the power is turned on, and the interrupt signal from the interrupt circuit is The present invention is characterized in that the host computer determines whether the signal exchange is possible based on the above information.

Therefore, according to the configuration of the present invention, after the power is turned on to the DD until the interrupt signal is output from the HDD control microcomputer to the host computer,
In other words, the host computer can perform other tasks (1ob) until the HDD becomes ready.

Therefore, the host computer can execute other jobs without waiting for the ready state of the IDD, so that the host computer can effectively use the waiting time.

Therefore, the HDD according to the present invention is extremely suitable for application to the above-mentioned personal computers and the like.

[Brief explanation of the drawing]

FIG. 1 is a system diagram showing an example of a hard disk control device according to the present invention, FIG. 2 is a flowchart showing an interrupt processing routine, and FIG. 3 is a system diagram showing a conventional hard disk control device. 1... Hard disk control device 2... Interrupt circuit 11... Hard disk drive control microcomputer 12... Inch sensor a... Index signal b... Ready signal C... Drive select signal i ...Interrupt signal

Claims (1)

[Claims] (1) In a hard disk control device consisting of an index sensor that detects a signal output every time a data recording hard disk rotates, and a control microcomputer that controls signals after power is turned on, signals are exchanged after power is turned on. An interrupt circuit is provided that sends an interrupt signal to the host computer when the signal becomes possible, and the host computer determines whether the signal can be exchanged based on the interrupt signal from the interrupt circuit. A hard disk control device characterized by: