JPH01161505A - Device for managing real time of process controller - Google Patents

Abstract

PURPOSE:To drastically reduce time errors among numerous controllers by giving timing signals supplied from one set of time managing controller to be used as a reference to the numerous controllers as interruption signals at every fixed time. CONSTITUTION:Numerous controllers 2 (21-2n) reset fixed times in their own clocks upon receiving timing signals from a time managing controller 1 as interruption signals. The timing signals are generated at every, for example, 1hr T. Each controller 2 resets the absolute time which is the sum of the time of the previous interrupting time and the time T. Therefore, time error among the numerous controllers 2 can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a real time management device for a process controller suitable for accurately matching the real time of a plurality of process controllers that independently perform process control.

[Conventional technology]

Atomic couplants and the like are configured to be controlled by a plurality of independent process controllers.

Each process controller manages real time using its own clock, and displays or stores time data along with process data. However, the clocks of each controller do not necessarily match and have an error.If there is an error in the time of the clock, it becomes impossible to accurately grasp temporal changes in the process amount.

Conventionally, in order to match the clock times of each controller, a host computer periodically sends time data to each controller so that the times match. This is described in Japanese Patent Application Laid-Open No. 59-81733.

[Problem that the invention seeks to solve]

However, it is difficult to simultaneously transmit time data to a large number of controllers due to the processing capacity of the host computer, and errors occur due to differences in the transmission time required for transmission to each controller. Therefore, there is a problem in that the error in the current time becomes large among a large number of controllers.

An object of the present invention is to provide a real-time management device for process controllers that can significantly reduce time errors of a large number of controllers. - (Means for solving the problem) The above purpose is to provide a timing signal from one reference time management controller to many controllers at fixed times (fixed times), and the many controllers to interrupt the timing signal. This is achieved by resetting a fixed time on one's own clock as a signal. Here, fixed time means an absolute time such as 1 o'clock, 2 o'clock, etc.

(Operation) Many process controllers reset the fixed time on their own clocks using the timing signal generated by the time management controller as an interrupt signal.The timing signal is generated, for example, every hour T.Each controller Since the absolute time is reset to the own clock by adding the time T to the current time, the time error between many controllers can be reduced.

〔Example〕

An embodiment of the present invention will be described below with reference to FIG.

In FIG. 1, the time management controller 1 is composed of a central processing bag [3A, a clock 4A, a time setting section 5A, and a digital output section 6. The time is set by the operator in the time setting section 5.
It is input from A and set in the clock 4A. The central processing unit 3A determines the time on the clock 4A, and turns on the output of the digital output section 6 for a period of time To every fixed period of time T.

The n process controllers 21 to 2n include central processing units 31 to 3n, clocks 41 to 4n, time setting units 51 to 5n,
Process signal input units 91 to 9n, interrupt input units 71 to
7n and display/recording sections 81 to 8n, respectively. The process controllers 21 to 2n normally take in process quantities via process input/output units 91 to 9n, and provide process control signals to execute process control. When an abnormality or the like occurs in the process, the time data read from the clocks 41 to 4n is added to the process data and displayed or recorded in the display recording sections 81 to 8n.

The time on the clocks 41 to 4n of each controller is set by the operator in the time setting section 5 in the initial state (when the controller is started).
Input from 1 to 5n.

The timing signal output from the time management controller 1 is input to the interrupt input units 71 to 7n, and
An interrupt signal is given to 1 to 3n.

When the central processing units 31 to 3n receive an interrupt signal, the central processing units 31 to 3n
Execute the process shown in the diagram. The operation will be explained with reference to the time chart shown in FIG.

Normal process control processing is steps A and B.

Suppose that they are C and D. Now, if an interrupt occurs at K when moving from step B to step C, the processes of steps ft and fze fa are executed with priority. The current interrupt processing is assumed to be processing at time t+T. The time management controller 1 generates a timing signal having a time width To as shown in FIG. 3(b). The interrupt input sections 71 to 7n generate an interrupt signal shown in FIG. 3(C) at the rising edge of the timing signal. The central processing units 31 to 3n execute interrupt processing in response to this interrupt signal. First, in step f1, the time Tn of the own clocks 41 to 4n is read out. In step f2, the time is determined to be 10T and corrected. This correction operation will be explained using a specific example.

The time management controller 1 generates a timing signal at one hour intervals, and time t+T is assumed to be 9 am.

Assume that the times Tn of the controllers 21, 22, and 2n in this case are as follows, for example.

Controller 21: 9:10 a.m. Controller 22: 8:55 a.m. Controller 2n: 9:25 a.m. In this case, the fixed time closest to each of the three controllers 21, 22゜2n is 9:00 a.m. So I'll adjust the time to 9am.

After the correction is made in step f2, the process moves to step f3, and the time 9:00 is set on the clocks 41 to 4n. Such interrupt processing is performed every t+1T (i is 1, 2, 3, . . . ).

Although such interrupt processing is performed to reset the absolute time (fixed time) to the clocks 41 to 4n, the interrupt processing time Tb is less than 1 rns, and it is possible to set the clock accurately by simply providing an interrupt signal. It can be set to 41 to 4n. Therefore, time management of process data can be performed accurately.

Next, an example of how to use time data when the clock 41 of the controller 21 produces an error by time T& as shown in FIG. 3(a) will be described.

For example, the error time T of the clock 41 is set to 10 as in the above example.
When recording at 9:30 a.m., the accurate time Tg is determined by the following equation.

In this case, 9:25, which is 5 minutes subtracted from 9:30, which is the time on the clock 41, is recorded. By doing so, it is possible to correct errors inherent in each of the clocks 41 to 4b.

〔Effect of the invention〕

According to the present invention, it is possible to accurately correct the time of the clocks in a large number of process controllers, and also to eliminate the difference in time between the large number of process controllers. Process behavior can be accurately evaluated.

Note that the timing signal generated by the time management controller can be divided into several types of signals with different intervals T for multiple controllers, and a signal such that the time difference falls within the desired accuracy can be input to each controller. can.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a processing flow diagram when a timing signal is input, and FIG. 3 is a time chart for time correction. 1... Time management controller, 21-2, n... Process controller, 3A, 31. ~3n...Central processing unit, 4A, 41~4n-clock, 5A, 51
~5n...Time setting section, 6...Digital output section, 7
1 to 7n...Interrupt input section, 81 to 8n...Display/
Recording section, 91 to 9n... Process signal input/output section.

Claims (1)

[Scope of Claims] 1. A plurality of process controllers that control the process by managing real time using their respective clocks, and a timing signal that generates a timing signal at a fixed time period at each fixed time and that controls the process by controlling the real time using a clock that each controller has. Each process controller receives the timing signal as an interrupt input, looks at its own clock at the time of the interrupt, and selects the closest fixed time among the fixed times determined by the generation cycle of the timing signal. A real time management device for a process controller, characterized in that the current time of the process controller is set in a clock. 2. In claim 1, when the process controller defines the generation cycle T of the timing signal, the time error Ta when the previous timing signal was generated, and the time from inputting the current timing signal to the present time to be A real time management device for a process controller, characterized in that a value obtained by subtracting (T_0/T)t from the time of its own clock is used as the real time.