JPH01159437U - - Google Patents
Info
- Publication number
- JPH01159437U JPH01159437U JP2848789U JP2848789U JPH01159437U JP H01159437 U JPH01159437 U JP H01159437U JP 2848789 U JP2848789 U JP 2848789U JP 2848789 U JP2848789 U JP 2848789U JP H01159437 U JPH01159437 U JP H01159437U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- impedance
- wire
- transformer
- secondary side
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 16
- 238000006243 chemical reaction Methods 0.000 description 5
- 239000003990 capacitor Substances 0.000 description 2
Landscapes
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Description
第1図は電話回路系統を示す図、第2図は従来
の2線4線変換回路図、第3図はこの考案の一実
施例を示す変換回路図、第4図、第5図はその送
話系の等価回路図、第6図、第7図は同じく受話
系の等価回路図、第8図は減衰補正を説明するた
めの等価回路図、第9図は減衰特性を示す図、第
10図、第11図は他の実施例を示す回路図であ
る。
図中、Tはトランス、Z1〜Z4はインピーダ
ンス、Amp1は増幅器、Amp2は差動増幅器
である。
Fig. 1 is a diagram showing a telephone circuit system, Fig. 2 is a conventional 2-wire/4-wire conversion circuit diagram, Fig. 3 is a conversion circuit diagram showing an embodiment of this invention, and Figs. 4 and 5 are the same. 6 and 7 are equivalent circuit diagrams of the receiving system, FIG. 8 is an equivalent circuit diagram for explaining attenuation correction, and FIG. 9 is a diagram showing attenuation characteristics. 10 and 11 are circuit diagrams showing other embodiments. In the figure, T is a transformer, Z 1 to Z 4 are impedances, A mp1 is an amplifier, and A mp2 is a differential amplifier.
補正 平1.4.12
考案の名称を次のように補正する。
考案の名称 電子ハイブリツド回路
実用新案登録請求の範囲、図面の簡単な説明を
次のように補正する。Amendment 1.4.12 Hei 1. The name of the invention is amended as follows. Title of the invention: Electronic hybrid circuit The claims for utility model registration and the brief description of the drawings are amended as follows.
【実用新案登録請求の範囲】
(1) 2線回路と、入力線及び出力線が個別に形
成されている4線回路と、前記2線回路の負荷に
1次側が接続されているトランスと、前記トラン
スの2次側に前記2線回路側からみて整合をとる
ための第1のインピーダンス回路Z3と、前記2
線回路の負荷を2次側に変換したインピーダンス
と等価なインピーダンスの第2のインピーダンス
回路Z2と、前記第1、第2のインピーダンス回
路と前記トランスの2次側との平衡条件を満足す
る第3のインピーダンス回路Z4とを接続してブ
リツジ回路を構成し;前記2線回路からの信号を
前記第1のインピーダンス回路Z3の中間と、第
3のインピーダンス回路Z4の中間から前記出力
線に送出し;前記入力線からの信号を前記第1及
び第3のインピーダンス回路Z3,Z4の接続点
と、前記トランスの2次側と前記第2のインピー
ダンス回路の接続点間へ入力する電子ハイブリツ
ド回路において、前記電子ハイブリツド回路がト
ランス、コンデンサおよび抵抗からなる複素イン
ピーダンスで整合および終端されており、前記第
1のインピーダンス回路Z3と前記第3のインピ
ーダンス回路Z4で複素インピーダンスの一部で
ある前記抵抗を可変抵抗器とし、その中間点から
分圧された出力を取り出すことにより、減衰歪の
補正を行うことを特徴とする電子ハイブリツド回
路。
(2) 前記第1のインピーダンス回路Z3に2線
回路の線路抵抗に応じてブリツジ回路の平衡を調
整するためのパツド回路を有していることを特徴
とする実用新案登録請求の範囲第(1)項記載の電
子ハイブリツド回路。[Claims for Utility Model Registration] (1) A two-wire circuit, a four-wire circuit in which an input line and an output line are formed individually, and a transformer whose primary side is connected to the load of the two-wire circuit, a first impedance circuit Z 3 on the secondary side of the transformer for matching when viewed from the two-wire circuit side;
a second impedance circuit Z2 having an impedance equivalent to the impedance obtained by converting the load of the line circuit to the secondary side; and a second impedance circuit Z2 that satisfies the equilibrium condition between the first and second impedance circuits and the secondary side of the transformer. 3 impedance circuit Z 4 is connected to form a bridge circuit; the signal from the 2-wire circuit is transmitted from the middle of the first impedance circuit Z 3 and the middle of the third impedance circuit Z 4 to the output line. sending the signal from the input line to the connection point between the first and third impedance circuits Z 3 and Z 4 and between the connection point between the secondary side of the transformer and the second impedance circuit; In the electronic hybrid circuit, the electronic hybrid circuit is matched and terminated with a complex impedance consisting of a transformer, a capacitor, and a resistor, and the first impedance circuit Z3 and the third impedance circuit Z4 form part of the complex impedance. An electronic hybrid circuit characterized in that the resistor is a variable resistor, and attenuation distortion is corrected by taking out a voltage-divided output from an intermediate point thereof . (2) The first impedance circuit Z3 includes a pad circuit for adjusting the balance of the bridge circuit according to the line resistance of the two-wire circuit. The electronic hybrid circuit described in item 1).
【図面の簡単な説明】
第1図は電話回路系統を示す図、第2図は従来
の2線4線変換回路図、第3図はこの考案の一実
施例を示す変換回路図、第4図、第5図はその送
話系の等価回路図、第6図、第7図は同じく受話
系の等価回路図、第8図は減衰補正を説明するた
めの等価回路図、第9図は減衰特性を示す図、第
10図、第11図は他の実施例を示す回路図であ
る。
図中、Tはトランス、Z1〜Z4はインピーダ
ンス、Amp1は増幅器、Amp2は差動増幅器
、C2,C3,C4はコンデンサ、R2,R3,
R4は抵抗、P3,P4は可変抵抗器、PADは
パツド回路である。[Brief Description of the Drawings] Fig. 1 is a diagram showing a telephone circuit system, Fig. 2 is a conventional 2-wire/4-wire conversion circuit diagram, Fig. 3 is a conversion circuit diagram showing an embodiment of this invention, and Fig. 4 is a diagram showing a conventional 2-wire/4-wire conversion circuit. Figure 5 is an equivalent circuit diagram of the transmitting system, Figures 6 and 7 are equivalent circuit diagrams of the receiving system, Figure 8 is an equivalent circuit diagram for explaining attenuation correction, and Figure 9 is an equivalent circuit diagram of the receiving system. Figures 10 and 11 showing attenuation characteristics are circuit diagrams showing other embodiments. In the figure, T is a transformer, Z 1 to Z 4 are impedances, A mp1 is an amplifier, A mp2 is a differential amplifier, C 2 , C 3 , C 4 are capacitors, R 2 , R 3 ,
R4 is a resistor, P3 and P4 are variable resistors, and PAD is a pad circuit.
Claims (1)
成されている4線回路と、前記2線回路の負荷に
1次側が接続されているトランスと、前記トラン
スの2次側に前記2線回路側からみて整合をとる
ための第1のインピーダンス回路Z3と、前記2
線回路の負荷を2次側に変換したインピーダンス
と等価なインピーダンスの第2のインピーダンス
回路Z2と、前記第1、第2のインピーダンス回
路と前記トランスの2次側との平衡条件を満足す
る第3のインピーダンス回路Z4とを接続してブ
リツジ回路を構成し;前記2線回路からの信号を
前記第1のインピーダンス回路Z3の中間と、第
3のインピーダンス回路Z4の中間から前記出力
線に送出し;前記入力線からの信号を前記第1及
び第3のインピーダンス回路Z3,Z4の接続点
と、前記トランスの2次側と前記第2のインピー
ダンス回路の接続点間へ入力する電子ハイブリツ
ド回路において、前記第1及び第3のインピーダ
ンス回路Z3,Z4の中間点の信号がポテンシヨ
メータによつて調整可能とされていることを特徴
とする電子ハイブリツド回路。 (2) 前記第1のインピーダンス回路Z3に2線
回路の線路抵抗に応じてブリツジ回路の平衡を調
整するためのパツド回路を有していることを特徴
とする実用新案登録請求の範囲第(1)項記載の電
子ハイブリツド回路。[Claims for Utility Model Registration] (1) A two-wire circuit, a four-wire circuit in which an input line and an output line are formed individually, and a transformer whose primary side is connected to the load of the two-wire circuit, a first impedance circuit Z 3 on the secondary side of the transformer for matching when viewed from the two-wire circuit side;
a second impedance circuit Z2 having an impedance equivalent to the impedance obtained by converting the load of the line circuit to the secondary side; and a second impedance circuit Z2 that satisfies the equilibrium condition between the first and second impedance circuits and the secondary side of the transformer. 3 impedance circuit Z 4 is connected to form a bridge circuit; the signal from the 2-wire circuit is transmitted from the middle of the first impedance circuit Z 3 and the middle of the third impedance circuit Z 4 to the output line. sending the signal from the input line to the connection point between the first and third impedance circuits Z 3 and Z 4 and between the connection point between the secondary side of the transformer and the second impedance circuit; An electronic hybrid circuit characterized in that a signal at a midpoint between the first and third impedance circuits Z 3 and Z 4 can be adjusted by a potentiometer. (2) The first impedance circuit Z3 includes a pad circuit for adjusting the balance of the bridge circuit according to the line resistance of the two-wire circuit. The electronic hybrid circuit described in item 1).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2848789U JPH033009Y2 (en) | 1989-03-15 | 1989-03-15 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2848789U JPH033009Y2 (en) | 1989-03-15 | 1989-03-15 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH01159437U true JPH01159437U (en) | 1989-11-06 |
JPH033009Y2 JPH033009Y2 (en) | 1991-01-25 |
Family
ID=31251894
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2848789U Expired JPH033009Y2 (en) | 1989-03-15 | 1989-03-15 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH033009Y2 (en) |
-
1989
- 1989-03-15 JP JP2848789U patent/JPH033009Y2/ja not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPH033009Y2 (en) | 1991-01-25 |
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