JPH0115895B2 - - Google Patents
Info
- Publication number
- JPH0115895B2 JPH0115895B2 JP54095763A JP9576379A JPH0115895B2 JP H0115895 B2 JPH0115895 B2 JP H0115895B2 JP 54095763 A JP54095763 A JP 54095763A JP 9576379 A JP9576379 A JP 9576379A JP H0115895 B2 JPH0115895 B2 JP H0115895B2
- Authority
- JP
- Japan
- Prior art keywords
- array
- data
- storage device
- input
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000000047 product Substances 0.000 description 13
- 238000003491 array Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 230000006399 behavior Effects 0.000 description 1
- 239000006227 byproduct Substances 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
- H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
Landscapes
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Logic Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9576379A JPS5620335A (en) | 1979-07-27 | 1979-07-27 | Program logic array |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9576379A JPS5620335A (en) | 1979-07-27 | 1979-07-27 | Program logic array |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5620335A JPS5620335A (en) | 1981-02-25 |
| JPH0115895B2 true JPH0115895B2 (enrdf_load_stackoverflow) | 1989-03-22 |
Family
ID=14146520
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9576379A Granted JPS5620335A (en) | 1979-07-27 | 1979-07-27 | Program logic array |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5620335A (enrdf_load_stackoverflow) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0247713A (ja) * | 1988-08-09 | 1990-02-16 | Matsushita Electric Ind Co Ltd | Pla制御装置 |
-
1979
- 1979-07-27 JP JP9576379A patent/JPS5620335A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5620335A (en) | 1981-02-25 |
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