JPH01153775U - - Google Patents
Info
- Publication number
- JPH01153775U JPH01153775U JP5170188U JP5170188U JPH01153775U JP H01153775 U JPH01153775 U JP H01153775U JP 5170188 U JP5170188 U JP 5170188U JP 5170188 U JP5170188 U JP 5170188U JP H01153775 U JPH01153775 U JP H01153775U
- Authority
- JP
- Japan
- Prior art keywords
- output signal
- monostable multivibrator
- pulse width
- signal
- vertical
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Details Of Television Scanning (AREA)
Description
第1図は、本考案の一実施例を示す回路図、第
2図は従来の垂直画像位相調整回路を示す回路図
、第3図は第2図の説明に供する為の波形図、第
4図第5図第6図は第1図の説明に供する為の波
形図である。
7……入力端子、8……第1モノマルチ、9…
…可変抵抗、10……第2モノマルチ、11……
第3モノマルチ。
Fig. 1 is a circuit diagram showing an embodiment of the present invention, Fig. 2 is a circuit diagram showing a conventional vertical image phase adjustment circuit, Fig. 3 is a waveform diagram for explaining Fig. 2, and Fig. 4 is a circuit diagram showing an example of the present invention. 5, 6, and 6 are waveform diagrams for explaining FIG. 1. 7...Input terminal, 8...1st mono multi, 9...
...Variable resistor, 10...Second monomulti, 11...
Third mono multi.
Claims (1)
の発生タイミングに応じて調整し、常に画面の中
心位置を一定にする垂直画像位相調整回路であつ
て、垂直同期信号に応じて一定のパルス幅の出力
信号を発生する第1単安定マルチバイブレータと
、該第1単安定マルチバイブレータの出力信号に
応じて所定幅の出力信号を発生する第2単安定マ
ルチバイブレータと、該第2単安定マルチバイブ
レータの出力信号に応じて一定のパルス幅の出力
信号を発生する第3単安定マルチバイブレータと
から成り、前記第2単安定マルチバイブレータの
出力信号のパルス幅を映像信号の映像内容の発生
タイミングに応じて調整したことを特徴とする垂
直画像位相調整回路。 (2) 第1単安定マルチバイブレータの出力信号
のパルス幅を固定にするとともに第2単安定マル
チバイブレータの出力信号のパルス幅を可変型と
し、前記第1及び第2単安定マルチバイブレータ
の出力信号のパルス幅の和に応じて垂直同期信号
の遅延量を定めるようにしたことを特徴とする請
求項第1項記載の垂直画像位相調整回路。 (3) 第1単安定マルチバイブレータの出力信号
のパルス幅を到来した垂直同期信号周期の1/2程
度に設定し、第2単安定マルチバイブレータの出
力信号のパルス幅の可変量を小さくするようにし
たことを特徴とする請求項第1項記載の垂直画像
位相調整回路。[Claims for Utility Model Registration] (1) A vertical image phase adjustment circuit that adjusts the phase of a vertical synchronization signal according to the timing of occurrence of video content of a video signal to always keep the center position of the screen constant; A first monostable multivibrator that generates an output signal with a constant pulse width in response to a synchronization signal, and a second monostable multivibrator that generates an output signal with a predetermined width in response to the output signal of the first monostable multivibrator. and a third monostable multivibrator that generates an output signal with a constant pulse width according to the output signal of the second monostable multivibrator, and a third monostable multivibrator that generates an output signal of a constant pulse width in accordance with the output signal of the second monostable multivibrator, and A vertical image phase adjustment circuit characterized in that the vertical image phase adjustment circuit is adjusted according to the timing of occurrence of video content of a signal. (2) The pulse width of the output signal of the first monostable multivibrator is fixed, and the pulse width of the output signal of the second monostable multivibrator is variable, and the output signal of the first and second monostable multivibrators is 2. The vertical image phase adjusting circuit according to claim 1, wherein the delay amount of the vertical synchronizing signal is determined according to the sum of pulse widths of the vertical synchronizing signal. (3) Set the pulse width of the output signal of the first monostable multivibrator to about 1/2 of the period of the incoming vertical synchronization signal, and reduce the variable amount of the pulse width of the output signal of the second monostable multivibrator. 2. The vertical image phase adjustment circuit according to claim 1, characterized in that:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5170188U JPH01153775U (en) | 1988-04-18 | 1988-04-18 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5170188U JPH01153775U (en) | 1988-04-18 | 1988-04-18 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01153775U true JPH01153775U (en) | 1989-10-23 |
Family
ID=31277718
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5170188U Pending JPH01153775U (en) | 1988-04-18 | 1988-04-18 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01153775U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH043662A (en) * | 1990-04-20 | 1992-01-08 | Matsushita Electric Ind Co Ltd | Vertical shift circuit |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6096965A (en) * | 1983-10-31 | 1985-05-30 | Nec Home Electronics Ltd | External input corresponding type television set |
JPS626790B2 (en) * | 1982-12-08 | 1987-02-13 | Takashi Mori |
-
1988
- 1988-04-18 JP JP5170188U patent/JPH01153775U/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS626790B2 (en) * | 1982-12-08 | 1987-02-13 | Takashi Mori | |
JPS6096965A (en) * | 1983-10-31 | 1985-05-30 | Nec Home Electronics Ltd | External input corresponding type television set |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH043662A (en) * | 1990-04-20 | 1992-01-08 | Matsushita Electric Ind Co Ltd | Vertical shift circuit |
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