JPH01152774A - Manufacture of josephson junction device - Google Patents

Abstract

PURPOSE:To relax the internal stress of an Nb film, and to obtain a device having excellent reproducibility by forming a recessed trench where corresponding to a scribing line in the surface of a substrate and shaping three layer films. CONSTITUTION:Deep trenches 12 are formed previously to a substrate 11. The trenches are shaped where corresponding to scribing lines, and particularly do not get trouble on element constitution, and three layer films 24-26 are formed continuously onto a cleaned surface through an insulating film 22 by in-line. Consequently, the three layer films 24-26 are cut in the trenches 12 in the scribing lines and are not shaped as continuous films, and the internal stress of an Nb film in the lower electrode 24 can be released. Subsequently, the device is formed through normal patterning working, the process of sputtering by Ar for taking a superconductive contact can also be omitted. Accordingly, the device having junction characteristics having excellent reproducibility is acquired.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for forming a Josephson junction element, and particularly to a structure suitable for relieving internal stress in a lower electrode Nb film.

[Conventional technology]

The conventional Nb film of the lower electrode is
It was divided into several parts and formed. That is, JP-A-61-27
As described in Japanese Patent No. 1877, a part of the lower electrode made of the Nb film is first provided with a convex step on a flat insulating substrate, and then the Nb film of the lower electrode and the tunnel barrier layer are formed on the flat insulating substrate. A
After sequentially forming the QO, film, and upper electrode Nb film,
A joint was formed directly above the step using reactive ion etching. Therefore, this method provides high quality bonding because there is no intervening photo process for pattern formation, and also because it uses a method of forming the lower electrode in two steps. It has the characteristic that the influence of internal stress on bonding properties is small. □However, N
Since the b film is patterned twice, the surface of the first formed Nb pattern on the step is contaminated by photoresist or the like. For this reason, before the next step of forming the three-layer film, it was necessary to perform sputter cleaning with Ar to ensure superconducting contact. However, there were large variations in reproducibility, and there were structural problems in the element configuration.

[Problem that the invention seeks to solve]

In the above-mentioned conventional technology, the formation of the Nb film on the lower electrode of the Josephson junction element is carried out in two steps to alleviate internal stress.
It was done in batches. That is, a flat insulating film Si
After a first Nb film of 150 nm for the lower electrode is formed on the O by sputtering, a resist pattern is formed thereon and an Nb pattern having convex steps is formed by reactive ion etching using CF4 gas. Then, Nb
/A Q Ox / Nb In order to make superconducting contact with the three-layer film, after removing contaminants from the photoresist by sputter cleaning the convex Nb film surface with Ar, a second lower electrode Nb film is deposited on top of it. 50 nm, tunnel barrier layer AlOx film 5 nm, upper electrode Nb film 1100
n is continuously formed by in-line sputtering. Then,
Again, a resist pattern is formed on the upper electrode, and a part of the pattern is processed by reactive ion etching using CF4 gas, including the three-layer film and a part of the lower electrode with the convex step formed in the first step. .

That is, the lower electrode forming the Josephson junction is 1
The Nb film with a thickness of 150 nm was formed as a convex step in the second time, and the Nb film with a thickness of 50 nm was formed by in-line in the second time.
The total film thickness including the Nb film is 200 nm.

As described above, the three-layer film constituting the Josephson junction has the advantage that there is no intervening photo process because it is formed by continuous in-line sputtering.

However, when patterning the convex steps using the Nb film of the lower electrode for the first time, there is a drawback that a photo process is involved once. Therefore, unless the contaminants on the Nb step are completely removed, superconducting contact cannot be established reliably. Also,
At the same time, if the Nb oxide is not completely removed by sputter cleaning using Ar, a similar problem will occur. Furthermore, since the surface state of Nb varies due to sputtering damage, it is thought that the crystal orientation will be affected during the next three-layer film formation. For this.

There were problems with variations in bonding characteristics and reproducibility, and the operating margin of the circuit was extremely narrow, causing problems. Therefore, in order to solve these problems, there is a strong demand for a method for forming a Josephson junction element with a new structure for relieving the internal stress of the lower electrode.

An object of the present invention is to provide a method for forming a Josephson junction element having a structure that can sufficiently alleviate the internal stress of the lower electrode Nb film.

[Means for solving problems]

The above object is achieved by previously forming deep grooves in the substrate. This groove is formed at a position corresponding to the scribe line, and does not pose a problem particularly in terms of device configuration, and the three-layer film is continuously formed in-line on the clean surface after interposing the insulating film.

[Effect]

The three-layer film is cut at the groove of the scribe line, so that the internal stress of the lower electrode Nb film can be released without forming a continuous film. If the layer is then formed by normal pattern processing, the step of sputter cleaning using Ar for making a superconducting contact can be omitted, and an element with bonding characteristics with good reproducibility can be obtained.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1(a) is a plan view showing grooves formed in the Si substrate of the present invention corresponding to the positions of scribe lines. First, AZ1470 resist (trade name of Hoechst, Inc., USA) was spin-coated to a thickness of 2 μm on a Si substrate 11 with a diameter of 50 mmφ, and then heated at 90°C.

Prebaking was performed for 20 minutes. Next, pattern transfer was performed for 20 seconds by contact exposure using a photomask having a scribe line pitch of 5++un and a pattern width of 200 μm. Next, AZ developer: water = 1 =
A resist pattern was formed using composition No. 1 by developing for 60 seconds at a liquid temperature of 24° C., washing with water for 120 seconds, and then spin drying. Next, a pattern was formed by reactive ion etching using CF4 gas, with the etching time set to a depth of 2 μm. After removing the resist with acetone, grooves 12 were formed. FIG. 1(b) shows a sectional view taken along line AA' in FIG. 1(a). It goes without saying that the steeper the groove 12 formed on the surface of the Si substrate 11, the more effective it is. When a three-layer film is successively formed in-line by sputtering, it is important to avoid forming a continuous film. therefore.

It is desirable that the taper angle of the groove 12 be 85 degrees or more.

FIG. 2 is a cross-sectional view when a three-layer film is sputtered on a substrate according to the present invention, and shows an enlarged portion within the dotted circle in FIG. 1(b). After forming a groove in the Si substrate 21 under the conditions described above, an interlayer insulating film Si◯22 was then formed to a thickness of 600 nm. Next, in-line, first, the lower electrode 2
After forming the Nb film No. 4 to a thickness of 200 nm by sputtering, next, the AQ, O, film of the tunnel barrier layer 25 was formed by sputtering to a thickness of 5 nm. Next, the Nb film of the upper electrode 26 is made to have a thickness of 110 mm.
A large Josephson junction was formed on the entire surface of the wafer by 0n sputtering. As a result, as is clear from the figure, the groove 23
It can be seen that the three-layer film is difficult because it does not form a continuous film at the top and bottom of the step. If pattern processing is then performed by reactive ion etching using CF4 gas, a good bonding pattern can be obtained without being affected by the internal stress of the lower electrode.

Furthermore, in the present invention, since the lower electrode is formed in one step, there is no need to worry about contamination by photoresist or the like, so there is no need to consider problems such as superconducting contacts. Furthermore, the grooves provided in the scribe line for relieving internal stress are highly effective in increasing the margin of design in terms of element configuration. therefore.

The present invention has made it possible to solve most of the conventional problems.

FIG. 3 shows a cross-sectional view of an in-line type Nb/AQOx/Nb-based Josephson junction device formed according to the present invention.

The substrate has a diameter of 50 mmφ and a thickness of 400 μm.

A <100> Si substrate 31 was used. First, AZ1470 resist (trade name, manufactured by Hequist, Inc., USA) was formed on the Si substrate 31 to a thickness of 2 μm by spin coating. Next, after prebaking at 90° C. for 20 minutes, pattern transfer was performed for 20 seconds by contact exposure using a photomask having a scribe line pitch of 2.5 mm and a groove pattern width of 180 μm. Next, a development process was performed for 60 seconds at a liquid temperature of 24° C. with a composition ratio of AZ developer:water=1:1, and after washing with water for 120 seconds, spin drying was performed to form a resist pattern. Next, in order to pattern the Si substrate 31, the Si substrate 31 is inserted into a vacuum device, the pressure is reduced, and carbon is etched by reactive ion etching using CF4 gas.
Under the conditions of F4 pressure 26 Pa and N force 100 W, Si in the scribe line was etched to a depth using the resist pattern as a mask.
It was removed by etching to a thickness of 2 μm. Next, after taking it out from the vacuum device, lift-off is performed with acetone to form a 180 μm wide strip at a position corresponding to the scribe line.
, a groove with a depth of 2 μm was formed. Note that the groove in this portion is omitted in the figure. Next, in order to insulate the top of the Si# plate 31, it was inserted into the vacuum apparatus again, the pressure was reduced, and then 300 nm of 5i032 was deposited as an interlayer insulating film. After taking it out from the vacuum equipment, the interlayer insulating film S i O
Do not touch the adhered surface of 32, and apply Nb/A on top of this.
In order to continuously form a flOX/Nb three-layer film in-line, it was inserted into a sputtering apparatus and the pressure was reduced. Next, a 200 nm thick Nb film, which will become the lower electrode 33, was deposited by DC magnetron sputtering. The deposition conditions were Ar pressure 0.
The pressure was 6 Pa and the deposition rate was 3 nm/sec. Next, within the same sputtering apparatus, the Si substrate 31 was moved directly below the AQ target, and AQ was deposited to a thickness of 5 nm. The deposition rate of AQ is 0
．． The speed was set at 2nrn/sec. After film formation, 100 P'a of 02 gas was introduced into the sputtering equipment and the temperature was increased to room temperature (24-26°
Natural oxidation was performed for 40 minutes in C) to form a 34-layer AQOX layer, which is a surface oxide film of AQ (in this example, x = 2).
). After evacuating the inside of the sputtering apparatus again, the Si substrate 31 was moved directly below the Nb target, and a 1100 nm thick Nb film was deposited by DC magnetron sputtering. After continuously forming the three-layer film in-line, the Si substrate 31 was taken out from the sputtering apparatus. Next, first, the lower electrode 33
A resist pattern containing the following was formed on the upper electrode 35 under the following conditions. An AZ1350 resist was formed by spin coating to a thickness of 0.8 μm. Then, 90°C.

After prebaking for 20 minutes, pattern transfer was performed for 8 seconds by contact exposure. Next, AZ Developer: Water =
With a composition of 1=1, development was performed for 60 seconds at a liquid temperature of 24° C., and after washing with water for 120 seconds, spin drying was performed to transfer the resist pattern. Next, in order to perform an etching process, this Si substrate 31 is inserted into a vacuum apparatus and the pressure is reduced. First, the Nb film of the upper electrode 35 is subjected to reactive ion etching using CF4 gas at a CF4 pressure of 26 Pa.

The portion of the Nb film other than the resist pattern was removed under the condition of = too much force. When the surface oxide film AlOx 34 of AQ was exposed, the switch was made to ion beam etching using Ar, and ion etching was performed for about 5 minutes under the conditions of Ar pressure 2×10=Pa, acceleration voltage 600 eV, and ion current density 0.5 mA/am2. After that, the lower electrode 33
The wiring portion was etched under the same conditions as for the upper electrode 35 described above. After taking it out from the vacuum apparatus, the resist on the pattern was removed with acetone. Next, a resist pattern defining the bonding area was formed on the upper electrode 35 under the following conditions.

An AZ1470 resist was formed by spin coating to a thickness of 2 μm. Next, after prebaking at 90° C. for 20 minutes, pattern transfer was performed for 12 seconds by contact exposure.

The junction area is 8 μml:l. Insert the upper electrode 35. into the vacuum device again and remove the upper electrode 35. Nb of the upper electrode 35 is removed by CF4 gas under the same conditions as the wiring pattern of the lower electrode 33.
The portion of the film other than the resist pattern was removed by reactive ion etching using CF4 gas. Thereafter, it was taken out of the vacuum apparatus and inserted into the insulating film deposition apparatus again using the resist pattern as a lift-off mask to reduce the pressure, and then the lower electrode 33 was deposited to a thickness sufficient to completely cover the 5ilk film 36.

Thereafter, the lower electrode 33 is removed from the vacuum apparatus again and lifted off with acetone. A Si insulating film 36 was filled back into a part of the junction area defined by the upper electrode 35 to become an interlayer insulating film. Next, the surface of the upper electrode 35 is sputter-cleaned by high-frequency discharge in Ar, and then a Nb film for connecting the upper electrode is formed to a thickness of 300 nm.
A wiring electrode film was formed by depositing. The conditions for depositing the Nb film are:
The aforementioned lower electrode 33. It was deposited by magnetron sputtering under the same conditions as the upper electrode 35. After taking it out from the vacuum apparatus, a resist pattern was formed under the conditions described above. Next, the Nb film was inserted into the sputtering apparatus again and the pressure was reduced, and then the Nb film other than the resist pattern was etched away by reactive ion etching using CF and gas, and a wiring electrode 37 connected to the upper electrode 35 was formed.

In this example, Si○ and Si were used as the insulating film, but 5i02. Al2203. Mg○l G e IMg
A similar effect can be obtained by using F or the like. Also.

Although Nb was used as the superconducting film, the present invention is not limited to this, and Nb N , M o N , T
aN.

A similar effect can be obtained by using TiN or the like.

For example, the variation in the superconducting critical current (I c) of 256 1.8 μm Josephson junctions connected in series is ±
5-6%, and the leakage rate RJ/Rn n
It is now possible to form a smaller size of 15 to 20, which is about half or less compared to the conventional size of 5 to 8. Therefore, it has become possible to significantly improve the operating margin of the circuit.

〔Effect of the invention〕

According to the present invention, the internal stress of the Nb film used for the lower electrode of the Josephson junction element is sufficiently relaxed during sputtering, and even when patterning is performed, there is no adverse effect on the tunnel barrier layer and the junction characteristics are reduced. It has become possible to obtain a device with good reproducibility without any visible signs.

[Brief explanation of the drawing]

FIG. 1 is a plan view and a cross-sectional view of a Si substrate with grooves formed according to the present invention, FIG. FIG. 11, 2, 31...Si substrate, 12...groove, 22.
32... Insulating film, 24. 33... Lower electrode, 25.
34... Tunnel barrier layer, 26.35... Upper electrode, 37... Wiring electrode.

Claims (1)

[Claims] 1. In the step of successively forming a three-layer film consisting of a lower electrode made of a Nb film, a tunnel barrier layer made of an AlO_x film, and an upper electrode made of a Nb film on a substrate, Width 50-200μm and depth 0.2-2.0μm at the position corresponding to the scribe line on the surface of the substrate
A method for forming a Josephson junction element, characterized in that a concave groove of m is provided and the three-layer film described above is formed.