JPH01150327A - Manufacture of substrate for semiconductor device - Google Patents

Abstract

PURPOSE:To provide a flat material layer with less dispersion, by laminating the material layer on a substrate, on the reference surface of which a protruding part is formed, polishing the surface until a part of the protruding part is exposed, removing the protruding part on the reference surface, and polishing the material layer again as far as the reference surface. CONSTITUTION:A recess part and a protruding part 4 are provided on a reference surface 2 of an insulating SiO2 substrate 1. Steps d1 and d2 are provided. The surface is covered with a semiconductor layer 5. The layer is polished, and a surface 4a of the protruding part 4 is exposed. Then a depression due to excessively polished part is yielded in the thickness of the remaining semiconductor layer 5. Then, the protruding part 4 protruding from the reference surface 2 is etched away with HF and the like. Then the semiconductor layer 5 is polished again as far as the reference surface 2. In this constitution, the semiconductor layer 5, which has the very flat surface along the reference surface, is obtained. The semiconductor layer 5 with a thickness of d2 and width W having very small dispersion is obtained.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a semiconductor device in which a material layer such as a semiconductor layer on which each semiconductor element constituting a semiconductor device is formed is polished on a substrate such as an insulating substrate. The present invention relates to a method of manufacturing a device substrate.

[Summary of the invention]

The present invention relates to a method for manufacturing a substrate for a semiconductor device in which a material layer such as a WHIZ semiconductor layer is selectively formed on a base by using a recess on the base. After laminating material layers and selectively polishing the material layer until a part of the convex portion of the base is exposed, the convex portion is removed to the reference plane, and the material layer is again polished to the reference plane. This is a method of forming a substantially flat material layer on a substrate with small variations by selectively polishing it.

[Conventional technology]

5ol (silicon-on-insulator) is one of the device structures that take advantage of the advantages of thinning semiconductor layers.
structure is known. In order to manufacture a semiconductor device with such a Sol structure, it is necessary to manufacture a substrate in which a thin silicon semiconductor layer is formed on an insulating base.

Incidentally, a method of manufacturing a substrate for a semiconductor device having an SOI structure by bonding is conventionally known. 5a to 5C schematically show a conventional method for manufacturing a substrate for a semiconductor device. First, as shown in FIG. 5a, two silicon wafers 51, 51 Next, as shown in FIG. 5, the oxide films 52 and 52 are bonded to each other to form two silicon wafers 51 and 51. to integrate. This is done by heating. Next, in order to make one side of the silicon wafer 51 a thin film semiconductor layer 51a on which elements are formed, the silicon wafer 51 is ground by a processing method such as grinding, lapping, or polishing. The other silicon wafer 51 is used as a support, and the oxide film 52.52 is used as an insulating base.

However, in such a bonding method, the thickness of the formed thin semiconductor layer varies. In other words, the thickness of the wafer 51.51 is originally allowed to vary by about ±15 μm, and the accuracy of the thin film thickness is 0.
．． Even if the target is about 1 μm±0.011 Im, it cannot be easily achieved. The film can only be made as thin as 1.0 μm at most.

Therefore, there is a technique called selective polishing, which forms a thin silicon semiconductor layer on an insulating substrate.
(August 27, 1986 1 Institute of Electronics and Communication Engineers, 3
The technique is also shown on pages 7 to 42). In this technique, as shown in FIG. 6a, a recess 62 is formed in an insulating substrate 61 corresponding to a portion where a thin silicon layer is to be left, and the recess 62 is filled to form a semiconductor layer 63 over the entire surface. Next, the entire surface is polished, but the polishing does not progress on the surface 61a of the hard insulating substrate 61 in the same way as on the semiconductor layer 63, and as shown in FIG. Stop, the recess 62
A thin semiconductor layer 63 remains.

[Problem that the invention seeks to solve]

However, even when such a selective polishing method is employed, polishing is difficult to stop accurately on the surface 61a of the recess 62. Furthermore, when selective polishing is performed on the entire wafer, some portions are overpolished due to variations in polishing. For example, in the center of the recess 62, the semiconductor layer 63 is depressed, and the semiconductor layer 63 to be left remains.
When the width of
The thickness is approximately 64 μm. If a thin film transistor channel or the like is formed in such a region,
This results in variations in characteristics.

SUMMARY OF THE INVENTION In view of the above-mentioned problems, the present invention solves the above-mentioned problems by using a method for manufacturing a substrate for a semiconductor device in which a thin film material layer is formed on a predetermined substrate while minimizing variations in the material layer.

[Means for solving problems]

In the present invention, a material layer made of a material different from that of the base is laminated on a base having concave portions and convex portions formed on a substantially flat reference surface, and a part of the convex portions of the base is exposed from the material layer. The method of manufacturing a substrate for a semiconductor device is characterized in that the protrusion is removed to the reference surface, and the material layer is selectively polished to the reference surface again. solve problems.

Here, the base is an insulating substrate such as a Si 02 substrate,
The material may be a support with an insulating layer disposed on it, ceramic, plastic, or the like, or it may be an ordinary silicon substrate, various semiconductor substrates, or the like.

Further, the material layer is a layer made of a material different from that of the substrate, and is a material that has selectivity with respect to polishing between the material layer and the substrate. - Examples are monocrystalline silicon layers, polycrystalline silicon layers, etc. The convex portion is provided so as to protrude from the reference surface, and may have any shape as long as it can temporarily stop selective polishing. That is, it can also have a shape with a plurality of steps. Furthermore, the recess has a shape that follows the final shape of the thin film material layer. In addition, the above-mentioned selective polishing is polishing in a broad sense, and is not limited to polishing, but can also include grinding and lapping.

[Operation] Instead of selectively polishing all the way to the reference surface all at once, the material layer is removed by selectively polishing multiple times using the convex portions (i.e., in some of the convex portions, the remaining material layer is removed). However, by removing the protrusions and selectively polishing again on the reference surface, it is possible to accurately control the thickness of the material layer. .

〔Example〕

Preferred embodiments of the present invention will be described with reference to the drawings.

First Example The method for manufacturing a substrate for a semiconductor device according to this example includes an insulating substrate (
In this method, a thin film semiconductor layer 5 is formed on a 31 oz substrate (1). Hereinafter, this example will be explained according to its steps in Figure 1a.
~Explained with reference to FIG. 1C.

(a) First, the base used in this embodiment is an insulating substrate 1, and its shape is such that a recess 3 and a projection 4 are formed on a substantially flat reference surface 2 on the surface side. The above substantially flat reference surface 2
is the surface that will ultimately remain as the substrate surface. The recess 3 is where the semiconductor layer 5 as a material layer remains inside thereof, and is formed to have a step from the reference plane 2 corresponding to the thickness of the semiconductor layer 5 to be left. The convex portion 4 protrudes beyond the reference surface 4 and similarly has a step with respect to the reference surface 2. Further, the convex portion 4 is shaped to have an exposed surface 4a for temporarily stopping polishing. Note that the exposed surface 4a is the reference surface 2 in this embodiment.
It is considered to be a parallel plane. Here, to explain an example of the dimensions, the step difference d2 between the reference surface 2 and the bottom of the recess 3
For example, 0.1t! m, and the step difference d1 between the reference surface 2 and the exposed surface 4a of the convex portion 4 is, for example, 0.4 μm. Also,
Radius w of the convex portion 4 formed to surround and face the concave portion 3
l is, for example, about 10 μm.

Next, as shown in FIG.
Semiconductor N5 is deposited on the entire surface. The thickness of this semiconductor layer 5 may be sufficient as long as it is thick enough to cover the convex portion 4 .

(b) Next, as shown in FIG. 1, the semiconductor layer 5 is selectively polished until a part of the convex portion 4 of the insulating substrate 1 is exposed, that is, first selective polishing. In this selective polishing step, polishing is stopped at the exposed surface 4a of the convex portion 4, and the semiconductor N5 present above the exposed surface 4a of the convex portion 4 is removed. At this point, the remaining semiconductor N5 has uneven thickness. That is, for example, in the middle of the recess 3, over-polishing occurs, and there is a recess 6 with a depth of, for example, about 0.3 to 0.4 μm.

(C) Next, the convex portion 4 protruding from the reference surface 2 is removed. This convex portion 4 is formed on an insulating substrate l made of S, O,
is exposed between the semiconductor layers 5, for example, HF (
It can be removed using hydrofluoric acid (hydrofluoric acid) or the like. The above convex portion 4
The removal is not necessarily to the reference surface 2, but may be performed by etching near the reference surface 2 or deeper than the reference surface 2.

After the convex portion 4 has been removed in this manner, the semiconductor layer 5 is selectively polished again to the reference surface 2, as shown in FIG. 1C. The above-mentioned depression 6 exists in the semiconductor layer 5 at the time when selective polishing is started again, but the deviation in the film thickness of the semiconductor layer 5 due to this depression 6 is due to the difference in the film thickness when the first selective polishing is started. The deviation in thickness has already become a sufficiently small value, and by performing selective polishing in such a state, a semiconductor layer 5 having an extremely flat surface along the reference plane 2 can be obtained. This semiconductor layer 5 fills the recess 3, has a thickness d2 with very small variations, and has a width Wt. By forming an element using such a substrate for a semiconductor device, a semiconductor device having a Sol structure with stable characteristics can be easily obtained.

In the above embodiment, the convex portion 4 is made of the same material as the insulating substrate 1, but the convex portion 4 and the insulating substrate 1 may be made of different materials, such as a silicon nitride film and a silicon oxide film, or , a polycrystalline silicon layer, etc. may be utilized.

Second Embodiment The second embodiment is a more specific example of the first embodiment, and its base body is constructed as shown in FIG.

That is, a protruding convex portion 14.14 and a recessed portion 13.13 functioning as a groove finally filled with the semiconductor layer 15 are formed with respect to the substantially flat reference surface 12 of the insulating substrate 11. The convex portions 14.14 each have exposed surfaces 14a, 14a that are exposed during the first selective polishing. Further, the recesses 13, 13 have a groove pattern that follows the pattern of the semiconductor layer having a Sol structure.

Then, a semiconductor layer I5 is sufficiently deposited on the entire surface of such an insulating substrate 11, and then a first selective polishing is performed to polish the semiconductor layer 15 until the exposed surfaces 14a, 14a are exposed. Remove. Next, the convex portions 14.14 are etched using, for example, hydrofluoric acid. Then, selective polishing is performed again to obtain a flat semiconductor N15 along the reference surface 12.

Third Embodiment The third embodiment is an example in which the insulator layer 25 on the semiconductor substrate 21 is removed. First, the structure of the semiconductor substrate 21 is as follows.
As shown in FIG. 3, it has a concave portion 23 and a convex portion 24 relative to the reference surface 22. And, similar to the above embodiment,
The semiconductor layer 25 is sufficiently deposited on the entire surface, and then a first selective polishing is performed to remove the semiconductor layer 25 until a part of the convex part 24 is exposed.6 Next, the convex part 24 is polished. Perform removal. Then, selective polishing is performed again, and the reference surface 2 is
2, a flat insulator layer 25 is obtained. The material layer removed in this way can also be an insulating material.

Fourth Example The fourth example is an example in which the shape of the convex portion is modified. First, regarding the shape of the insulating substrate 31, as shown in FIG. 4, a recess 33 is formed with respect to the reference surface 32 thereof. A convex portion 34 is formed with respect to the reference plane 32, and the convex portion 34 has a first exposed surface 36 and a second exposed surface 37 that are parallel to the main surface.

When manufacturing a semiconductor device substrate using such an insulating substrate 31, a semiconductor layer 35 is sufficiently formed over the entire surface as shown in FIG. Next, selective polishing is performed up to the first exposed surface 36.

At this time, although some depressions occur in the semiconductor layer 35, the overall deviation in film thickness is reduced by the selective polishing. Subsequently, from the first exposed surface 36 to the second exposed surface 37
The protrusions up to the point are removed.

Then, selective polishing is further performed up to the second exposed surface 37. At this time, the semiconductor layer 35 becomes more flat.

Then, as in the above-described embodiment, selective polishing is performed again to scrape along the reference surface 32 to obtain a flat semiconductor layer 35.

By forming the convex portion 34 in such a shape as to form a plurality of steps, the surface of the semiconductor layer 350 can be adjusted to be even more flat, and it is possible to have not only two steps but also multiple steps. .

〔Effect of the invention〕

In the method for manufacturing a substrate for a semiconductor device of the present invention, selective polishing is performed multiple times using the convex portions and concave portions, so that it is possible to accurately form a material layer such as a semiconductor layer into 1112 layers. Therefore, the semiconductor device substrate manufactured according to the present invention has stable characteristics when an element is formed thereon, and the yield thereof is also improved.

[Brief explanation of the drawing]

1A to 1C are process cross-sectional views showing an example of the method for manufacturing a substrate for a semiconductor device according to the present invention according to its steps, and FIG. 2 is another example of the method for manufacturing a substrate for a semiconductor device according to the present invention. FIG. 3 is a cross-sectional view for explaining still another example of the method of manufacturing a semiconductor device substrate of the present invention, and FIG. 4 is a cross-sectional view of the method of manufacturing a semiconductor device substrate of the present invention. It is a sectional view for explaining still another example. Further, FIGS. 5A to 5C are process cross-sectional views for explaining an example of a conventional method for manufacturing a substrate for a semiconductor device,
FIGS. 16a to 6 are process cross-sectional views for explaining another example of the conventional method for manufacturing a substrate for a semiconductor device. 1.11.31... Insulating substrate (substrate) 21... Semiconductor substrate (substrate) 2.12, 22.32... Reference surface 3.13, 23.33... Recessed portion 4.14, 24 .34...Protrusion 5.15.35...Semiconductor layer 25...Insulator layer Patent applicant: Sony Corporation Patent attorney Akira Kosho (and 2 others) Figure 1a Figure 1S Figure 1 C Figure 2 Figure 3 Figure 4 Figure 5 a Figure 5 Figure 5 C ρ Figure 6 a Figure 6 b

Claims (1)

[Claims] A material layer made of a material different from that of the base is laminated on a base having concave portions and convex portions formed on a substantially flat reference surface,
After selectively polishing the material layer until a part of the convex portion of the base is exposed, removing the convex portion to the reference plane, and selectively polishing the material layer again to the reference plane. A method of manufacturing a substrate for a semiconductor device, characterized by: