JPH01149420A - Thin film formation - Google Patents

Abstract

PURPOSE:To form an Si film containing phosphorus, with which sufficient conductivity can be obtained by a low temperature heat treatment, and having excellent productivity and controllability by a method wherein, when silicon is formed on a substrate having a stepping using disilane and phosphine as raw gas, the temperature at the time when silicon, containing phosphorus, is formed is limited within the specific range. CONSTITUTION:A thermal oxide film 102 of 1mum in thickness is formed on an Si substrate 10, and then grooves 103 of 0.8mum in width are formed leaving the equal intervals using the widely known lithographic method and a dry etching method. Subsequently, an Si oxide film 104 of 100nm in thickness is formed using an LPCVD method, and impurities are doped. As a result, the wiring resistance on the stepped part, which is steep when compared with an ion-implanting method and a thermal diffusion method, can be reduced sharply by forming the Si film which phosphorus is being doped.

Description

[Detailed Description of the Invention] [Industrial Field of Application] The present invention relates to a method for forming a thin film, and achieves lower resistance of wiring or electrodes in a steep part with a single step difference, and is suitable for simplifying the LSI device manufacturing process and lowering the temperature. The present invention relates to a method of forming a Si film containing phosphorus.

[Conventional technology]

Polycrystalline silicon (Si) films formed by low pressure chemical vapor deposition (LPCVD) using thermal decomposition of monosilane (SiH3) are widely used for electrodes and wiring of semiconductor devices. Since the polycrystalline Si film formed by the LPCVD method has extremely high resistance as it is, impurities are introduced in a subsequent step by a well-known thermal diffusion method or ion implantation method to obtain conductivity. Incidentally, related methods for forming thin films of this type include 1, for example, Journal of the Gelectrochemical Society-127゜ (1980).
pp. 686-690 (J.

Electrochem, Soc, 127 (19
80) pp686-690).

[Problem that the invention seeks to solve]

Among the above-mentioned conventional techniques, when ions are implanted into a polycrystalline Si film, regions with insufficient impurity concentration occur in steeply stepped sidewalls, and electrodes or wiring may not have sufficient conductivity. Furthermore, heat treatment at 900° C. or higher was required to diffuse and activate the implanted impurities.

On the other hand, when doping phosphorus by thermal diffusion, a Si oxide layer containing phosphorus is formed on top of polycrystalline Si, so a step of removing this Si oxide layer is required;
If thermal diffusion of phosphorus is carried out at high temperature and for a long period of time, it is possible to dope even the steeply stepped sidewalls, but if the lower layer of the polycrystalline Si film is a Si substrate, phosphorus will diffuse into the substrate, for example, M
This has the disadvantage of disturbing the impurity distribution in the drain constituting the OS transistor.

Furthermore, when the electrodes embedded in the trenches of a trench-type capacitor are formed of polycrystalline Si, and impurities are introduced by either ion implantation or thermal diffusion, a sufficient amount of impurity is implanted throughout the entire polycrystalline Si film. It was difficult to introduce impurities.

One method to solve the above problems is to form a polycrystalline Si film while doping phosphorus (in-
In other words, there is a method in which impurities are introduced while forming a polycrystalline Si film by flowing phosphine (PH3), diborane (B 2 He ) p-arsine (AsH3), etc., which serve as an impurity source together with 5iHa. However, the growth rate of a polycrystalline Si film formed using 5iHa and PH8 while doping with phosphorus is more than an order of magnitude lower than that of a polycrystalline Si film formed without doping with phosphorus, making it difficult to mass-produce. When formed simultaneously on a plurality of Si substrates, there was a drawback that the film thickness distribution was extremely large.

5iz instead of SiH4 to increase growth rate
A method using He has also been attempted. However, in the conventional technology, heat treatment at a high temperature of 900° C. to 1000° C. is required in order to activate impurities even when 5izHe and PHa are used as raw material gases.

After all, like the thermal diffusion method, it is not possible to prevent impurities from diffusing into the Si substrate.

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, an object of the present invention is to form a phosphorus-containing Si film that is excellent in productivity and controllability and can obtain sufficient conductivity through low-temperature heat treatment.

[Means for resolving the gap]

The above objectives are as follows: ■ Using Si'zHa and P Hδ as source gases ■ Setting the film formation temperature range to 450°C to 550°C ■ Setting the film forming pressure range to 50 Pa or less, and adjusting the flow rate ratio of the source gases (P Ha/
This is achieved by setting S i 2H6) to 5X10-2 or less.

If the mixture ratio in the above pressure range becomes extremely small, the film formation rate becomes extremely low, making it difficult to put it into practical use. Therefore, the lower limits of each should be set appropriately to make it possible to actually form semiconductor devices. .

[Effect]

The present inventor has discovered that by forming a Si film without doping phosphorus under the above conditions, the growth rate of the Si film will not decrease, a film with good uniformity within a wafer or between wafers can be obtained, and that It has been found that the impurities in the above can be sufficiently activated by heat treatment at a low temperature of 650°C. The reason why the growth rate does not decrease is thought to be as follows.

PHa or phosphorus dissociated from it is deposited on the substrate surface (especially S
The probability of adsorption (adhesion probability) to i surface is approximately 1,
PHa or phosphorus easily adsorbs to the substrate surface and forms a very stable layer. On the other hand, the adhesion probability of SiH4 is much smaller than that of PHa, so when forming a polycrystalline Si film while doping phosphorus using SiH4 and PHa as source gases, PHa inhibits the adsorption of 5iHa on the surface. and cannot contribute to the reaction.

What contributes to the reaction is PHa such as silylene (SiHz) produced by the reaction S i H'4 → S i Hx + H2...(1)
It is considered to be a very active reactive species that cannot be prevented from being adsorbed. However, since the probability of the reaction of formula (1) occurring is small, when forming a polycrystalline Si film using 5iHa while doping phosphorus, as shown in Fig. 3, S
As the flow rate of PHa to iH4 increases, the film growth rate decreases.

However, when 5izH6 is used instead of 5iHa, 5izHe becomes 5izHe→S i H4+ S i N2 ・
...Disassemble as shown in (2). Since the probability that equation (2) occurs is much greater than equation (1), it is possible to easily generate active species of 5 iHz. For this reason, 5i
When zHe and PHa are used as source gases, as shown in FIG. 3, the film growth rate does not decrease even if the flow rate of PH3 relative to 5izHe increases.

Note that the error bars in FIG. 3 indicate variations in growth rate between wafers. When 5iHa is used as the source gas, the variation in film thickness between wafers is more than ±10%, whereas when 5izHe is used as the source gas, the variation is less than ±6%.
It can be seen that the use of zHe improves the film thickness uniformity between wafers.

Next, the activation of impurities in the film can be considered as follows. Compared to 5iHa, 5izHe is easily decomposed at low temperatures, so by using 5i2He as a source gas, it is possible to form a Si film while doping phosphorus at a lower temperature than when using SiH4. 57
A film formed at 5° C. or lower is in an amorphous state as it is, does not have a specific crystal structure, and has an extremely smooth surface.

When impurities are introduced into polycrystalline Si, a large amount of energy is required to form a crystal lattice and allow the impurity atoms to replace the Si atoms at the lattice points. It requires heat treatment at higher temperatures.

However, when Si atoms and P atoms exist in an amorphous state as in the present invention, when Si forms a crystal lattice, it incorporates P atoms into its lattice points, so the amorphous state becomes crystalline. It is considered that impurities can be easily activated by heat treatment at a temperature that causes the impurities to become oxidized.

When a polycrystalline Si film is doped with phosphorus by thermal diffusion or ion implantation, or when a polycrystalline Si film is formed while doping phosphorus, the crystal grains are
It is a well-known fact that growth will not occur unless heat treatment is performed at 00°C or higher. However, the present inventor discovered that when an amorphous Si film is formed while doping phosphorus, giant crystal grains are already generated when the Si film becomes polycrystalline through heat treatment at about 650°C. I found out.

As mentioned above, when a Si film is formed in an amorphous state while doping phosphorus using 5izHe and PH8 as raw material gases, the activation of impurities in the film and the growth of crystal grains are completed by heat treatment at approximately 650°C. . Therefore, a Si film containing phosphorus with sufficiently low resistance can be obtained without performing high-temperature heat treatment as in the conventional method. Therefore, it is possible to prevent impurities from diffusing into the lower Si layer and segregation at the interface.

〔Example〕

An embodiment of the present invention will be described below.

Example 1 FIG. 4 shows a schematic diagram of the apparatus used in the experiment. The inner diameter of the quartz tube 10 of this device is 180 mm, and a jig 40ti- is placed in the center of the quartz tube, and a diameter 160
A wafer holder 50 made of quartz with a diameter of 1 mm was set up.

A sample substrate 60 was attached to this holder. The substrate used was Si with a thermal oxide film 1100n formed thereon.

After mounting the substrate 60 and evacuating the inside of the quartz tube, the valve 70
Open the valve 80 and add 50 cc of 5izHe.
/win, P Ha was flowed at the same time at 1 c c /win. The pressure inside the quartz tube was maintained at 30 Pa while 5izHe and PHa were flowing. After gas was introduced for a predetermined period of time to form a film, the sample was taken out. After that, 650℃
, 2 in N2 atmosphere at 800℃, 900℃, 1000℃
After heat treatment for 0 minutes.

The resistivity was evaluated by the four-probe method, and the carrier concentration and mobility were evaluated by Hall measurements using the van der Para method.

In FIG. 1, the horizontal axis shows the film formation temperature and the vertical axis shows the specific resistance of the film. Sufficient conductivity was obtained at any film formation temperature and post-film formation heat treatment temperature. 1st
From the figure, when the film formation temperature is 550° C. or lower, the specific resistance does not depend on the heat treatment temperature.

In FIG. 2, the horizontal axis shows the film formation temperature, the left vertical axis shows the carrier concentration in the film, and the right vertical axis shows the carrier mobility in the film. Similar to the specific resistance in Figure 1, at a film formation temperature of 550°C or less, the carrier concentration.

The mobility does not depend on the heat treatment temperature after film formation.

From Figures 1 and 2, it can be seen that activation of the Si film formed while doping phosphorus at a temperature below 550°C is completed by heat treatment at a low temperature of 650°C, and even if heat treatment is performed at a higher temperature, the structure of the film remains unchanged. It can be seen that the characteristics do not change.

For comparison, using the conventional method of 5iHa and PHa as source gases, the temperature inside the quartz tube was 630°C and the pressure was 80Pa.
Maintain SiH4 at 200cc/win and PHa at 1
A polycrystalline Si film was formed while doping phosphorus by flowing c c /win. Subsequently, after heat treatment was performed in an N2 atmosphere at the same temperature as when using 5izHe, specific resistance, carrier concentration, and mobility were measured. The specific resistance, carrier concentration, and mobility after heat treatment at 650°C are each 1. lX10
-"Ωcm, 7.2 x 10"3-', 6.5c
J/V @S.

After heat treatment at 800℃, 1.8X10″″8Ω■, 1.2
Xi()"Ωexa-", 12.2 a#/V-8,
After heat treatment at 900℃, 8.4 x 10'' Ωcn,
2.6 x 1020Ωam-', 28.8 a#/
V-8, 8. after heat treatment at 1000°C. OX 10″″4
Ω pieces, 2.8 x 1020cn-”.

29.1. a1/V -S, and required heat treatment at 900° C. or higher for activation. It is a well-known fact that when phosphorous is thermally diffused or ion-implanted into a polycrystalline Si film, heat treatment at about 900° C. or higher is required to activate the impurities.

According to this embodiment, 5izHe and PHa are used as raw material gases.
When a polycrystalline Si film is formed while doping with phosphorus using SiH4 and PHa as raw material gases, or when a polycrystalline Si film is formed without doping with phosphorus at a temperature of 550°C or less using This method has the effect that impurities can be activated by heat treatment at a much lower temperature (about 650° C.) than when phosphorus is doped by thermal diffusion or ion implantation.

Further, there is an effect that the specific resistance of the film does not change even if the heat treatment temperature after film formation changes.

Furthermore, since the carrier mobility is as high as 30d/V-8 or higher at a film formation temperature of 550°C or lower, sufficient conductivity can be obtained even with a small impurity concentration, and the amount of impurity diffused into the underlying Si substrate can be reduced. It also has the effect of reducing the

Example 2 In this example, an example will be described in which, when polycrystalline Si is used for wiring in a steep stepped portion, the degree of wiring resistance is measured by an impurity introduction method.

Samples 1 to 3 were prepared according to the procedure shown in FIG. First, a thermal oxide film 102 with a thickness of 1 μm was formed on a Si substrate 101 (FIG. 5 (3)), and then grooves 103 with a width of 0.8 μm were formed at equal intervals by well-known lamination and dry etching methods. (Fig. 5(b)), and then a 1100nm Si oxide film 104 was formed by LPCvD method (Fig. 5<a
>>.

Next, a Si film was formed and impurity doping was performed using the following method. For sample 1, 5izHs50cc/win and P
Ha 1 c c /win at quartz tube internal temperature 525℃
, and simultaneously flowed at a pressure of 30 Pa to form a 200 nm Si film while doping with phosphorus. For samples 2 and 3, SiH4 was used as the raw material gas and the temperature was 200°C at 630°C.
After forming a polycrystalline Si film of 5 nm thick, for Sample 2, phosphorus ions were implanted at an energy of 800 KeV and an implant amount of 5.
87 for sample 3, which was implanted with
Phosphorus diffusion was performed at 5°C for 20 minutes. Next, sample 1 is 6
50℃, Sample 2 and Sample 3 were heated at 900℃ in N2 atmosphere.
Heat treatment was performed for 0 minutes.

The sheet resistance in the flat part of the polycrystalline Si film of sample 1 is 3
5Ω10, and the wiring resistance across the 10 steps with a width of 0.8 μm was 1.6Ω, and sufficient conductivity was obtained. Sample 2
The sheet resistance at the flat part of the polycrystalline Si film is 90Ω/
However, the resistance of the 0.8 μm wide wiring that crossed the 10 steps was extremely high at 100Ω. For sample 3, the sheet resistance in the flat part of the polycrystalline Si film was 74 Ω/Ω, and the resistance of the wiring with a width of 0.8 μm crossing 10 9-level differences was 4.5 Ω.

According to this example, Si1% is not doped with phosphorus.
By forming this method, it is possible to significantly reduce the wiring resistance at steep step portions compared to the ion implantation method or the thermal diffusion method.

Example 3 In this example, an example will be described in which the influence of different impurity doping methods on the depth of diffusion of impurities into a Si substrate is measured.

The substrate shown in FIG. 5(b) was used as a sample.

Sample 4 was placed on the substrate at a temperature of 525°C in a quartz tube and a pressure of 30P.
S in a 1zHa 50 c c, /+in, PHa
After simultaneously flowing 1 cc/win to form a Si film containing phosphorus, heat treatment was performed in an N2 atmosphere at 650° C. for 60 minutes. In sample 5, polycrystalline SiH of 200 nm was formed on the substrate using 5iHa as a raw material gas at a temperature inside the quartz tube of 630°C, and then phosphorus was diffused at 875°C for 20 minutes, followed by 9
Heat treatment was performed for 60 minutes in a NZ atmosphere at 00°C.

Samples 4 and 5, which had been heat-treated in a N2 atmosphere, were placed along a plane perpendicular to the grooves, etched with a hydrofluoric acid/nitric acid mixed solution, and then their cross sections were observed with a scanning electron microscope.
) was evaluated as the diffusion depth.

While the diffusion depth of Sample 5 was as large as 0.3 μm, the diffusion depth of Sample 4 was as small as 0.01 μm or less, which was negligible.

According to this embodiment, 5izes and PHa are used as raw material gases.
By forming the Si film in an amorphous state while doping it with phosphorus, the temperature of the heat treatment for activation can be significantly lowered, making the depth of impurity diffusion into the substrate negligible. There is an effect.

Example 4 In this example, an example will be described in which the relationship between the method of forming a Si film and the unevenness of the film surface was measured.

Regarding Samples 4 and 5, whose cross sections were observed using a scanning electron microscope in Example 3, the unevenness of the Si surface was also observed using a scanning electron microscope.

The surface of the Si film (sample 4) formed in an amorphous state using Si zHa and P Ha was extremely smooth with no unevenness observed even at a magnification of 50,000 times. Roughness of approximately 0.125 μm was observed on the surface of sample 5, which was subjected to phosphorus diffusion after forming the polycrystalline Si film.
The surface conditions of Samples 4 and 5 did not change even after the heat treatment.

In Sample 4, the Si film was formed at 525°C, but a smooth surface can be obtained if the film formation temperature is 575°C or lower. The surface of a polycrystalline Si film formed using 5iHa as a source gas instead of 5i2He and doping with phosphorus at 630°C has fine irregularities of about 0.05 μm.
It was noticed.

According to this embodiment, 5izH6 and PHa are used as raw material gases.
By forming a Si film in an amorphous state while doping phosphorus using phosphorus, an extremely smooth Si surface can be obtained.

The breakdown voltage of the thermal oxide film of polycrystalline Si formed using 5iHi was doped with phosphorus by thermal diffusion method, which was as low as about 3 MV/m or less.
The Si thermal oxide film formed using Hs as a raw material gas and doping with phosphorus had a breakdown voltage of 6 MV/cm, which was an extremely good value equivalent to that of a single crystal Si thermal oxide film.

In Examples 1 to 4 described above, experiments were conducted under limited conditions. If the temperature inside the quartz tube is lower than 450°C, the film growth rate will be extremely low, less than lnm/win, and the throughput will be low, making it unsuitable for actual LSI device manufacturing.0 The temperature inside the quartz tube is higher than 550°C. In this case, as shown in FIG. 1 or 2, the resistivity, carrier concentration, and mobility of the film vary greatly depending on the heat treatment temperature, resulting in poor controllability. The pressure inside the quartz tube is 50
When it is larger than Pa, the gas flow between the wafers becomes poor, resulting in a significant decrease in the film growth rate m P Hs
and 5izHe flow rate ratio (PHa/5i2H6) is 5x1
Since the sheet resistance reaches saturation at around oz, P H
a/S i z) (Increasing e to more than 5X10-" increases the concentration of inert impurities in the film, which is undesirable. 1) The temperature inside the quartz tube is 450 to 550 °C, the pressure is 50 Pa or less, PHs and 5izHe The flow rate ratio (PH
As long as s/S i 2H6) is within the condition range of 5×10″″2 or less, the desired effect can be obtained in any of the examples.

〔Effect of the invention〕

According to the present invention, a Si film containing phosphorus having a uniform impurity distribution in the film thickness direction can be formed. Since the impurities in this Si film can be activated by heat treatment at a much lower temperature than conventional methods, it is possible to activate the impurities in the polycrystalline Si film on the side walls of steep steps and in deep grooves without disturbing the impurity distribution of the substrate. Impurities can be doped, and the resistance of electrodes and wiring can be lowered. Furthermore, according to the present invention, it is possible to improve the film thickness uniformity between wafers compared to the conventional method.

Furthermore, in manufacturing LSI devices, it is possible to significantly simplify the process and lower the temperature, which is also highly effective in improving yield and reducing production costs.

[Brief explanation of the drawing]

Figure 1 is a curve diagram showing the relationship between film formation temperature and resistivity, Figure 2 is a curve diagram showing the relationship between film formation temperature, carrier concentration and mobility, and Figure 3 is a curve diagram showing the relationship between film formation temperature and carrier concentration and mobility.
Curve diagram showing the relationship between the flow rate ratio of izHe and the film growth rate, No. 4
The figure is a schematic diagram showing an example of an apparatus used to carry out the present invention, and FIG. 5 is a process diagram for explaining the present invention in detail. DESCRIPTION OF SYMBOLS 10... Quartz tube, 20... Heater, 30... Electric furnace, 40... Jig, 50... Holder, 60...
Board, 70° 80.90... Valve, 100... Exhaust system.

Claims (1)

[Claims] 1. Disilane (
In a method of forming silicon containing phosphorus by chemical vapor deposition using Si_2H_6) and phosphine (PH_3), the temperature during formation of silicon containing phosphorus is set at 450°C.
A method for forming a thin film, characterized in that the conditions range from °C to 550 °C and a pressure of 50 Pa or less. 2. Formation of silicon containing phosphorus according to claim 1 is achieved by changing the flow rate of phosphine and disilane (PH_3/
2. The thin film forming method according to claim 1, wherein the thin film forming method is carried out at a Si_2H_6) of 5×10^-^2 or less.