JPH01148868U - - Google Patents
Info
- Publication number
- JPH01148868U JPH01148868U JP4540088U JP4540088U JPH01148868U JP H01148868 U JPH01148868 U JP H01148868U JP 4540088 U JP4540088 U JP 4540088U JP 4540088 U JP4540088 U JP 4540088U JP H01148868 U JPH01148868 U JP H01148868U
- Authority
- JP
- Japan
- Prior art keywords
- display
- analog
- digital converter
- output
- address
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Controls And Circuits For Display Device (AREA)
Description
第１図は、本考案をＤＳＯに適用した実施例の
概略構成を示すブロツク図、第２図は、第１図に
示すトリガ回路及びトリガ条件発生回路の具体的
な一実施例の概略構成を示す回路図、第３図及び
第４図は、第２図に示す回路の動作を説明するた
めのタイミング図である。
図中、１……入力信号、２……増幅器、４……
Ａ／Ｄ変換器、８……ＭＰＵ、１０……表示回路
、１１……表示装置（ＣＲＴ）、１２……サンプ
ルレート設定スイツチ、１４……クロツク回路、
１５……トリガ回路、１６……トリガ条件発生回
路である。
FIG. 1 is a block diagram showing the schematic structure of an embodiment in which the present invention is applied to a DSO, and FIG. 2 shows the schematic structure of a specific embodiment of the trigger circuit and trigger condition generation circuit shown in FIG. The circuit diagrams shown in FIGS. 3 and 4 are timing diagrams for explaining the operation of the circuit shown in FIG. 2. In the figure, 1...input signal, 2...amplifier, 4...
A/D converter, 8...MPU, 10...display circuit, 11...display device (CRT), 12...sample rate setting switch, 14...clock circuit,
15...Trigger circuit, 16...Trigger condition generation circuit.
Claims (1)
をデイジタル化するアナログ・デイジタル変換器
と、該アナログ・デイジタル変換器の出力を保持
するデータ保持用メモリと、全体を制御するマイ
クロ・コンピユータと、前記アナログ・デイジタ
ル変換器の出力を表示するための表示用メモリと
、該表示用メモリ内のマイクロ・コンピユータで
指定された番地よりデータを順次読出し、表示用
メモリの最終番地の次は先頭より読出して表示装
置に表示する表示回路及びトリガ回路を備えた波
形記憶装置であつて、アナログ・デイジタル変換
器の出力をマイクロ・コンピユータが表示用メモ
リ内のＮ番地に書込み、表示回路にＮ＋１番地よ
り表示するよう指定し、これを連続して行うこと
により入力信号が連続的に表示する動作モードに
おいて、トリガがかかつた時点でのデータが表示
装置の適当な位置に表示された時点で動作を停止
し、ブラウン管上の表示波形をホールドさせる主
段を備えたことを特徴とする波形記憶装置。 an amplifier that amplifies an input signal; an analog-digital converter that digitizes the output of the amplifier; a data-holding memory that holds the output of the analog-digital converter; and a microcomputer that controls the entire system; A display memory for displaying the output of the analog-to-digital converter and a microcomputer in the display memory read data sequentially from the specified address, and after the last address of the display memory, data is read from the beginning. A waveform storage device equipped with a display circuit and a trigger circuit for displaying on a display device, in which a microcomputer writes the output of an analog-to-digital converter to address N in the display memory, and displays it on the display circuit starting from address N+1. By specifying this and doing this continuously, in the operation mode where the input signal is displayed continuously, the operation will stop when the data at the time the trigger is applied is displayed at the appropriate position on the display device. A waveform storage device comprising a main stage for holding a waveform displayed on a cathode ray tube.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4540088U JPH01148868U (en) | 1988-04-04 | 1988-04-04 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4540088U JPH01148868U (en) | 1988-04-04 | 1988-04-04 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01148868U true JPH01148868U (en) | 1989-10-16 |
Family
ID=31271712
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4540088U Pending JPH01148868U (en) | 1988-04-04 | 1988-04-04 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01148868U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0536372U (en) * | 1991-09-27 | 1993-05-18 | 株式会社ケンウツド | Digital oscilloscope roll display system |
-
1988
- 1988-04-04 JP JP4540088U patent/JPH01148868U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0536372U (en) * | 1991-09-27 | 1993-05-18 | 株式会社ケンウツド | Digital oscilloscope roll display system |
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