JPH01147934A - Loopback test system for multiplex converter - Google Patents

Loopback test system for multiplex converter

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Publication number
JPH01147934A
JPH01147934A JP30591887A JP30591887A JPH01147934A JP H01147934 A JPH01147934 A JP H01147934A JP 30591887 A JP30591887 A JP 30591887A JP 30591887 A JP30591887 A JP 30591887A JP H01147934 A JPH01147934 A JP H01147934A
Authority
JP
Japan
Prior art keywords
unipolar
order group
bipolar
signals
group
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP30591887A
Other languages
Japanese (ja)
Inventor
Hiroshi Ninomiya
弘 二宮
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP30591887A priority Critical patent/JPH01147934A/en
Publication of JPH01147934A publication Critical patent/JPH01147934A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To reduce the scale of the test side by selecting a test use low-order group unipolar signal, inserting it to a multiplex converter to be tested and applying branch so as to apply loopback test of the multiplex converter. CONSTITUTION:Plural selecting circuits 12 select either of a test use low-order group unipolar signal generated from a test signal generator 11 and plural low-order group unipolar signal converted by plural B/U conversion circuits 13 respectively and supply the result to a multiplexer circuit 14. The plural selecting circuits 12 select a test low-order group unipolar signal respectively during the test and supply the result to the multiplex circuit 14. The multiplex circuit 14 multiplexes the result to one group of high-order group unipolar signal, the result is converted into one group of high-order group bipolar signal at the U/B conversion circuit 15, the converted signal is sent to the outside of the multiplex converter 10 from an output terminal 16 and inputted to the input terminal 17 of the multiplex converter 10 for the loopback test again.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、複数の低次群信号を1群の高次群信号に多重
変換する多重変換装置における折り返し試験方式に関す
る。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a folding test method in a multiplex conversion device that multiplex-converts a plurality of low-order group signals into a group of high-order group signals.

[従来の技術] 従来の多重変換装置の折り返し試験方式について第3図
を参照して説明する。
[Prior Art] A conventional foldback test method for a multiplex converter will be described with reference to FIG.

試験信号発生器8で発生した試験用低次群ユニポーラ信
号は、複数のユニポーラ/バイポーラ(U/B)変換回
路24で試験用低次群ユニポーラ信号から低次群バイポ
ーラ信号にそれぞれ変換され、多重変換装置10の入力
端子22にそれぞれ入力される。入力された複数の低次
群バイポーラ信号は、それぞれ複数のバイポーラ/ユニ
ポーラ(B/U)、変換回路13で複数の低次群ユニポ
ーラ信号に変換された後、多重化回路14で1群の高次
群ユニポーラ信号に多重化され、U/B変換回路15で
高次群バイポーラ信号に変換され、多重変換装置10の
出力端子16より、多重変換装置10外に送出される。
The test low-order group unipolar signals generated by the test signal generator 8 are converted from the test low-order group unipolar signals to low-order group bipolar signals in a plurality of unipolar/bipolar (U/B) conversion circuits 24, and multiplexed. The signals are respectively input to the input terminals 22 of the conversion device 10. The plurality of input low-order group bipolar signals are converted into a plurality of low-order group unipolar signals in a plurality of bipolar/unipolar (B/U) conversion circuits 13, and then converted into one group of high-order group unipolar signals in a multiplexing circuit 14. The signal is multiplexed into a unipolar signal, converted into a high-order group bipolar signal by the U/B conversion circuit 15, and sent out from the output terminal 16 of the multiplex conversion device 10.

折り返し試験の為に、再び入力端子17から多重変換装
置10に入力された高次群バイポーラ信号は、B/U変
換回路18で高次群ユニポーラ信号に変換され、分離回
路19で複数の低次群ユニポーラ信号に分離される。分
離された複数の低次群ユニポーラ信号は、複数のU/B
変換回路20でそれぞれ複数の低次群バイポーラ信号に
変換され、多重変換装置10の出力端子21より、多重
変換装置10外に送出される。送出された複数の低次群
バイポーラ信号は、それぞれ再び複数のB/U変換回路
25で複数の低次群ユニポーラ信号に変換された後、誤
り検出回路23に送られる。誤り検出回路23では、入
力信号のビット誤りを検出する。
For the foldback test, the high-order group bipolar signal inputted again from the input terminal 17 to the multiplex converter 10 is converted into a high-order group unipolar signal by the B/U conversion circuit 18, and into a plurality of low-order group unipolar signals by the separation circuit 19. separated. A plurality of separated low-order group unipolar signals are transmitted to a plurality of U/Bs.
Each signal is converted into a plurality of low-order group bipolar signals by the conversion circuit 20 and sent out from the output terminal 21 of the multiplex conversion device 10 . The plurality of low-order group bipolar signals sent out are each converted again into a plurality of low-order group unipolar signals by the plurality of B/U conversion circuits 25, and then sent to the error detection circuit 23. The error detection circuit 23 detects bit errors in the input signal.

[発明が解決しようとする問題点] 上述した従来の多重変換装置の折り返し試験方式では、
被試験多重変換装置10の多重度(多重化する低次群信
号の数)に応じて、試験装置側に相当数のU/B変換回
路24、B/U変換回路25が必要になり、検出系が大
規模になり、コストが増加する。しかも、試験装置側の
U/B変換回路24、B/U変換回路25は、アナログ
回路なので、被試験多重変換装置10のU/B変換回路
15及び20、B/U変換回路13及び18部よりも良
い特性を有していないと、試験装置側と被試験多重変換
装置10側のどちらのU/B変換回路あるいはB/U変
換回路を試験しているのかわからなくなってしまうとい
う欠点がある。
[Problems to be Solved by the Invention] In the above-mentioned conventional foldback test method for multiplex converters,
Depending on the multiplicity (number of low-order group signals to be multiplexed) of the multiplex conversion device under test 10, a considerable number of U/B conversion circuits 24 and B/U conversion circuits 25 are required on the test device side. The system becomes large-scale and costs increase. Moreover, since the U/B conversion circuit 24 and B/U conversion circuit 25 on the test equipment side are analog circuits, the U/B conversion circuits 15 and 20 and the B/U conversion circuits 13 and 18 of the multiplex conversion device under test 10 are analog circuits. If it does not have better characteristics than the above, there is a drawback that it becomes unclear which U/B conversion circuit or B/U conversion circuit is being tested, the test equipment side or the multiplex converter under test 10 side. .

[問題点を解決するための手段] 本発明によれば、複数の低次群バイポーラ信号を入力す
る複数の第1の入力端子と、該複数の第1の入力端子か
ら入力される複数の低次群バイポーラ信号をそれぞれ複
数の低次群ユニポーラ信号に変換する複数の第1のバイ
ポーラ/ユニポーラ変換手段と、該複数の第1のバイポ
ーラ/ユニポーラ変換手段で変換された複数の低次群ユ
ニポーラ信号を1群の高次群ユニポーラ信号に多重化す
る多重化手段と、該多重化手段で多重化された1群の高
次群ユニポーラ信号を1群の高次群バイポーラ信号に変
換する第1のユニポーラ/バイポーラ変換手段と、該第
1のユニポーラ/バイポーラ変換手段で変換された1群
の高次群バイポーラ信号を出力する第1の出力端子と、
1群の高次群バイポーラ信号を入力する第2の入力端子
と、該第2の入力端子から入力される1群の高次群バイ
ポーラ信号を1群の高次群ユニポーラ信号に変換する第
2のバイポーラ/ユニポーラ変換手段と、該第2のバイ
ポーラ/ユニポーラ変換手段で変換された1群の高次群
ユニポーラ信号を複数の低次群ユニポーラ信号に分離す
る分離手段と、該分離手段で分離された複数の低次群ユ
ニポーラ信号をそれぞれ複数の低次群バイポーラ信号に
変換する複数の第2のユニポーラ/バイポーラ変換手段
と、該複数の第2のユニポーラ/バイポーラ変換手段で
変換された複数の低次群バイポーラ信号をそれぞれ出力
する複数の第2の出力端子とを有する多重変換装置を折
り返し試験する方式に於いて、前記第1の出力端子と前
記第2の入力端子とを接続し、前記複数の第2の出力端
子と前記複数の第1の入力端子とをそれぞれ接続し、試
験用低次群ユニポーラ信号を発生する試験信号発生手段
と、前記複数の第1のバイポーラ/ユニポーラ変換手段
と前記多重化手段との間に挿入され、前記複数の第1の
バイポーラ/ユニポーラ変換手段で変換きれた複数の低
次群ユニポーラ信号と前記試験信号発生手段から発生さ
れた試験用低次群ユニポーラ信号とのどちらか一方をそ
れぞれ選択する複数の選択手段と、前記複数の第1のバ
イポーラ/ユニポーラ変換手段で変換された複数の低次
群ユニポーラ信号のビット誤りをそれぞれ検出する誤り
検出手段とを有することを特徴とする多重変換装置の折
り返し試験方式が得られる。
[Means for Solving the Problems] According to the present invention, a plurality of first input terminals into which a plurality of low-order group bipolar signals are input, and a plurality of low-order input terminals input from the plurality of first input terminals. a plurality of first bipolar/unipolar conversion means for converting each next-order group bipolar signal into a plurality of low-order group unipolar signals; and a plurality of low-order group unipolar signals converted by the plurality of first bipolar/unipolar conversion means. a first unipolar/bipolar conversion means that converts the group of high-order unipolar signals multiplexed by the multiplexing means into a group of high-order bipolar signals; , a first output terminal that outputs a group of high-order group bipolar signals converted by the first unipolar/bipolar conversion means;
a second input terminal for inputting a group of high-order group bipolar signals; and a second bipolar/unipolar conversion means for converting the group of high-order group bipolar signals input from the second input terminal into a group of high-order group unipolar signals. and separation means for separating a group of high-order group unipolar signals converted by the second bipolar/unipolar conversion means into a plurality of low-order group unipolar signals, and a plurality of low-order group unipolar signals separated by the separation means. a plurality of second unipolar/bipolar conversion means for converting each into a plurality of low-order group bipolar signals, and each outputs a plurality of low-order group bipolar signals converted by the plurality of second unipolar/bipolar conversion means. In a method for repeating testing a multiplex converter having a plurality of second output terminals, the first output terminal and the second input terminal are connected, and the plurality of second output terminals and the A test signal generation means that connects each of the plurality of first input terminals and generates a low-order group unipolar signal for testing, and is inserted between the plurality of first bipolar/unipolar conversion means and the multiplexing means. and selecting one of the plurality of low-order group unipolar signals converted by the plurality of first bipolar/unipolar conversion means and the test low-order group unipolar signal generated from the test signal generation means. A multiplex conversion device comprising a plurality of selection means and an error detection means for respectively detecting bit errors in a plurality of low-order group unipolar signals converted by the plurality of first bipolar/unipolar conversion means. A fold-back test method is obtained.

また、本発明によれば、複数の低次群バイポーラ信号を
入力する複数の第1の入力端子と、該複数の第1の入力
端子から入力された複数の低次群バイポーラ信号をそれ
ぞれ複数の低次群ユニポーラ信号に変換する複数の第1
のバイポーラ/ユニポーラ変換手段と、該複数の第1の
バイポーラ/ユニポーラ変換手段で変換された複数の低
次群ユニポーラ信号を1群の高次群ユニポーラ信号に多
重化する多重化手段と、該多重化手段で多重化された1
群の高次群ユニポーラ信号を1群の高次群バイポーラ信
号に変換する第1のユニポーラ/バイポーラ変換手段と
、該第1のユニポーラ/バイポーラ変換手段で変換され
た1群の高次群バイポーラ信号を出力する第1の出力端
子と、1群の高次群バイポーラ信号を入力する第2の入
力端子と、該第2の入力端子から入力された1群の高次
群バイポーラ信号を1群の高次群ユニポーラ信号に変換
する第2のバイポーラ/ユニポーラ変換手段と、該第2
のバイポーラ/ユニポーラ変換手段で変換された1群の
高次群ユニポーラ信号を複数の低次群ユニポーラ信号に
分離する分離手段と、該分離手段で分離された複数の低
次群ユニポーラ信号をそれぞれ複数の低次群バイポーラ
信号に変換する複数の第2のユニポーラ/バイポーラ変
換手段と、該複数の第2のユニポーラ/バイポーラ変換
手段で変換された複数の低次群バイポーラ信号をそれぞ
れ出力する複数の第2の出力端子とを有する多重変換装
置を折り返し試験する方式に於いて、前記第1の出力端
子と前記第2の入力端子とを接続し、前記複数の第2の
出力端子と前記複数の第1の入力端子とをそれぞれ接続
し、試験用低次群ユニポーラ信号を発生ずる試験信号発
生手段と、前記分離手段と前記複数の第2のユニポーラ
/バイポーラ変換手段との間に挿入され、前記分離手段
で分離された複数の低次群ユニポーラ信号と前記試験信
号発生手段から発生された試験用低次群ユニポーラ信号
とのどちらか一方をそれぞれ選択する複数の選択手段と
、前記分離手段で分離された複数の低次群ユニポーラ信
号のビット誤りをそれぞれ検出する誤り検出手段とを有
することを特徴とする多重変換装置の折り返し試験方式
が得られる。
Further, according to the present invention, a plurality of first input terminals into which a plurality of low-order group bipolar signals are input, and a plurality of low-order group bipolar signals input from the plurality of first input terminals are respectively input to a plurality of first input terminals. a plurality of first converting signals into a low order group unipolar signal;
bipolar/unipolar conversion means, multiplexing means for multiplexing a plurality of low-order group unipolar signals converted by the plurality of first bipolar/unipolar conversion means into a group of high-order group unipolar signals, and the multiplexing means. 1 multiplexed with
a first unipolar/bipolar conversion means for converting a group of high-order group unipolar signals into a group of high-order group bipolar signals; and a first unipolar/bipolar conversion means for outputting a group of high-order group bipolar signals converted by the first unipolar/bipolar conversion means. an output terminal, a second input terminal for inputting a group of high-order group bipolar signals, and a second bipolar terminal for converting the group of high-order group bipolar signals input from the second input terminal into a group of high-order group unipolar signals. /unipolar conversion means, and the second
separation means for separating one group of high-order group unipolar signals converted by the bipolar/unipolar conversion means into a plurality of low-order group unipolar signals; a plurality of second unipolar/bipolar conversion means for converting into next-order group bipolar signals; and a plurality of second unipolar/bipolar conversion means for respectively outputting a plurality of low-order group bipolar signals converted by the plurality of second unipolar/bipolar conversion means. In a method for repeating testing a multiplex converter having output terminals, the first output terminal and the second input terminal are connected, and the plurality of second output terminals and the plurality of first A test signal generating means for generating a low-order group unipolar signal for testing by connecting the input terminals respectively, and a test signal generating means inserted between the separating means and the plurality of second unipolar/bipolar converting means, and the separating means a plurality of selection means for selecting one of the plurality of separated low-order group unipolar signals and the test low-order group unipolar signals generated from the test signal generation means; and a plurality of separated low-order group unipolar signals by the separation means. and error detection means for detecting bit errors in low-order group unipolar signals, respectively.

[実施例] 以下、本発明の実施例について図面を参照して説明する
[Examples] Examples of the present invention will be described below with reference to the drawings.

第1図を参照すると、本発明の第1の実施例による多重
変換装置10の折り返し試験方式は、試験用低次群ユニ
ポーラ信号を発生する試験信号発生器11を有し、この
試験用低次群ユニポーラ信号は、複数の選択回路12の
一方の入力端子に供給される。
Referring to FIG. 1, the folding test method of the multiplex converter 10 according to the first embodiment of the present invention includes a test signal generator 11 that generates a low-order group unipolar signal for testing. The group unipolar signal is supplied to one input terminal of the plurality of selection circuits 12.

複数の選択回路12の他方の入力端子には、それぞれ複
数のB/U変換回路13で変換された複数の低次群ユニ
ポーラ信号が供給される。次数の選択口i?812は、
それぞれ試験信号発生器11から発生される試験用低次
群ユニポーラ信号と複数のB/U変換回路13で変換さ
れた複数の低次群ユニポーラ信号とのどちらか一方を選
択し、複数の選択された低次群ユニポーラ信号を多重化
回路14へ送出する。
A plurality of low-order group unipolar signals converted by a plurality of B/U conversion circuits 13 are respectively supplied to the other input terminals of the plurality of selection circuits 12 . Choice of order i? 812 is
Each of the test low-order group unipolar signals generated from the test signal generator 11 and the plurality of low-order group unipolar signals converted by the plurality of B/U conversion circuits 13 is selected, and the plurality of selected The low-order group unipolar signal is sent to the multiplexing circuit 14.

試験中は、複数の選択回路12は、それぞれ試験用低次
群ユニポーラ信号を選択し、これ等を複数の選択された
低次群ユニポーラ信号として多重化回路14へ送出する
。多重化回路14は、これ等次数の選択された低次群ユ
ニポーラ信号(複数の試験用低次群ユニポーラ信号)を
1群の高次群ユニポーラ信号に多重化する。この多重化
回路14で多重化された1群の高次群ユニポーラ信号は
、U/B変換回路15で1群の高次群バイポーラ信号に
変換され、この1群の高次群バイポーラ信号は出力端子
16より多重変換装置10外へ送出され、再び折り返し
試験の為に、多重変換装置10の入力端子17に入力さ
れる。この入力された1群の高次群バイポーラ信号は、
B/U変換回路18により1群の高次群ユニポーラ信号
に変換され、この1群の高次群ユニポーラ信号は、分離
回路19により複数の低次群ユニポーラ信号に分離され
る。この分離回路10で分離された複数の低次群ユニポ
ーラ信号は、それぞれ複数のU/B変換回路20により
複数の低次群バイポーラ信号に変換され、これ等複数の
低次群バイポーラ信号は、それぞれ複数の出力端子21
より多重変換装置10外へ送出され、多重変換装置10
外で折り返した後、再び多重変換装置10の複数の入力
端子22に入力される。この入力された複数の低次群バ
イポーラ信号は、それぞれ複数のB/U変換回路13に
より複数の低次群ユニポーラ信号に変換された後、誤り
検出回路23に供給され、ここでビット誤りが検出され
る。
During the test, the plurality of selection circuits 12 each select a test low-order group unipolar signal, and send these to the multiplexing circuit 14 as a plurality of selected low-order group unipolar signals. The multiplexing circuit 14 multiplexes the selected low-order group unipolar signals of these orders (a plurality of test low-order group unipolar signals) into a group of high-order group unipolar signals. The one group of high-order group unipolar signals multiplexed by the multiplexing circuit 14 is converted into one group of high-order group bipolar signals by the U/B conversion circuit 15, and this one group of high-order group bipolar signals is output from the output terminal 16 to the multiplex converter. 10 and inputted to the input terminal 17 of the multiplex converter 10 again for loopback testing. This input group of high-order group bipolar signals is
The B/U conversion circuit 18 converts the signal into a group of high-order group unipolar signals, and the separation circuit 19 separates this group of high-order group unipolar signals into a plurality of low-order group unipolar signals. The plurality of low-order group unipolar signals separated by the separation circuit 10 are respectively converted into a plurality of low-order group bipolar signals by the plurality of U/B conversion circuits 20. Multiple output terminals 21
is sent out from the multiplex converter 10, and the multiplex converter 10
After being turned back outside, the signals are again input to the plurality of input terminals 22 of the multiplex converter 10. The plurality of input low-order group bipolar signals are each converted into a plurality of low-order unipolar signals by the plurality of B/U conversion circuits 13, and then supplied to the error detection circuit 23, where bit errors are detected. be done.

以上の方式により、多重変換装置10の信号折り返し試
験ができることが分る。
It can be seen that the signal return test of the multiplex converter 10 can be performed using the above method.

第2図を参照すると、本発明の第2の実施例による多重
変換装置10の折り返し試験方式では、試験信号発生器
11から発生した試験用低次群ユニポーラ信号は、分離
回路19と複数のU/B変換回路20の間にそれぞれ挿
入された複数の選択回路12の一方の入力端子に供給さ
れる。複数の選択回FI!112の他方の入力端子には
、それぞれ分離回路19で分能された複数の低次群ユニ
ポーラ信号が供給される。複数の選択回路12は、それ
ぞれ試験信号発生器11から発生される試験用低次群ユ
ニポーラ信号と分離回路19で分離された複数の低次群
ユニポーラ信号とのどちらか一方を選択し、複数の選択
された低次群ユニポーラ信号をそれぞれ複数のU/B変
換回路20へ送出する。
Referring to FIG. 2, in the folding test method of the multiplex converter 10 according to the second embodiment of the present invention, the test low-order group unipolar signal generated from the test signal generator 11 is transmitted to the separation circuit 19 and a plurality of U The signal is supplied to one input terminal of a plurality of selection circuits 12 each inserted between the /B conversion circuits 20. Multiple selection times FI! The other input terminal of 112 is supplied with a plurality of low-order group unipolar signals divided by the separation circuit 19, respectively. The plurality of selection circuits 12 each select one of the test low-order group unipolar signal generated from the test signal generator 11 and the plurality of low-order group unipolar signals separated by the separation circuit 19, and The selected low-order group unipolar signals are each sent to a plurality of U/B conversion circuits 20.

試験中は、複数の選択回路12は、それぞれ試験用低次
群ユニポーラ信号を選択し、これ等を複数の選択された
低次群ユニポーラ信号として複数のU/B変換回路20
へ送出する。複数のU/B変換回路20は、複数の選択
された低次群ユニポーラ信号(複数の試験用低次群ユニ
ポーラ信号)をそれぞれ複数の低次群バイポーラ信号に
変換する。これ等複数の低次群バイポーラ信号は、それ
ぞれ複数の出力端子21より多重変換装置10外へ送出
され、多重変換装置10外で折り返した後、再び多重変
換装置10の複数の入力端子22に入力される。この入
力された複数の低次群バイポーラ信号は、それぞれ複数
のB/U変換回路13により複数の低次群ユニポーラ信
号に変換された後、多重化回路14へ送出される。多重
化回路14は、複数の低次群ユニポーラ信号を1群の高
次群ユニポーラ信号に多重化する。この多重化回路14
で多重化された1群の高次群ユニポーラ信号は、U/B
変換回路15で1群の高次群バイポーラ信号に変換され
、この1群の高次群バイポーラ信号は出力端子16より
多重変換装置10外へ送出され、再び折り返し試験の為
に、多重変換装置10の入力端子17に入力される。こ
の入力された1群の高次群バイポーラ信号は、B/U変
換回路18により1群の高次群ユニポーラ信号に変換さ
れ、この1群の高次群ユニポーラ信号は、分離回路19
により複数の低次群ユニポーラ信号に分離される。この
分離回路10で分離された複数の低次群ユニポーラ信号
は、誤り検出回路23に供給され、ここでビット誤りが
検出される。
During the test, the plurality of selection circuits 12 each select a test low-order group unipolar signal, and these are used as the plurality of selected low-order group unipolar signals to be sent to the plurality of U/B conversion circuits 20.
Send to. The plurality of U/B conversion circuits 20 each convert the plurality of selected low-order group unipolar signals (the plurality of test low-order group unipolar signals) into a plurality of low-order group bipolar signals. These plural low-order group bipolar signals are each sent out from the multiplex converter 10 from the multiple output terminals 21, and after being turned back outside the multiplex converter 10, are inputted again to the multiple input terminals 22 of the multiplex converter 10. be done. The plurality of input low-order group bipolar signals are respectively converted into a plurality of low-order group unipolar signals by the plurality of B/U conversion circuits 13 and then sent to the multiplexing circuit 14. The multiplexing circuit 14 multiplexes a plurality of low-order group unipolar signals into one group of high-order group unipolar signals. This multiplexing circuit 14
One group of high-order group unipolar signals multiplexed with U/B
The conversion circuit 15 converts the signals into a group of high-order group bipolar signals, and this group of high-order bipolar signals is sent out from the multiplex converter 10 from the output terminal 16, and is then sent to the input terminal 17 of the multiplex converter 10 for a repeat test. is input. The input one group of high-order group bipolar signals is converted into one group of high-order group unipolar signals by the B/U conversion circuit 18, and this one group of high-order group unipolar signals is converted into one group of high-order group unipolar signals by the separation circuit 19.
is separated into a plurality of low-order group unipolar signals. The plurality of low-order group unipolar signals separated by this separation circuit 10 are supplied to an error detection circuit 23, where bit errors are detected.

以上の方式により、多重変換装置10の信号折り返し試
験ができることが分る。
It can be seen that the signal return test of the multiplex converter 10 can be performed using the above method.

[発明の効果] 以上の説明で明らかなように、本発明によれば、本線系
の低次群ユニポーラ信号と試験信号発生手段から発生さ
れる試験用低次群ユニポーラ信号とを選択する選択回路
を設け、試験中は、試験用低次群ユニポーラ信号を選択
回路で選択して被試験多重変換装置へ挿入し、分岐して
、多重変換装置の折り返し試験を行うことにより、試験
側の規模を縮小することができ、しかもアナログ回路を
省いているので、その部分の特性を考慮しなくても良い
という効果がある。
[Effects of the Invention] As is clear from the above description, according to the present invention, a selection circuit that selects a low-order group unipolar signal of the main line system and a low-order group unipolar signal for testing generated from the test signal generating means is provided. During the test, the test low-order group unipolar signal is selected by the selection circuit, inserted into the multiplex converter under test, branched, and looped back to the multiplex converter, thereby reducing the scale of the test side. It can be downsized, and since analog circuits are omitted, there is no need to consider the characteristics of that part.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の第1の実施例による多重変換装置の折
り返し試験方式の構成を示すブロック図、第2図は本発
明の第2の実施例による多重変換装置の折り返し試験方
式の構成を示すブロック図、第3図は従来の多重変換装
置の折り返し試験方式の構成を示すブロック図である。 10・・・多重変換装置、11・・・試験信号発生器、
12・・・選択回路、13・・・バイポーラ/ユニポー
ラ(B/U )変換回路、14・・・多重化回路、15
・・・ユニポーラ/バイポーラ(U/B)変換回路、1
6・・・出力端子、17・・・入力端子、18・・・バ
イポーラ/ユニポーラ(B/U)変換回路、19・・・
分離回路、20・・・ユニポーラ/バイポーラ(U/B
)変換回路、21・・・出力端子、22・・・入力端子
、23・・・誤り検出回路。
FIG. 1 is a block diagram showing the structure of a folding test method for a multiplex converter according to a first embodiment of the present invention, and FIG. 2 shows a structure of a foldback test method for a multiplex converter according to a second embodiment of the present invention. FIG. 3 is a block diagram showing the configuration of a folding test method of a conventional multiplex converter. 10... Multiplex converter, 11... Test signal generator,
12... Selection circuit, 13... Bipolar/unipolar (B/U) conversion circuit, 14... Multiplexing circuit, 15
... Unipolar/bipolar (U/B) conversion circuit, 1
6... Output terminal, 17... Input terminal, 18... Bipolar/unipolar (B/U) conversion circuit, 19...
Separation circuit, 20...unipolar/bipolar (U/B
) conversion circuit, 21...output terminal, 22...input terminal, 23...error detection circuit.

Claims (1)

【特許請求の範囲】 1)複数の低次群バイポーラ信号を入力する複数の第1
の入力端子と、該複数の第1の入力端子から入力された
複数の低次群バイポーラ信号をそれぞれ複数の低次群ユ
ニポーラ信号に変換する複数の第1のバイポーラ/ユニ
ポーラ変換手段と、該複数の第1のバイポーラ/ユニポ
ーラ変換手段で変換された複数の低次群ユニポーラ信号
を1群の高次群ユニポーラ信号に多重化する多重化手段
と、該多重化手段で多重化された1群の高次群ユニポー
ラ信号を1群の高次群バイポーラ信号に変換する第1の
ユニポーラ/バイポーラ変換手段と、該第1のユニポー
ラ/バイポーラ変換手段で変換された1群の高次群バイ
ポーラ信号を出力する第1の出力端子と、1群の高次群
バイポーラ信号を入力する第2の入力端子と、該第2の
入力端子から入力された1群の高次群バイポーラ信号を
1群の高次群ユニポーラ信号に変換する第2のバイポー
ラ/ユニポーラ変換手段と、該第2のバイポーラ/ユニ
ポーラ変換手段で変換された1群の高次群ユニポーラ信
号を複数の低次群ユニポーラ信号に分離する分離手段と
、該分離手段で分離された複数の低次群ユニポーラ信号
をそれぞれ複数の低次群バイポーラ信号に変換する複数
の第2のユニポーラ/バイポーラ変換手段と、該複数の
第2のユニポーラ/バイポーラ変換手段で変換された複
数の低次群バイポーラ信号をそれぞれ出力する複数の第
2の出力端子とを有する多重変換装置を折り返し試験す
る方式に於いて、 前記第1の出力端子と前記第2の入力端子とを接続し、 前記複数の第2の出力端子と前記複数の第1の入力端子
とをそれぞれ接続し、 試験用低次群ユニポーラ信号を発生する試験信号発生手
段と、 前記複数の第1のバイポーラ/ユニポーラ変換手段と前
記多重化手段との間に挿入され、前記複数の第1のバイ
ポーラ/ユニポーラ変換手段で変換された複数の低次群
ユニポーラ信号と前記試験信号発生手段から発生された
試験用低次群ユニポーラ信号とのどちらか一方をそれぞ
れ選択する複数の選択手段と、 前記複数の第1のバイポーラ/ユニポーラ変換手段で変
換された複数の低次群ユニポーラ信号のビット誤りをそ
れぞれ検出する誤り検出手段とを有することを特徴とす
る多重変換装置の折り返し試験方式。 2)複数の低次群バイポーラ信号を入力する複数の第1
の入力端子と、該複数の第1の入力端子から入力された
複数の低次群バイポーラ信号をそれぞれ複数の低次群ユ
ニポーラ信号に変換する複数の第1のバイポーラ/ユニ
ポーラ変換手段と、該複数の第1のバイポーラ/ユニポ
ーラ変換手段で変換された複数の低次群ユニポーラ信号
を1群の高次群ユニポーラ信号に多重化する多重化手段
と、該多重化手段で多重化された1群の高次群ユニポー
ラ信号を1群の高次群バイポーラ信号に変換する第1の
ユニポーラ/バイポーラ変換手段と、該第1のユニポー
ラ/バイポーラ変換手段で変換された1群の高次群バイ
ポーラ信号を出力する第1の出力端子と、1群の高次群
バイポーラ信号を入力する第2の入力端子と、該第2の
入力端子から入力された1群の高次群バイポーラ信号を
1群の高次群ユニポーラ信号に変換する第2のバイポー
ラ/ユニポーラ変換手段と、該第2のバイポーラ/ユニ
ポーラ変換手段で変換された1群の高次群ユニポーラ信
号を複数の低次群ユニポーラ信号に分離する分離手段と
、該分離手段で分離された複数の低次群ユニポーラ信号
をそれぞれ複数の低次群バイポーラ信号に変換する複数
の第2のユニポーラ/バイポーラ変換手段と、該複数の
第2のユニポーラ/バイポーラ変換手段で変換された複
数の低次群バイポーラ信号をそれぞれ出力する複数の第
2の出力端子とを有する多重変換装置を折り返し試験す
る方式に於いて、 前記第1の出力端子と前記第2の入力端子とを接続し、 前記複数の第2の出力端子と前記複数の第1の入力端子
とをそれぞれ接続し、 試験用低次群ユニポーラ信号を発生する試験信号発生手
段と、 前記分離手段と前記複数の第2のユニポーラ/バイポー
ラ変換手段との間に挿入され、前記分離手段で分離され
た複数の低次群ユニポーラ信号と前記試験信号発生手段
から発生された試験用低次群ユニポーラ信号とのどちら
か一方をそれぞれ選択する複数の選択手段と、 前記分離手段で分離された複数の低次群ユニポーラ信号
のビット誤りをそれぞれ検出する誤り検出手段と を有することを特徴とする多重変換装置の折り返し試験
方式。
[Claims] 1) A plurality of first input signals receiving a plurality of low-order group bipolar signals;
a plurality of first bipolar/unipolar conversion means for converting a plurality of low-order group bipolar signals inputted from the plurality of first input terminals into a plurality of low-order group unipolar signals, respectively; multiplexing means for multiplexing a plurality of low-order group unipolar signals converted by the first bipolar/unipolar conversion means into a group of high-order group unipolar signals; and a group of high-order group unipolar signals multiplexed by the multiplexing means. a first unipolar/bipolar conversion means for converting a signal into a group of high-order group bipolar signals; a first output terminal for outputting a group of high-order group bipolar signals converted by the first unipolar/bipolar conversion means; a second input terminal for inputting one group of high-order group bipolar signals; and a second bipolar/unipolar conversion means for converting one group of high-order group bipolar signals inputted from the second input terminal into one group of high-order group unipolar signals. and separation means for separating a group of high-order group unipolar signals converted by the second bipolar/unipolar conversion means into a plurality of low-order group unipolar signals, and a plurality of low-order group unipolar signals separated by the separation means. a plurality of second unipolar/bipolar conversion means for converting each into a plurality of low-order group bipolar signals, and each outputs a plurality of low-order group bipolar signals converted by the plurality of second unipolar/bipolar conversion means. In a method for loop testing a multiplex converter having a plurality of second output terminals, the first output terminal and the second input terminal are connected, and the plurality of second output terminals and the A test signal generation means that connects each of the plurality of first input terminals and generates a low-order group unipolar signal for testing, and is inserted between the plurality of first bipolar/unipolar conversion means and the multiplexing means. and selecting either one of the plurality of low-order group unipolar signals converted by the plurality of first bipolar/unipolar conversion means and the test low-order group unipolar signal generated from the test signal generation means. A multiplex conversion device comprising: a plurality of selection means; and an error detection means for detecting bit errors in each of the plurality of low-order group unipolar signals converted by the plurality of first bipolar/unipolar conversion means. Folded test method. 2) A plurality of first input signals receiving a plurality of low-order group bipolar signals.
a plurality of first bipolar/unipolar conversion means for converting a plurality of low-order group bipolar signals inputted from the plurality of first input terminals into a plurality of low-order group unipolar signals, respectively; multiplexing means for multiplexing a plurality of low-order group unipolar signals converted by the first bipolar/unipolar conversion means into a group of high-order group unipolar signals; and a group of high-order group unipolar signals multiplexed by the multiplexing means. a first unipolar/bipolar conversion means for converting a signal into a group of high-order group bipolar signals; a first output terminal for outputting a group of high-order group bipolar signals converted by the first unipolar/bipolar conversion means; a second input terminal for inputting one group of high-order group bipolar signals; and a second bipolar/unipolar conversion means for converting one group of high-order group bipolar signals inputted from the second input terminal into one group of high-order group unipolar signals. and separation means for separating a group of high-order group unipolar signals converted by the second bipolar/unipolar conversion means into a plurality of low-order group unipolar signals, and a plurality of low-order group unipolar signals separated by the separation means. a plurality of second unipolar/bipolar conversion means for converting each into a plurality of low-order group bipolar signals, and each outputs a plurality of low-order group bipolar signals converted by the plurality of second unipolar/bipolar conversion means. In a method for loop testing a multiplex converter having a plurality of second output terminals, the first output terminal and the second input terminal are connected, and the plurality of second output terminals and the A test signal generation means that connects each of the plurality of first input terminals and generates a low-order group unipolar signal for testing, and is inserted between the separation means and the plurality of second unipolar/bipolar conversion means. , a plurality of selection means for respectively selecting one of the plurality of low-order group unipolar signals separated by the separation means and the test low-order group unipolar signal generated from the test signal generation means; and the separation means. and error detection means for respectively detecting bit errors in a plurality of low-order group unipolar signals separated by .
JP30591887A 1987-12-04 1987-12-04 Loopback test system for multiplex converter Pending JPH01147934A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30591887A JPH01147934A (en) 1987-12-04 1987-12-04 Loopback test system for multiplex converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30591887A JPH01147934A (en) 1987-12-04 1987-12-04 Loopback test system for multiplex converter

Publications (1)

Publication Number Publication Date
JPH01147934A true JPH01147934A (en) 1989-06-09

Family

ID=17950866

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30591887A Pending JPH01147934A (en) 1987-12-04 1987-12-04 Loopback test system for multiplex converter

Country Status (1)

Country Link
JP (1) JPH01147934A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011077709A (en) * 2009-09-29 2011-04-14 Anritsu Corp Apparatus and method for detection of signal generation
CN108226762A (en) * 2018-01-15 2018-06-29 浙江中控技术股份有限公司 A kind of diagnostic circuit for multiplexed signal sampling circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011077709A (en) * 2009-09-29 2011-04-14 Anritsu Corp Apparatus and method for detection of signal generation
CN108226762A (en) * 2018-01-15 2018-06-29 浙江中控技术股份有限公司 A kind of diagnostic circuit for multiplexed signal sampling circuit
CN108226762B (en) * 2018-01-15 2021-02-02 浙江中控技术股份有限公司 Diagnostic circuit for multi-channel signal acquisition circuit

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