JPH01144135A - System for observing program executing process - Google Patents

Abstract

PURPOSE:To omit an external memory which stores the program observing results by reading freely reading the address and the data which are used by the instruction carried out immediately before a single step interruption within an interruption processing program. CONSTITUTION:A CPU1 contains register groups 3-6 which hold the address and data carried out right before a single step interruption. In this case, the addresses fetched by an input origin address latch register group 3 and an output destination address latch register group 5 include the memory address, the register number address, the input/output device address, and the information which discriminates these three types of addresses. Then an interruption processing program 12 of an internal memory 10 prepares the instructions which refer to those register groups 3-6 and carries out these instructions for observation of the executing process of a program to be debugged. Thus an external memory which stores the program observing results is eliminated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a program execution process observation method.

[Conventional technology]

Conventionally, in order to observe the execution process of a program, it is necessary to have a device that monitors addresses, data, and various control signals exchanged between the central processing unit, memory, and peripheral devices, and an external memory that stores the observation results. are using. Since this information stored in the external memory has a large degree of freedom in its order, the program execution process can be reconstructed by analyzing it later.

[Problem that the invention seeks to solve]

The conventional method described above has the disadvantage that it requires a device for observing control signals and an external memory for storing observation results, and it takes time and effort to reconstruct the program execution process.

[Means for solving problems]

The program execution process observation method of the present invention provides storage means in an internal memory or central processing unit to distinguish and store addresses and data used in instructions executed by the program to be debugged immediately before a single-step interrupt. The present invention is characterized in that an instruction that can refer to a storage means is prepared for the interrupted debug program, and the debug program executes this instruction to observe the execution process of the program to be debugged.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention, in which a central processing unit 1 includes a general-purpose register 2, a status register 8, and a state register 8.
．． In addition to the program counter 9, the input source address latch register group 3. Input data latch register group 4. A cutting edge address latch register group 5 and an output data latch register group 6 are prepared.

These register groups 3 to 6 are a register group that holds addresses and data used in the instruction executed immediately before the single step interrupt. Here, input source address latch register group 3 and cutting edge address latch register group 5
The addresses taken in include memory addresses, register numbers, input/output device addresses, and information that distinguishes these three types of addresses.

The memory 10 is an internal memory, and stores a program 7 to be debugged and an interrupt processing program 1 serving as a debugger.
2 and a stack 11, and the interrupt processing program 12 is provided with instructions that refer to each of the register groups 3 to 6.

Next, the operation of this embodiment will be explained.

In program 7, when one instruction is executed, a state (
(hereinafter referred to as trace state). When a single-step interrupt actually occurs, the central processing unit 1 stores the address of the instruction executed immediately before the single-step interrupt, and a status register 8 containing a flag indicating that the trace status is in progress (hereinafter referred to as a trace flag). and the value of the program counter 9 at that time are saved in the stack 11 in the memory 10, the value of the trace flag in the status register 8 is set to the non-trace state, and the interrupt processing program 12 is executed.

Also, at this time, the address of the data read by the instruction executed immediately before the single step interrupt is stored in the input source address latch register group 3, and the content of the read data is stored in the input data latch register group 4, at the writing address. The contents of the written data are stored in the cutting edge address latch register group 5 and the output data latch register group 6, respectively.

The written address and the written data are particularly important because writing is a turning point in the program, so storing only these is often meaningful for debugging.

Within the interrupt processing program 12, register groups 3 to 6 and the stack 11 can be freely referenced by the above-mentioned commands, and by such operations, for example, the contents of the cutting edge address latch register group 5 can be displayed on the display. and debug program 7.

When an instruction to return from an interrupt is executed in the interrupt processing program 12, the values of the status register 8 and the program counter 9 are recovered from the stack 11. Therefore, if the value of the trace flag of the status register saved in the stack 11 has not changed, the program returns to the interrupted program 7 in the trace state.

In the above embodiment, the address of the read data, the read data, the write address, and the written data are stored in the central processing unit 1, but it is also possible to store these information in the memory 10. Also, instead of stack 11, general-purpose register 2
．． A register for storing the contents of the status register 8 and the program counter 9 may be provided in the central processing unit 1.

〔Effect of the invention〕

As explained above, the present invention saves the address and data used in the instruction executed immediately before a single-step interrupt.
Since it can be freely read within the interrupt processing program, the observation results of the program can be stored in the memory within the information processing device or within the central processing unit, which has the effect of not requiring any special equipment or external memory.

Furthermore, since addresses and data are stored separately for each type, there is an advantage that the program execution process can be easily reconfigured.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of one embodiment of the present invention. 1...Central processing unit, 2...General-purpose register, 3...
- Input source address latch register group, 4... Input data latch register group, 5... Cutting edge address latch register group, 6... Output data latch register group, 7.
...Program, 8...Status register, 9...Program counter, 10...Memory, 11...Stack, 12...Interrupt processing program.

Claims (2)

[Claims] (1) A storage means is provided in the internal memory or central processing unit to separately store the address and data used in the instruction executed by the program to be debugged immediately before the single-step interrupt, and debugging after the single-step interrupt is performed. A program execution process observation method characterized in that an instruction that can refer to the storage means is provided for the program, and the debug program executes the instruction to observe the execution process of the program to be debugged. . (2) Claim (1) characterized in that the address and data for which a write operation was performed by an instruction executed by the program to be debugged immediately before a single-step interrupt are stored in the storage means. A method for observing the program execution process.