JPH01143355A - Manufacture of hetero junction bipolar transistor - Google Patents

Abstract

PURPOSE:To obtain a silicon hetero junction bipolar transistor having excellent high speed operation characteristic by laminating fine crystalline silicon carbide by a plasma CVD method thereby to form an emitter layer. CONSTITUTION:An N<-> type silicon epitaxial layer 2 is formed on an N<+> type silicon wafer 1. Then, an SiO2 film 4 is formed by thermally oxidizing, and patterned. Thereafter, after B2O3 is adhered to the surface, boron is diffused in a wet O2 atmosphere, thereby forming a P-type region 3. Again, the film 4 is patterned. Thereafter, 5000Angstrom of N<+>muc-SiC:H5 having 1OMEGA<-1>.cm<1> is laminated under the conditions (a) 0<SiH4+CH4/H2 concentration <= 10%, 0.01% <PH3 concentration <20%, 0<CH4/SiH4+CH4 <100%, 0.01-10Torr of gas pressure, b) room temperature-800 deg.C of substrate temperature, and c) 1mW/cm<2> to 100w/cm<2> of applied power. Eventually, aluminum metal 6 is deposited, and wired.

Description

Detailed Description of the Invention (Industrial Application Field) The present invention provides an optimal emitter layer manufacturing method for obtaining a heterojunction bipolar transistor having a high current amplification factor and good high-speed operation characteristics. It is related to.

(Prior Art) In order to speed up the device operation of silicon bipolar transistors, it has been proposed to adopt a hetero-emitter structure.

Heterojunction bipolar transistors, which utilize heterojunctions made by joining dissimilar semiconductor materials, have many advantages over conventional homojunction bipolar transistors made using a single material.

For example, by making the semiconductor material that makes up the emitter layer have a wider bandgap than the semiconductor material that makes up the base layer, it is possible to avoid reducing the emitter injection efficiency or increasing the diffusion of holes in the emitter. ,
The impurity concentration of the emitter region and the impurity concentration of the base region can be set independently.

Therefore, since the impurity concentration of the base layer can be increased, the base resistance can be lowered, and at the same time, the minority carrier accumulation effect can be reduced. Furthermore, a thin base layer can be formed.

Similarly, since the impurity concentration of the emitter layer can be lowered, the emitter capacitance can be reduced.

Due to these advantages, a heterojunction bipolar transistor has the potential to be extremely superior in terms of current amplification factor and high-speed operation characteristics compared to a conventional homojunction bipolar transistor.

When actually constructing such a heterojunction bipolar transistor, it has been proposed to use amorphous silicon carbide (hereinafter referred to as a-9iC:H) for the emitter layer. (Spring Society of Applied Physics, 1988) Figure 5 shows a cross-sectional view of a conventional heterojunction bipolar transistor.

? An n-silicon epitaxial layer 2 is grown on a silicon wafer 1. Next, a SiO□ film 4 is formed, and after patterning by photolithography, boron is doped by ion implantation or the like to form a P region 3. Subsequently, na-3iC:H5' is laminated by plasma CVD. And finally,
A contact hole is formed in the SiO□ film 4 by photolithography, and an aluminum metal 6 is formed on the back surface of the n-silicon wafer 1 and the upper surface of the P region 4 and na-3iC:H5'.
are stacked and wiring E and C are performed.

In such a structure, the n+ silicon wafer 1 and the i-silicon layer 2 are the collector, the P region 3 is the base, and the na-
5iC:H serves as an emitter and constitutes a bipolar transistor.

(Problems to be Solved by the Invention) A-5iC:H used in the emitter layer of a conventional heterojunction bipolar transistor has low conductivity and poor injection efficiency, resulting in a decrease in current gain.

In addition, high frequency characteristics and switching characteristics are inferior.

Due to the above-mentioned drawbacks, a hetero bipolar transistor using a-5iC:H in the emitter layer has not been put into practical use.

SUMMARY OF THE INVENTION An object of the present invention was to provide an optimal manufacturing method for forming an emitter layer in order to obtain a device with a high current amplification factor and good high-speed operation characteristics. It is something.

(Means and operations for solving the problem) In order to solve the above problem, the emitter layer of the silicon heterojunction bipolar transistor of the present invention is formed by plasma CVD method.
Conditions shown in the following a), b), and C): 0 < SiH, ) + CH4/H2 concentration ≦10%, 0.01% < PH, concentration <20%, O <
CH4/S i H4+CH4<100%, gas pressure 0.01~IOT or rb) Substrate temperature Room temperature~
800°C C) Applied RF power 10mW/am' or more, 20
It is formed by stacking microcrystalline silicon carbide (hereinafter referred to as μc-3iC) using 0 W/mark 2 or less.

μc-3i produced using the above conditions can obtain a high electrical conductivity of 1Ω·K or more. Therefore, a silicon heterojunction bipolar transistor completed using this for the emitter layer is a device with high injection efficiency, high current amplification factor, and excellent high-speed operation characteristics.

(Example) Hereinafter, a method for manufacturing a silicon heterojunction bipolar transistor of the present invention will be described with reference to the drawings.

6- FIG. 1 is a diagram showing the manufacturing process of the silicon heterojunction bipolar transistor of the present invention, and FIGS. 1(a) to (h) are diagrams showing the process in chronological order.

As shown in Fig. 1(a), the n-silicon with a mark of 0.5 to 5 Ω is placed on the n-silicon wafer 1 below the edge of the 0.02 Ω
An n-silicon layer 2 is formed by growing a layer of about 5 μm at 1150° C. using iC14.

Next, as shown in FIG. 1(b), the n-silicon wafer 1 on which the n-silicon epitaxial layer 2 was formed was heated to 1100°C and 60°C.
Thermal oxidation is performed in a wet 02 atmosphere to form a SiO2 film 4 of approximately 5000A, and the SiO2 film is patterned by photolithography as shown in FIG. 1(C).

Subsequently, after depositing a sufficient amount of 8203 on the surface, as shown in FIG.
Boron was diffused at 00°C for 20 minutes, and the surface concentration was 10/am.
A P region 3 having a depth of about 0.5 μm is formed.

Then, as shown in FIG. 1(e), photolithography is performed again to pattern the SiO2 film 4 and form a bonding surface 5' between the P region 3 and the emitter layer.

Thereafter, as shown in FIG. 1(f), a) o<s i H4+CH4/H concentration≦10%,
0.01%<PH3 concentration<20%, O<CH4/
Si H4+ CH4<100%, gas pressure 0.0
1~IOT orrb) Substrate temperature, room temperature ~ 800°Cc
)Applied power 1mW/cTr12 or more 100W/
cm2 or less, nμc-3i C with a mark of 1Ω-1・
: H5 is stacked at 5000A.

Furthermore, as shown in FIG. 1(g), photolithography is performed to pattern the SiO3 film 4, thereby forming a bonding surface 6' between the aluminum metal and the P region 3.

Finally, as shown in FIG. 1(h), aluminum metal 6 is vapor-deposited on the back surface of the n-silicon wafer 1, on the nμc-3iC:H5, and on the P region 3, and wiring is performed.

Through the above steps, the silicon heterojunction bipolar transistor of the present invention is completed, with the n silicon wafer 1 serving as the collector, the P region 3 serving as the base, and the n+uc-3iC:H serving as the emitter.

The μc-9iC:H described in this example has a structure containing a microcrystalline phase in amorphous silicon, as shown in FIG. The periphery of the microcrystal is terminated with hydrogen atoms.

FIG. 3 shows the bandgap of μc-3iC:H. From the same figure, the bandgap of μc-3iC is 2.15eV
Similarly to a-9iC:H, this figure has a wide bandgap, CH4/SiH4+CH, = 0.5
This is the case. Therefore, the impurity concentration in the emitter region and the impurity concentration in the base region can be set independently without reducing the emitter injection efficiency or increasing the diffusion of holes into the emitter. Therefore, since the impurity concentration of the base layer can be increased, the base resistance can be lowered and a thin base layer can be formed. Similarly, since the impurity concentration of the emitter layer can be lowered, the emitter capacitance can be reduced.

FIG. 4 shows the relationship between the conductivity of μc-3ic:H and RF power when the gas pressure is ITorr.

When the RF power is 100 W or more, a very high value of 1 Ω-1·dl can be obtained.

Therefore, the emitter layer of μc-SiC:H has a wide band gap, high carrier density, and low resistance.

Because the carrier density in the emitter layer is high, if a forward voltage is applied between the emitter and base while applying a reverse voltage between the base and collector, voltage will be injected from the emitter to the base. However, the injection of electrons at this time is a
This is larger than when −9iC:H is used as an emitter.

(Injection efficiency is improved) At the same time, the ability to prevent holes from diffusing to the emitter is increased, so the current amplification factor is improved.

In this example, S i H4+ is used as the raw material gas.
Although CH,/H2 was used, a similar emitter layer can be obtained by using F instead of H2. Also, S 12H6 instead of 81 town, C2H,, C2H2 instead of CH4
Hydrocarbon-based gases such as the like may also be used.

(Effects of the Invention) By manufacturing with the manufacturing method of the present invention, it becomes possible to form μc-3iC with a large energy band gap, high carrier density, and low resistance in the emitter layer.

Since the current amplification factor and high-speed operation characteristics of the device are improved, a high-speed, high-gain switching device can be obtained.

Furthermore, the heat resistance of μc-5iC:H is about 50°C higher than that of a-Sic:H, so post-process heat treatments such as aluminum sintering can be performed at higher temperatures, increasing the degree of freedom in process design. By performing aluminum sintering at high temperatures, contact resistance can be lowered.

[Brief explanation of the drawing]

FIG. 1 is a manufacturing process diagram of a silicon heterojunction bipolar transistor of the present invention. FIG. 2 is a μc-5iC:H (D structure diagram).
Figure 4 is a diagram showing the bandgap of -sic:H (Figure 5 is a cross-sectional view of a conventional silicon heterojunction bipolar transistor. Figure 5 is a diagram showing the relationship between conductivity and RF power. 1...n Luricon wafer 2...n-silicon layer 3...P region 4φ φ ・SiO, film 5◆・Φn/1c-8ic:H 6... Aluminum metal

Claims (2)

[Claims] (1) A first step of crystal-growing n^-silicon on an n^+ type silicon substrate to form a collector region, and selectively doping the n^-silicon layer with boron to form a base region. A second step is to form an emitter region by laminating microcrystalline silicon carbide on the base region through a partially etched silicon oxide film so that the base region and the emitter region are in contact with each other. A method for manufacturing a heterojunction bipolar transistor comprising steps. (2) The above step of laminating microcrystalline silicon carbide uses plasma CVD method under the following conditions: a) 0<SiH_4+CH_4/H_2 concentration≦10%;
0.01%<PH_3 concentration<20%, 0<CH_4/S
iH_4^+CH_4<100%, gas pressure 0.01~
10Torr b) Substrate temperature from room temperature to 800℃ c) Applied RF power 10mW/cm^2 or more, 200W
2. A method for manufacturing a heterojunction bipolar transistor according to claim 1, wherein the manufacturing method is performed at a temperature of /cm^2 or less.