JPH01142238U - - Google Patents
Info
- Publication number
- JPH01142238U JPH01142238U JP3652988U JP3652988U JPH01142238U JP H01142238 U JPH01142238 U JP H01142238U JP 3652988 U JP3652988 U JP 3652988U JP 3652988 U JP3652988 U JP 3652988U JP H01142238 U JPH01142238 U JP H01142238U
- Authority
- JP
- Japan
- Prior art keywords
- tuning
- section
- frequency synthesizer
- pll
- display
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000001514 detection method Methods 0.000 claims description 5
- 238000010586 diagram Methods 0.000 description 5
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
Landscapes
- Stereo-Broadcasting Methods (AREA)
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
- Superheterodyne Receivers (AREA)
Description
第1図はこの考案の1つの実施例に係るPLL
周波数シンセサイザ式チユーナのブロツク図、第
2図と第3図は第1図中のマイクロコンピユータ
の動作を示すフローチヤート、第4図は第1図の
変形例を示すブロツク図、第5図はこの考案の他
の実施例に係るPLL周波数シンセサイザ式チユ
ーナのブロツク図、第6図乃至第8図は第5図中
のマイクロコンピユータの動作を示すフローチヤ
ート、第9図は従来のPLL周波数シンセサイザ
式チユーナのブロツク図、第10図は第9図中の
同調用の表示駆動回路の一例を示す回路図である
。
52:同調回路、56:MPX回路、60,6
6B:表示駆動回路、62:ステレオ表示器、6
4:同調検出回路、68:同調表示器、70,7
0A,70B:マイクロコンピユータ。
FIG. 1 shows a PLL according to one embodiment of this invention.
A block diagram of a frequency synthesizer type tuner, FIGS. 2 and 3 are flowcharts showing the operation of the microcomputer in FIG. 1, FIG. 4 is a block diagram showing a modification of FIG. 1, and FIG. A block diagram of a PLL frequency synthesizer type tuner according to another embodiment of the invention, FIGS. 6 to 8 are flowcharts showing the operation of the microcomputer in FIG. 5, and FIG. 9 is a block diagram of a conventional PLL frequency synthesizer type tuner. FIG. 10 is a circuit diagram showing an example of the display drive circuit for tuning shown in FIG. 52: Tuning circuit, 56: MPX circuit, 60,6
6B: Display drive circuit, 62: Stereo display, 6
4: Tuning detection circuit, 68: Tuning indicator, 70,7
0A, 70B: Microcomputer.
Claims (1)
するPLL周波数シンセサイザ式同調部と、同調
の有無を検出する同調検出部と、この同調検出部
が同調不検出時はステレオ受信検出動作を止める
MPX部と、MPX部がステレオ受信を検出した
ときステレオ受信表示を行うステレオ表示部とを
含むPLL周波数シンセサイザ式チユーナにおい
て、 周波数変更時、前記PLL周波数シンセサイザ
式同調部のPLLループが不安定な間はステレオ
表示部のステレオ受信表示を禁止させるステレオ
表示制御部、 を備えたことを特徴とするPLL周波数シンセ
サイザ式チユーナ。 (2) 周波数制御データに従い受信周波数を変更
するPLL周波数シンセサイザ式同調部と、同調
の有無を検出する同調検出部と、この同調検出部
が同調を検出したとき同調表示を行う同調表示部
とを含むPLL周波数シンセサイザ式チユーナに
おいて、 周波数変更時、前記PLL周波数シンセサイザ
式同調部のPLLループが不安定な間は同調表示
部の同調表示を禁止させる同調表示制御部、 を備えたことを特徴とするPLL周波数シンセ
サイザ式チユーナ。 (3) スキヤン時は同調表示を禁止しないことを
特徴とする第2項記載のPLL周波数シンセサイ
ザ式チユーナ。[Claims for Utility Model Registration] (1) A PLL frequency synthesizer type tuning section that changes the reception frequency according to frequency control data, a tuning detection section that detects the presence or absence of tuning, and a stereo In a PLL frequency synthesizer tuner that includes an MPX section that stops reception detection operation and a stereo display section that displays stereo reception when the MPX section detects stereo reception, when the frequency is changed, the PLL loop of the PLL frequency synthesizer tuning section A PLL frequency synthesizer type tuner, comprising: a stereo display control unit that prohibits stereo reception display on the stereo display unit while the signal is unstable. (2) A PLL frequency synthesizer type tuning section that changes the reception frequency according to frequency control data, a tuning detection section that detects the presence or absence of tuning, and a tuning display section that displays tuning when the tuning detection section detects tuning. A PLL frequency synthesizer type tuner comprising: a tuning display control unit that prohibits tuning display on a tuning display unit while the PLL loop of the PLL frequency synthesizer type tuning unit is unstable when changing the frequency. PLL frequency synthesizer type tuner. (3) The PLL frequency synthesizer type tuner according to item 2, characterized in that tuning display is not prohibited during scanning.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1988036529U JPH0611647Y2 (en) | 1988-03-21 | 1988-03-21 | PLL frequency synthesizer tuner |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1988036529U JPH0611647Y2 (en) | 1988-03-21 | 1988-03-21 | PLL frequency synthesizer tuner |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH01142238U true JPH01142238U (en) | 1989-09-29 |
JPH0611647Y2 JPH0611647Y2 (en) | 1994-03-23 |
Family
ID=31263127
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1988036529U Expired - Lifetime JPH0611647Y2 (en) | 1988-03-21 | 1988-03-21 | PLL frequency synthesizer tuner |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0611647Y2 (en) |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5756973A (en) * | 1980-09-20 | 1982-04-05 | Mitsubishi Electric Corp | Manufacture of insulated gate type field effect transistor |
JPS5762437U (en) * | 1980-09-29 | 1982-04-13 | ||
JPS5780930A (en) * | 1980-11-04 | 1982-05-20 | Tachikawa Spring Co Ltd | Seat for vehicle or the like |
JPS5980016A (en) * | 1982-10-30 | 1984-05-09 | Pioneer Electronic Corp | Receiver of frequency synthesizer |
JPS60158345U (en) * | 1984-03-28 | 1985-10-22 | クラリオン株式会社 | Erroneous lighting prevention circuit |
-
1988
- 1988-03-21 JP JP1988036529U patent/JPH0611647Y2/en not_active Expired - Lifetime
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5756973A (en) * | 1980-09-20 | 1982-04-05 | Mitsubishi Electric Corp | Manufacture of insulated gate type field effect transistor |
JPS5762437U (en) * | 1980-09-29 | 1982-04-13 | ||
JPS5780930A (en) * | 1980-11-04 | 1982-05-20 | Tachikawa Spring Co Ltd | Seat for vehicle or the like |
JPS5980016A (en) * | 1982-10-30 | 1984-05-09 | Pioneer Electronic Corp | Receiver of frequency synthesizer |
JPS60158345U (en) * | 1984-03-28 | 1985-10-22 | クラリオン株式会社 | Erroneous lighting prevention circuit |
Also Published As
Publication number | Publication date |
---|---|
JPH0611647Y2 (en) | 1994-03-23 |
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