JPH01138717A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To contrive formation of an electrode lead-out part having excellent step coverage by a method wherein the transparent electrode provided on the rear side of a P-type semiconductor substrate is used as a cathode, and a metal is deposited in an aperture part by electrolytic plating while a light is being projected from the rear surface of the substrate. CONSTITUTION:An aperture part 25, surrounded by a PSG film 24, which is used to lead out an electrode is formed on the surface of a P-type Si substrate 21. A transparent electrode 27, consisting of ITO (In2O3/SnO2), for example, is provided on the rear surface of the substrate 21. The substrate 21 is dipped into an electrolyte of Au which is compatible to Si and the wiring metal of Al, and the transparent electrode 27 is brought into the negative potential. Then, the backward current of the P-N junction 23 is increased by projecting a light from the rear side of the substrate 21. As a result, Au plating which is compatible with both of Si and Al is grown on the substrate 21 located on the bottom face of the aperture part 25. A current flows freely on the part where an N<+> region is not present, and Au plating is grown irrespective of the irradiation of light. Subsequently, Al is deposited, and an Al wiring is formed by patterning.

Description

[Detailed description of the invention] 〔overview〕 Regarding a method for forming an electrode lead-out portion on a semiconductor substrate.

The purpose is to form an electrode extraction part with good stamp coverage.

The N+ type region (formed on the surface) and the N+ type region (formed on the insulating film formed on the P-type semiconductor substrate having the PN junction)
In a method of manufacturing a semiconductor device, in which a metal for taking out an electrode is deposited into an opening provided on the substrate, a transparent electrode is provided on the back surface of the P-type semiconductor substrate, and the transparent electrode is used as a cathode. The metal is deposited in the openings by electrolytic plating while irradiating light from the back side of the substrate.

[Industrial application field]

The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of forming an electrode lead-out portion on a semiconductor substrate.

Currently, AI or IN alloys are used as LSI wiring materials, and vacuum deposition and sputtering are used as methods for forming thin films.

As devices become more highly integrated and densely packed.

The shape of the step on the base for AI wiring is becoming stricter. That is, the aspect ratio (the ratio of the height of the step to the size of the opening) is increasing. For this reason, it has become difficult to form an AI film with good step coverage.

This tendency is more serious in devices having a multilayer wiring structure.

[Conventional technology]

FIG. 3 is a diagram showing a conventional example.

In FIG. 3, 31 is a P-type Si substrate, 32 is a P-type Si substrate, and 32 is a P-type Si substrate.
An N+ type region (33 is a P type S) formed on the surface of the substrate 31.
i-substrate 31 and N+ type region (PN junction formed by 32,
34 is formed on a P-type Si substrate 34, and SiJ, PSG
35 is an opening formed in the insulating film 34 for taking out the electrode.

36 is a wiring.

Conventionally, the AI wiring 36 is formed after AI is deposited from the top surface of the semiconductor substrate by vacuum evaporation or sputtering.

It was buttered and formed.

[Problem that the invention seeks to solve]

In the conventional method, as shown in FIG. 3, when the aspect ratio of the flowering portion 35 is large, the problem arises that the wiring 36 is broken, depressed, bulged, etc., resulting in poor step coverage.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device that enables formation of an electrode lead-out portion with good step coverage.

[Means for solving problems]

In the present invention, a semiconductor and wiring A
This was done based on the knowledge that if a metal that is easily compatible with both I is precipitated to fill the flowering part and then 81 is deposited on the surface of the first part, step coverage of the opening part will be improved.

However, when depositing a metal that is compatible with both semiconductors and At for wiring by electrolytic plating, the semiconductor substrate is of P type, and an opening for taking out an electrode is formed on the N type region provided on the surface of the semiconductor substrate. A problem arises when the formation of That is, during electrolytic plating, the substrate is always brought to a negative potential, so the PN junction formed between the P-type semiconductor substrate and the N-type region is reverse biased, and almost no current flows.

Therefore, almost no plating metal is deposited.

To solve this problem, applying light or energy to the semiconductor substrate increases the reverse current in the PN junction and causes plating growth.

When a semiconductor substrate is irradiated with light, it is necessary to irradiate the light from the back side of the semiconductor substrate because there is an insulating film, deposited metal, etc. on the surface of the semiconductor substrate.

In this case, if the electrode provided on the back surface of the semiconductor substrate is made of metal, light will be absorbed only in a portion of the semiconductor substrate rather than over the entire surface. To solve this.

In the present invention, the electrode provided on the back surface of the semiconductor substrate is a transparent electrode.

FIG. 1 is a diagram explaining the principle of the present invention.

In FIG. 1, 1 is a P-type semiconductor substrate, 2 is an N+ type region formed on the surface of a P-type substrate 1 (3 is a PN junction formed by the P-type semiconductor substrate 1 and an N+ type region (2). , 4
5 is an insulating film, 5 is an opening provided in the insulating film 4 for taking out an electrode, 6 is a deposited metal, and 7 is a transparent electrode.

[Effect]

As shown in FIG. 1, a P-type semiconductor substrate 1, which has a flowering part 5 for taking out electrodes surrounded by an insulating film 4 on one surface and a transparent electrode 7 on the back side, is used as a substrate for semiconductor and wiring metal. The P-type semiconductor substrate 1 is immersed in an electrolytic solution of a metal that is compatible with both, the transparent electrode 7 is set to a negative potential, and light is irradiated from the back side of the P-type semiconductor substrate 1.

The light irradiated from the back side of the P-type semiconductor substrate 1 is as follows.

Transparent +! i7 is absorbed by i3 into the P-type semiconductor substrate 1, reaches the PN junction 3 formed by the P-type semiconductor substrate 1 and the i<゛ type region 2, and the reverse current i of the PN junction 3
increase. As a result, the opening 5 for taking out the electrode
A metal 6, which is compatible with both semiconductors and wiring metals, is plated and grown on the P-type semicircular substrate 1 on the bottom surface of the substrate.

As shown on the left side of FIG. 1, in the part where the N'' region does not exist, there is no reverse biased PN junction, so the current i
flows freely and the plating grows regardless of light irradiation.

The plating growth of the metal 6, which is compatible with both the semiconductor and the wiring metal, is carried out to the upper end of the opening 5 for taking out the electrode. Thereafter, a metal for wiring is deposited on the surface of 9 and patterned to form metal wiring.

〔Example〕

FIG. 2 is a block diagram of one embodiment of the present invention.

In Figure 2, 21 is a P-type 511g with a resistivity of 10Ω.
The plate 22 is an N degree area formed on the P-type Sii plate 21,
23 is a PN junction formed between the P-type St substrate 21 and the N″ region 22, 24 is a PSG film with a thickness of 1 μm, 25 is an opening for taking out an electrode, 26 is a plated metal, and 27 is a transparent electrode. ITO (InzO3) with a thickness of 2000 people
/Snow>Membrane.

As shown in FIG. 2, an opening 25 for taking out an electrode surrounded by a PSG film 24 is formed on one surface.

P-type S with a transparent electrode 27 made of TTO on the back side
The i-substrate 21 is immersed in an electrolytic solution of a metal 9, for example, Au, which is compatible with both St and wiring metal A1, and the transparent electrode 27 made of ITO is set to a negative potential, and light is emitted from the back side of the P-type Si5 board 21. irradiate.

The light irradiated from the back side of the P-type St substrate 21 is transmitted through the transparent electrode 27 made of ITO and absorbed by the P-type Si substrate 21, and the PN junction formed by the P-type Si substrate 21 and the N+ type region (22) is absorbed by the P-type Si substrate 21. Reached 23.

The reverse current in the PN junction 23 is increased. This results in
'gA metal 261 such as Au, which is compatible with both Si and wiring metal, is grown by plating on the P-type St substrate 21 at the bottom of the opening 25 for taking out the L pole.

As shown on the left side of FIG. 2, in the part where the N'' region does not exist, there is no PN junction that is biased in the reverse direction, so current flows freely and the Au plating grows regardless of the light irradiation.

As an example, when plating was performed for 10 minutes at a current density of 2 mA/ca, approximately 1.2 μm of ^U grew in the open pores.

After the growth of Au plating is completed, A1 is deposited on one surface by vacuum evaporation or sputtering, and patterned to form a ^1 wiring.

In the above explanation, ITO (Inzo3) is used as the transparent electrode 27.
/SnO□), but other materials include Sn0g, InzO3, Ti01. CdO,Zn
O, CdzSn04, etc. are used.

In addition, although Au0 is shown as an example of plating metal, other materials include Pb, Sn, solder, N++Cu+Ag
+Cr+Zn+Rh+In+Pd, etc. are used.

〔Effect of the invention〕

According to the present invention, an electrode lead-out portion with good stamp coverage can be formed.

In addition, since plating is performed with a transparent electrode provided on the back of the semiconductor substrate, the light emitted from the back of the semiconductor substrate is not blocked, and sufficient plating is performed without being affected by the shape of the back electrode. be able to.

[Brief explanation of the drawing]

FIG. 1 is a diagram illustrating the principle of the present invention, FIG. 2 is a configuration diagram of one embodiment of the present invention, and FIG. 3 is a diagram showing a conventional example. In FIG. 1, ■ = P-type semiconductor substrate 2: N-type region: PN junction 4: Insulating film 5: Opening 6: Deposited metal 7: Transparent electrode Example configuration diagram Fig. 2

Claims (1)

[Claims] An N^+ type region (2) is formed on the surface, and a PN junction (3
) in the opening (5) provided above the N^+ type region (2) of the insulating film (4) formed on the P-type semiconductor substrate (1) having a A method for manufacturing a semiconductor device in which a transparent electrode (7) is provided on the back surface of the P-type semiconductor substrate (1), the transparent electrode (7) is used as a cathode, and a metal (6) is deposited on the P-type semiconductor substrate (1). 1) A method for manufacturing a semiconductor device, characterized in that metal (6) is deposited in the opening (5) by electrolytic plating while irradiating light from the back side of the semiconductor device.