JPH01137850A - Communication control equipment - Google Patents

Abstract

PURPOSE:To simultaneously communicate information having different speeds at high speed by making plural grouped communication lines correspond to one logic line. CONSTITUTION:A table corresponding each of plural line groups being the result of division of plural physical lines to a logic line is stored in a storage means at the initial setting. The unit data of a prescribed order constituting a series of consecutive data is sent to the physical line belonging to a line group at every scanning at the transmission and the unit data coming from the physical line belonging to a line group is subjected to edition processing rearranging the data into a prescribed order at the reception to restore a series of the consecutive data at the transmission. Thus, the duplexed communication information by the simultaneous communication for the sets of information having different speeds and simultaneous transfer of the same information is attained with terminal equipments.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to means for transferring data to a communication line.

〔overview〕

The present invention is a means for controlling the transmission and reception of data via a plurality of communication lines, and by associating a plurality of grouped communication lines with one logical line, it is possible to simultaneously communicate information at different speeds at high speed. It was made so that it could be done.

[Conventional technology]

In conventional communication lines, one communication path was connected by a single wire.

[Problem that the invention seeks to solve]

Since such conventional communication lines cannot transmit data serially, they have the disadvantage that they cannot simultaneously communicate information at different speeds with terminal devices at high speed.

The present invention aims to eliminate such drawbacks, and aims to provide a communication control device that can operate divided line groups at the same time.

[Means for solving problems]

The present invention provides a communication control device that is connected to a plurality of physical lines and is equipped with a transmitting/receiving means that transmits and receives one unit of data each time the physical line is scanned. table storage means for storing a table in which each piece of data corresponds to a logical line; a distribution means for distributing unit data constituting a series of continuous data to physical lines constituting a line loop based on the table; The present invention is characterized by comprising an editing means for editing a series of continuous data for each line group based on a table.

[Effect]

At the time of initial setting, a table in which each of a plurality of line groups obtained by dividing a plurality of physical lines is associated with a logical line is stored in the storage means.

At the time of transmission, unit data of a predetermined order constituting a series of continuous data is sent to the physical line belonging to the line group each time it is scanned.

At the time of reception, editing processing is performed to rearrange the unit data arriving from the physical lines belonging to the line group into a predetermined order, and the series of continuous data at the time of transmission is restored.

〔Example〕

Hereinafter, one embodiment of the present invention will be described based on the drawings. 1st
The figure is a block configuration diagram showing the configuration of this embodiment.

In this embodiment, as shown in FIG. 1, a line scan control circuit 2 is connected to a plurality of physical lines and is a transmitting/receiving means that transmits and receives one unit of data each time the physical line is scanned.
7. A line that is a table storage means for storing a table that associates the clock generation circuit 28, the reception circuits 29 to 31, the transmission circuits 32 to 34, and each of a plurality of line groups obtained by dividing the plurality of physical lines with logical lines. A control buffer 35, a distribution means for distributing unit data constituting a series of continuous data to physical lines constituting a line loop based on the above table, and editing the received unit data into a series of continuous data for each line group based on the above table. A line control circuit 26 and receiving buffers 36 to 38 are provided.

That is, as shown in FIG. 2, in this embodiment, a communication control device 1 and a terminal device 2 are connected by a double-wire communication cable 6 via line termination devices 4 and 5 and a digital exchange 3. There is. Here, as shown in FIG. 1, the communication control device 1 includes a processor 10, a memory 11, a data succession register 21 that temporarily stores data read from the memo January 1 and sent to the communication line, and a communication line. a data write register 22 that temporarily stores transfer data received from and written to the memory 11; and a reception circuit 2 that controls line reception.
9 to 31, transmitting circuits 32 to 34 that perform line transmission control, receiving buffers 36 to 38 provided in receiving circuits 29 to 31, and transmitting buffers 39 to 41 provided in transmitting circuits 32 to 34, A line control circuit 26 that controls the operation of multiple lines, and a line control circuit 2
a line control buffer 35 provided in the line control circuit 6; a command register 23 that temporarily stores commands from the processor 10 that instruct the line control circuit 26 to operate;
6 to the processor 10; a memory transfer control circuit 25 that controls memory read and write operations between the memory 11 and the line control circuit 26; and a communication line scan operation. , a clock generation circuit 28 common to each line, and an initial setting information line 42 that transfers initial setting information to the receiving circuits 29 to 31.

FIG. 3 is a correspondence table between logical lines and physical lines, and FIG. 4 is an explanatory diagram showing a data conversion procedure when two physical lines correspond to one logical line.

Before starting communication, when the processor 10 gives an initial setting instruction to the line control circuit 26 via the command register 23, the line control circuit 26 sends the memory transfer control circuit 25 the data in FIG. The memory address of the correspondence table between the logical line and physical line is given, and the memory transfer control circuit 25 reads the data in the memory 11 via the data read register 21 and transfers the correspondence table between the logical line and the physical line to the line control circuit 26. Read into buffer 35. One logical line corresponds to one or more plural physical lines, and a relative line number is assigned to each of the plural physical lines within one logical line. 1
Multiple physical lines within a logical line transfer data in parallel1
It is a communication channel. That is, when four physical lines are allocated to one logical line, four bits are transferred in parallel.

The line control circuit 26 transfers the initial setting information to the initial setting information line 42.
receiving circuits 29 to 3 corresponding to the physical line number via
1 and transmit circuits 32 to 34.

When receiving data from the terminal device 2 to the communication control device 1,
Physical line numbers “5” and “6” for logical line number “1”
” corresponds to the physical line “5”.
and "6" are assigned relative line numbers "0" and "1". The processor 10 provides a memory storage address and a data reception instruction to the line control circuit 26 via the command register 23, and the line scan control circuit 27 provides the receiving circuit 29.
to 31 are scanned at the clock interval of the clock generation circuit 28. Two bits are transferred in parallel to the relative lines "0" and "1", and each data bit is transferred to the receiving circuit 29.
The data are stored in the receive buffers 36 to 38 within the receiving buffers 36 to 31. Each time one bit is received, it is shifted in the reception buffer by the value of the relative line number given from the line control device 26,
The next received bit is ORed into this receive buffer. As shown in FIG. 4, in the case of 2-bit parallel transfer, each time 1 bit is received, 2 bits are shifted 3 times, and when the fourth bit is received, after shifting by the relative line number, the line control circuit 26 controls the line. The data is written to the buffer 35, and the data of a plurality of physical lines corresponding to the logical line are ORed on the line control buffer 35 to form one byte of data. When the line control circuit 26 gives an instruction to the memory transfer control circuit 25 to store data in the memory 11, the memory transfer control line 25 transfers the received data from the line control buffer 35 to the data write register 2.
2, the data is transferred from the data write register 22 to the memory 11, and the memory storage address is updated. At the end of reception, the line control circuit 26 sends a report to the register 2.
4 and notifies the processor 10 of the reception completion information.

When transmitting data from the communication control device 1 to the terminal device 2,
The processor 10 sends an instruction to transmit the data stored in the memory 11 to the line control circuit 26 via the command register 23.
give to The line control circuit 26 is the memory transfer control circuit 25
The memory address fetched from the command register 23 is given to the memory address register 23, and the memory transfer control circuit 25 writes the data in the memory 11 one byte at a time to the data successive register 21. The data held in the data succession register 21 is transferred to the line control buffer 35 of the line control circuit 26, and the data is transferred to the line control buffer 35 of the line control circuit 26.
6 distributes the data bits to the transmission buffers 39 to 41 of the transmission circuits 32 to 34 to the physical line belonging to the logical line instructed by the processor 10 based on the initial setting information, and transmits the data with the common lock of the clock generation circuit 28. Send to terminal device 2. At the end of transmission, the line control circuit 26
Transmission completion information is written into the report register 24 and notified to the processor 10.

〔Effect of the invention〕

As explained above, the present invention divides a plurality of communication lines into a plurality of line groups and operates the plurality of line groups simultaneously. This has the effect of duplicating communication information by simultaneously transferring information.

[Brief explanation of the drawing]

FIG. 1 is a block configuration diagram showing the configuration of an embodiment of the present invention. FIG. 2 is a block configuration diagram showing the configuration of a system to which the embodiment is applied. FIG. 3 is a relationship diagram showing the correspondence between logical lines and physical lines. FIG. 4 is an explanatory diagram showing the data conversion process in the case of 2-bit parallel reception. DESCRIPTION OF SYMBOLS 1... Communication control device, 2... Terminal device, 3... Digital exchange, 4.5... Line termination device, 6...
Communication cable nope 10...Processor, 11...Memory, 21...Data read register, 22...Data write register, 23...Command register, 24...
・Report register, 25...Memory transfer control circuit, 26
... Line control circuit, 27... Line scan control circuit, 28... Clock generation circuit, 29-31... Receiving circuit, 32-34... Transmitting circuit, 35... Line control buffer, 36-38...Reception buffer, 39-41
. . . Transmission buffer, 42 . . . Initial setting information line.

Claims (1)

[Claims] (1) In a communication control device connected to a plurality of physical lines and equipped with a transmitting/receiving means for transmitting and receiving one unit of data each time the physical line is scanned, each of a plurality of line groups obtained by dividing the plurality of physical lines table storage means for storing a table for associating data with logical lines; distribution means for distributing unit data constituting a series of continuous data to physical lines constituting a line loop based on the table; and storing the received unit data in the table 1. A communication control device comprising: editing means for editing a series of continuous data for each line group based on the above.