JPH0113772B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a timer circuit that can set the recording time of a recording device such as a video tape recorder, and provides a timer circuit that can provide stable operation using a general-purpose timer integrated circuit. The purpose is to

Recently, the number of home appliances with timer functions has been increasing, and various timer circuits using very inexpensive and small general-purpose timer integrated circuits (hereinafter referred to as timer ICs) have been proposed.

As an example of the general-purpose timer IC mentioned above, the first
There is something like the one shown in the figure. This is a pin,
It has an internal oscillation circuit 1 whose time can be freely set using an external capacitor C and a resistor R, and a counter 2 which internally divides the frequency and inverts when a certain time elapses. This is a timer IC in which the counter D counts by keeping the value at a constant level, and when the set time elapses, its output circuit 3 is activated and an output of a certain level is obtained from the pin.
Here, the pin is a control terminal, and when this terminal is at a certain level (usually HIGH level), the oscillation circuit C oscillates, and when it is at another level (Low level), the oscillation circuit C stops oscillating. Further, 4 is a stabilized power supply circuit.

A general-purpose timer IC with the above functions is
For example, it is used in television receivers.
In the case of television receivers, remote control operation and soft-touch switches are used, so a flip-flop (hereinafter referred to as FF) as shown in FIG. 2 is used to maintain the pin level. However, in the case of FF, it is extremely difficult to design which transistor will turn on when the power is turned on, depending on the balance between transistors 6 and 7. In the illustrated case, a circuit including a capacitor 8, a resistor 9, and a diode 10 is provided in the base circuit of one transistor 7, so that one mode is forcibly set at the rise of the +B voltage at the power supply terminal. However, there are still concerns about malfunctions caused by noise. Here, terminal I is a timer setting pulse input terminal.

In view of the above points, the present invention provides a timer for the purpose of ending recording after a certain period of time when recording with a recording device, such as when leaving home for urgent business.
A thyristor is used in place of the conventional FF used to maintain the level of the IC pin, and the voltage generated only during recording is used as the power source for the thyristor and timer IC to obtain the desired timer operation. be.

An embodiment of the present invention will be described below with reference to FIGS. 3 and 4. In FIG. 3, T is the timer IC of FIG. 1, 11 is a voltage generator that generates voltage during recording, that is, when the recording start button is pressed, and 12
is a light emitting diode that lights up to indicate when the timer operation is being performed, and 13 is a resistor 1.
4. The light emitting diode 12 and the base resistor 1
A switching transistor whose base is connected to the output terminal of the voltage generating section 11 via 5 in turn,
The collectors are connected to the pins of each timer ICT and to the stabilized power supply terminal of the timer ICT via a load resistor 16. 17 is a thyristor,
The anode-cathode is connected between the connection point between the light emitting diode 12 and the resistor 15 and the ground,
The gate is connected to the output terminal of the voltage generating section 11 via a holding circuit comprising a capacitor 18 and a resistor 19, a recording end reservation switch 20, and a resistor 21. Further, 22 is an inverting transistor whose base is connected to the pin of the timer ICT via a capacitor 23. 24 is a control unit consisting of a microcomputer, which controls the transistor 22.
When a positive pulse is supplied from the collector, the recording device is stopped. That is, when receiving the positive pulse, the voltage generating section 11 is controlled so that no voltage is generated from its output terminal. Also, 25, 26
and 27 are a capacitor and a variable resistor for setting the oscillation frequency of the oscillation circuit in the timer IC. Further, 28 is a protection diode.

Next, specific circuit operation will be explained using FIG. 4.

First, when recording starts _t0 , a voltage is generated from the voltage generating section 11 of the recording apparatus. As a result, when recording continues from t ₀ to t ₁ , the thyristor 17 is off, so the base of the transistor 13 is HIGH.
level, the transistor 13 is turned on, its collector becomes Low level, and the pin of the timer IC maintains Low level. In this case, the light emitting diode 12, which is a recording end reservation indicator lamp,
Since the thyristor 17 is in the cut-off state, the amount of current flowing through the transistor 24 is only the base current of the transistor 24.
does not light up. Next, at time _t1 , when the soft-touch type recording end reservation switch 20 is closed, the gate potential of the thyristor 17 momentarily becomes HIGH level, the thyristor 17 is turned on, and the transistor 13 is turned on.
The base of becomes low level, and transistor 1
3 is off, its collector goes high, and the pin goes high. At time _t2 , the level of the pin is maintained at HIGH level because the thyristor continues to be turned ON even when the gate potential of thyristor 17 becomes Low level. Also, since thyristor 17 continues to be ON, light emitting diode 1
2 continues lighting. On the other hand, the pin level is
Since the HIGH level is maintained, the oscillation circuit within the timer IC continues to oscillate at a frequency determined by the time constant of the external resistor 27 and capacitor 26 connected to the pin. This frequency is also divided by an internal counter. In this case, the pin remains HIGH.

When the frequency division is finished, that is, the recording end time
When time t ₃ is reached, the level of the pin is reversed and becomes a low level, so that the collector of the transistor 22 generates a positive pulse at time t ₃ and sends it to the control unit 24 of the recording device. With this positive pulse, the control unit 24 stops the recording device and the voltage generation unit 1
1, no voltage is generated, and at time _t4 , the output becomes Low level. At this point, the light emitting diode 12 turns off, indicating the end of recording. Further, since the output of the voltage generating section 11 becomes a low level, the thyristor 17 is turned off, and the level of the pin becomes a low level. Further, as the pin level is reversed, the pin level also becomes Low level, and the oscillation circuit stops its oscillation operation.

As described above, according to the present invention, by using a thyristor, there is no need to worry about malfunctions as in the case of FF, and the circuit becomes simple and inexpensive.
Additionally, since the thyristor and timer IC are powered using voltage that is only generated during recording, it is also effective in terms of power consumption.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing the configuration of a general-purpose timer IC, Fig. 2 is a circuit diagram of a conventional timer circuit, Fig. 3 is a circuit diagram of a timer circuit in an embodiment of the present invention, and Fig. 4 is a circuit diagram of a timer circuit in an embodiment of the present invention. FIG. 4 is a waveform diagram for explaining the operation of FIG. 3; 11... Voltage generating section, 12... Light emitting diode, 13, 22... Transistor, 17... Thyristor, 20... Recording end reservation switch, 24...
...Control unit, T...Timer IC.

Claims (1)

[Claims] 1 When the first terminal reaches the first level, the timer starts operating, and when the first terminal reaches a second level different from the first level, the timer starts operating, and when the first time the set time elapses, the timer starts operating. The gate is connected via a time setting circuit having a second terminal whose level is inverted from the previous level, a voltage generator that generates voltage in the recording state, and a recording end reservation switch that is normally open and closed when recording end is scheduled. A timer circuit comprising: a thyristor connected to the voltage generator; and means for detecting on-off of the thyristor to control the level of the first terminal of the time setting circuit.