JPH01137581U - - Google Patents

Info

Publication number
JPH01137581U
JPH01137581U JP3282788U JP3282788U JPH01137581U JP H01137581 U JPH01137581 U JP H01137581U JP 3282788 U JP3282788 U JP 3282788U JP 3282788 U JP3282788 U JP 3282788U JP H01137581 U JPH01137581 U JP H01137581U
Authority
JP
Japan
Prior art keywords
memory
input
substrate
utility
scope
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3282788U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3282788U priority Critical patent/JPH01137581U/ja
Publication of JPH01137581U publication Critical patent/JPH01137581U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Mounting Of Printed Circuit Boards And The Like (AREA)
  • Semiconductor Memories (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案の実施例を示す正面図、第２図
は本考案の作用を示す説明図、第３図は従来例を
示す説明図である。 第１図および第２図において、１は基板、２は
入出力ピン、Ｂはメモリブロツク、Ｍはメモリア
レイカードである。 FIG. 1 is a front view showing an embodiment of the present invention, FIG. 2 is an explanatory view showing the operation of the present invention, and FIG. 3 is an explanatory view showing a conventional example. In FIGS. 1 and 2, 1 is a board, 2 is an input/output pin, B is a memory block, and M is a memory array card.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 複数のメモリブロツクＢを基板１上に形成して
なり、前記各メモリブロツクＢに対応する入出力
ピン２を各々左右対称に配置したことを特徴とす
るメモリアレイカード。 A memory array card characterized in that a plurality of memory blocks B are formed on a substrate 1, and input/output pins 2 corresponding to each memory block B are arranged symmetrically.
JP3282788U 1988-03-11 1988-03-11 Pending JPH01137581U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3282788U JPH01137581U (en) 1988-03-11 1988-03-11

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3282788U JPH01137581U (en) 1988-03-11 1988-03-11

Publications (1)

Publication Number Publication Date
JPH01137581U true JPH01137581U (en) 1989-09-20

Family

ID=31259417

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3282788U Pending JPH01137581U (en) 1988-03-11 1988-03-11

Country Status (1)

Country Link
JP (1) JPH01137581U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01258466A (en) * 1988-04-08 1989-10-16 Toshiba Corp Memory module
JP2014120612A (en) * 2012-12-17 2014-06-30 Toshiba Corp Semiconductor device, and semiconductor module using the same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5754354A (en) * 1980-09-18 1982-03-31 Matsushita Electronics Corp Semiconductor integrated circuit device
JPS6334969A (en) * 1986-07-29 1988-02-15 Nec Corp Semiconductor storage device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5754354A (en) * 1980-09-18 1982-03-31 Matsushita Electronics Corp Semiconductor integrated circuit device
JPS6334969A (en) * 1986-07-29 1988-02-15 Nec Corp Semiconductor storage device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01258466A (en) * 1988-04-08 1989-10-16 Toshiba Corp Memory module
JP2014120612A (en) * 2012-12-17 2014-06-30 Toshiba Corp Semiconductor device, and semiconductor module using the same

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