JPH01258466A - Memory module - Google Patents

Abstract

PURPOSE:To prevent a memory module from a collision involving a power source line and from an adverse effect of same even when the memory module is inserted in the reverse direction by a method wherein a power input terminal and a ground terminal are positioned symmetrically at both ends of the terminal arrangement. CONSTITUTION:A memory module 100 consists of D-RAM chips 201-109 installed on both surfaces of a printed circuit board 101. Terminals 1-35 are arranged on the memory module 100. A ground terminal is connected to a terminal 1 and terminal 35, and a power input terminal is connected to a terminal 2 and terminal 34. Data input terminals and data output terminals are connected to memory module terminals so that terminals involving the same bit will be adjacent to each other. There is no collision involving a power source line in a socket of this terminal arrangement even when the memory module 100 is installed in the reverse direction.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Application) The present invention relates to a memory module used in electronic equipment.

(Prior Art) In recent years, with the improvement of semiconductor memory manufacturing technology and the resulting reduction in cost per bit, the memory capacity used in electronic devices has continued to increase. Under these circumstances, memory modules in which several D-RAM chips are mounted on a printed circuit board have been commercialized. Such a memory module has a card edge connector and is attached to the main body of the device using a dedicated socket. By the way, there are currently no uniform regulations regarding the terminal arrangement of this type of module. Therefore, it is possible to independently set a terminal arrangement that is easier to use.

However, in the conventional memory module, the power supply input terminal and the ground terminal are not arranged at symmetrical positions fK with respect to the terminal arrangement, and there is only one set.

(Problem to be Solved by the Invention) In this way, in the memory module of the above-mentioned company, the power input terminal and the ground terminal were not arranged in symmetrical positions with respect to the terminal arrangement, and there was only one set, so it was possible to accidentally insert the memory module into the socket. If the power supply line is inserted in the opposite direction, there is a problem that a collision may occur in the power supply line, and that it may have an adverse effect on other parts through the power supply line.

SUMMARY OF THE INVENTION An object of the present invention is to eliminate this problem and provide a memory module that does not cause collisions or adverse effects due to power line congestion even when the memory module is inserted in the opposite direction.

[Structure of the invention]

(Means for Solving the Problems) The present invention is characterized in that, in a memory module mounted with a plurality of memory chips, a power input terminal and a ground terminal are arranged at symmetrical positions at both ends of a terminal array.

(Function) In the present invention, even if the memory module is inserted in the opposite direction, the power input terminal and the ground terminal are arranged at symmetrical positions on both shoulders of the terminal arrangement, so there is no possibility of collision caused by the power line or damage to other parts. No adverse effects will occur.

(Example) Hereinafter, an example of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is an outline diagram showing an embodiment of a memory module of the present invention.

In this figure, a memory module 100 has a total of nine D-RAM chips 201 to 209 having the same function, which are mounted on a printed circuit board 10 as shown in FIGS. 1(a) and 1(b).
Equipped with 1 double-sided bus. In addition, this memory module 100 has terminals 1 to 35, each of which has sequential terminal numbers, with the terminal indicated by arrow X in FIG. 1(a) being terminal 1 and the terminal indicated by arrow Y being terminal 35. are arranged.

FIG. 2 shows a circuit diagram of the memory module 1000 of this embodiment. In this figure, the symbol vCC is a power input terminal, the symbol GND is a ground terminal, the symbol RAS is a row address strobe terminal, and the symbol CAS is a column address. Strobe terminal, r number WRITE is write terminal, symbol A0~
A0 is address terminal, symbol Dout 0-Dout13
represents a data output terminal, and symbols DinO to D in 8 represent data input terminals. 9 D-RAM chips 2
01 to 209 have their address terminals A 1 = A @ connected in common, and each D-RAM chip 201 to 2
09 are connected to a row address strobe terminal RAS, a row address strobe terminal CAS, and a write terminal WRITE, respectively. Nine chip capacitors 300 are connected in parallel between the power supply input terminal VCc and the ground terminal GNDO.

FIG. 3 is a table showing each terminal shown in FIG. 2 in relation to the terminal numbers shown in FIG. 1. In Figure 3, the ground terminals GND are terminal numbers 1 and 35.
The power input terminal CC is connected to terminals 2 and 34 corresponding to terminal numbers 2 and 34, respectively. That is, the power input terminal vCC and the ground terminal are connected to terminals at symmetrical positions at both ends of the terminal array in the memory module. Also, the data input terminal DinQ~])ing and the data output terminal Dout
O to p out 8 are connected to each terminal such that terminals related to the same bit are adjacent to each other. For example, the data output terminal 1) out 2 and the data input terminal Din2 are connected to the adjacent terminal 17 by 181C, and the data output terminal D out 7 and the data input terminal Din7 are connected to the adjacent terminals 27 and 28.

With such a terminal arrangement, even if the memory module 100 is installed in the opposite direction to a socket (not shown), no collision will occur due to the power supply lines. In addition, data input terminals 1) inQ to Din8 and data output terminals Dout
Since O to D out B are connected to mutually adjacent terminals for the same bit, it is easy to arrange the quins for inputting data.

〔Effect of the invention〕

As explained above, according to the present invention, the power input terminal and the ground terminal are arranged at symmetrical positions at both ends of the holder arrangement, so even if the memory module is installed in the wrong direction, there will be no collision or adverse effects caused by the power line. It has the advantage that it does not occur. Further, by arranging the data input terminal and data output terminal related to the same bit as adjacent terminals, the arrangement of the data output lines is facilitated.

[Brief explanation of the drawing]

FIG. 1 is an outline drawing showing an embodiment of the memory module of the present invention, FIG. 2 is a circuit diagram of the memory module of the present embodiment,
FIG. 3 is a table showing the terminal arrangement of the memory module of the same embodiment. 100...D-RAM module, 101...Printed circuit board, 201-209...D-RAM chip, 3
00...Chip capacitor. Representative Patent Attorney Nori Ken Chika Yudo Yamashita -mu ψ (a) Figure 1

Claims (2)

[Claims] (1) A memory module equipped with a plurality of memory chips, characterized in that a power input terminal and a ground terminal are arranged at symmetrical positions at both ends of a terminal arrangement. (2) In a memory module equipped with multiple memory chips, power input terminals and ground terminals are arranged at symmetrical positions at both ends of the terminal arrangement, and data input terminals and data output terminals related to the same bit are arranged adjacently. A memory module featuring: