JPH01133748U - - Google Patents

Info

Publication number
JPH01133748U
JPH01133748U JP2960188U JP2960188U JPH01133748U JP H01133748 U JPH01133748 U JP H01133748U JP 2960188 U JP2960188 U JP 2960188U JP 2960188 U JP2960188 U JP 2960188U JP H01133748 U JPH01133748 U JP H01133748U
Authority
JP
Japan
Prior art keywords
die pad
external lead
semiconductor device
terminals
arranged around
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2960188U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP2960188U priority Critical patent/JPH01133748U/ja
Publication of JPH01133748U publication Critical patent/JPH01133748U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例の要部の斜視図、第
2図は一実施例の等価回路、第3図は別の実施例
の等価回路である。 なお図面に用いた符号において、11……ダイ
パツド、12……半導体チツプ、13a〜13c
……外部リード端子、15……抵抗素子、16…
…容量素子、である。
FIG. 1 is a perspective view of essential parts of one embodiment of the present invention, FIG. 2 is an equivalent circuit of one embodiment, and FIG. 3 is an equivalent circuit of another embodiment. In addition, in the symbols used in the drawings, 11...Die pad, 12...Semiconductor chip, 13a to 13c
...External lead terminal, 15...Resistance element, 16...
...A capacitive element.

Claims (1)

【実用新案登録請求の範囲】 ダイパツド上に半導体チツプが載置されており
前記ダイパツドの周囲に外部リード端子が配され
ている半導体装置において、 前記ダイパツドと前記外部リード端子との間ま
たは前記外部リード端子同士の間に受動素子を有
していることを特徴とする半導体装置。
[Claims for Utility Model Registration] In a semiconductor device in which a semiconductor chip is placed on a die pad and external lead terminals are arranged around the die pad, the semiconductor device includes a semiconductor chip placed on a die pad and external lead terminals arranged around the die pad, or between the die pad and the external lead terminal or the external lead. A semiconductor device characterized by having a passive element between terminals.
JP2960188U 1988-03-05 1988-03-05 Pending JPH01133748U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2960188U JPH01133748U (en) 1988-03-05 1988-03-05

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2960188U JPH01133748U (en) 1988-03-05 1988-03-05

Publications (1)

Publication Number Publication Date
JPH01133748U true JPH01133748U (en) 1989-09-12

Family

ID=31253956

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2960188U Pending JPH01133748U (en) 1988-03-05 1988-03-05

Country Status (1)

Country Link
JP (1) JPH01133748U (en)

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