JPH01133337A - Resin sealed type semiconductor device - Google Patents
Resin sealed type semiconductor deviceInfo
- Publication number
- JPH01133337A JPH01133337A JP62292704A JP29270487A JPH01133337A JP H01133337 A JPH01133337 A JP H01133337A JP 62292704 A JP62292704 A JP 62292704A JP 29270487 A JP29270487 A JP 29270487A JP H01133337 A JPH01133337 A JP H01133337A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- coefficient
- soldering
- resin
- thermal expansion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 70
- 239000011347 resin Substances 0.000 title claims description 12
- 229920005989 resin Polymers 0.000 title claims description 12
- 239000011368 organic material Substances 0.000 claims abstract description 12
- 238000000034 method Methods 0.000 claims description 4
- 238000005476 soldering Methods 0.000 abstract description 17
- 239000011521 glass Substances 0.000 abstract description 5
- 238000003466 welding Methods 0.000 abstract 1
- 239000000463 material Substances 0.000 description 11
- 238000007789 sealing Methods 0.000 description 9
- 238000004519 manufacturing process Methods 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 4
- 230000001681 protective effect Effects 0.000 description 4
- 239000002184 metal Substances 0.000 description 3
- 230000002457 bidirectional effect Effects 0.000 description 2
- 239000000470 constituent Substances 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000002966 varnish Substances 0.000 description 2
- FFBHFFJDDLITSX-UHFFFAOYSA-N benzyl N-[2-hydroxy-4-(3-oxomorpholin-4-yl)phenyl]carbamate Chemical compound OC1=C(NC(=O)OCC2=CC=CC=C2)C=CC(=C1)N1CCOCC1=O FFBHFFJDDLITSX-UHFFFAOYSA-N 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83909—Post-treatment of the layer connector or bonding area
- H01L2224/83951—Forming additional members, e.g. for reinforcing, fillet sealant
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/10155—Shape being other than a cuboid
- H01L2924/10157—Shape being other than a cuboid at the active surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/10155—Shape being other than a cuboid
- H01L2924/10158—Shape being other than a cuboid at the passive surface
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、樹脂封止型半導体装置に関し、さらに詳し
くは、半導体チップをリードフレームのダイパッド部上
に半田付けなどで接合して搭載させると共に、この半導
体チップ部分を樹脂封止させる装置構成において、高温
雰囲気下での各構成材料、殊にグイパッド部Ｅでの半導
体チップの接合部周囲に対応して、同部分に形成される
狭められた隙間部分への封止樹脂材の充填によって生ず
るところの１両者の熱膨張率の差によるグイパッド部か
らの半導体チップの剥離を防止し得るように改良した樹
脂封止型半導体装置に係るものである。[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a resin-sealed semiconductor device, and more specifically, to a resin-encapsulated semiconductor device, in which a semiconductor chip is bonded and mounted on a die pad portion of a lead frame by soldering, etc. In the device configuration for sealing the semiconductor chip portion with resin, each constituent material under a high temperature atmosphere, especially the narrowed portion formed in the same portion, corresponds to the area around the joint portion of the semiconductor chip at the Gui pad portion E. This invention relates to a resin-sealed semiconductor device that has been improved to prevent the semiconductor chip from peeling off from the Gui pad portion due to the difference in thermal expansion coefficient between the two, which is caused by filling the gap with the sealing resin material. .
従来例によるこの種の樹脂封止型半導体装置の製造過程
１組立て過程とその概要構成とを第２図ないし第５図に
示しである。すなわち、第２図は一般的なウェハの態様
を示す説明斜視図、第３図（ａ）ないしくｃ）は従来例
による半導体装置の製造過程を順次に示すそれぞれに断
面図、第４図（ａ）ないしくｃ）は同上装置の組立て過
程を順次に示すそれぞれに斜視図、第５図は同上装置の
概要構成を示す断面図である。The manufacturing process 1 of the conventional manufacturing process of this type of resin-sealed semiconductor device and its general configuration are shown in FIGS. 2 to 5. That is, FIG. 2 is an explanatory perspective view showing the mode of a general wafer, FIGS. 3(a) to 3(c) are sectional views sequentially showing the manufacturing process of a conventional semiconductor device, and FIG. Figures a) to c) are respectively perspective views showing the assembly process of the above device in sequence, and Fig. 5 is a sectional view showing the general configuration of the above device.
すなわち、これらの第２図ないし第５図に示す従来例装
置の構成おいて、符号１は半導体基板９上にあって、よ
く知られている通り、拡散技術。That is, in the configuration of the conventional device shown in FIGS. 2 to 5, reference numeral 1 is on the semiconductor substrate 9, and as is well known, diffusion technology is used.
蒸着技術、およびエツチング技術などを利用してマトリ
クス状に配置形成された半導体チップ、こ−では、双方
向サイリスタからなる両面メサ型の半導体チップである
。These semiconductor chips are arranged and formed in a matrix using vapor deposition technology, etching technology, etc., and in this case are double-sided mesa-type semiconductor chips consisting of bidirectional thyristors.
しかして、前記両面メサ型半導体チップ１の製造過程は
、まず、ｆ５３図（ａ）に見られるように、半導体基板
としての第１の領域１０ａ上にあって、第２の領域１０
ｂ、および第３の領域１０ｃをそれぞれに拡散形成する
と共に、境界部分での露出部を保護するための、いわゆ
るメサ溝１４を上下から掘り込み、これらの各メサ溝１
４を保護ガラス層１１によりそれぞれに保護させ、かつ
また、両表面部側にあって、第２の領域１０ｂ、および
第３の領域１０ｃに対応する位置に、第゛１の電極１２
ａ、第２の電極１２ｂ。Therefore, in the manufacturing process of the double-sided mesa semiconductor chip 1, first, as shown in FIG.
b, and the third region 10c are respectively formed by diffusion, and so-called mesa grooves 14 are dug from above and below to protect the exposed portions at the boundaries.
4 are each protected by a protective glass layer 11, and a first electrode 12 is provided on both surface sides at positions corresponding to the second region 10b and the third region 10c.
a, second electrode 12b;
および第３の電極１２ｃを形成して構成するのであり、
続いて、その後、第３図（ｂ）に示すように、一方の保
護ガラス層１１に切り込み１３を施し、かつ第３図（Ｃ
）に示すように、この切り込み１３部分からウェハ９を
割り取り、半導体チップ１を個々に分割して用いるので
ある。and the third electrode 12c is formed.
Subsequently, as shown in FIG. 3(b), a cut 13 is made in one of the protective glass layers 11, and a cut 13 is made in FIG. 3(C).
), the wafer 9 is cut out from the notch 13, and the semiconductor chips 1 are individually divided for use.
また、前記のようにして得た両面メサ型半導体チップ１
の組立て過程は、まず、第４図（ａ）に示すように、リ
ードフレーム２を用い、このリードフレーム２のグイパ
ッド部３上にあって、半導体チップ１の第１の電極１２
ａ側を半田付け４により溶着して固定接合させ、ついで
、第４図（ｂ）に示すように、リードフレーム２の各リ
ード５．５ と、半導体チップ１の第２．第３の各電極
１２ｂ、 １２ｃとの間を、それぞれに金属ワイヤ６．
６で接続して配線させ、さらに、第４図（Ｃ）に示すよ
うに、この半導体チップ１の全周囲部分を封止樹脂材７
により封止させて、所期の樹脂封止型半導体装ＨＡを完
成させるのであり、このようにして完成された樹脂封止
型半導体装置Ａの概要断面は、第５図に示す通りである
。In addition, double-sided mesa semiconductor chip 1 obtained as described above
In the assembly process, first, as shown in FIG. 4(a), a lead frame 2 is used.
A side is welded and fixedly joined by soldering 4, and then, as shown in FIG. 4(b), each lead 5.5 of the lead frame 2 and the second. A metal wire 6. is connected between each of the third electrodes 12b and 12c.
6 to connect and wire the semiconductor chip 1, and further, as shown in FIG.
The desired resin-sealed semiconductor device HA is completed by encapsulating the resin-sealed semiconductor device A. A schematic cross-section of the resin-sealed semiconductor device A thus completed is shown in FIG.
しかしながら、前記のようにして得た従来例での樹脂封
止型半導体装置においては、これが非常に高温（例えば
、２６０〜２８０℃程度）の環境雰囲気下におかれる場
合があり、このような高温環境では、グイパッド部３上
での接合部周囲に対応する半導体チップ１のメサ溝１４
．保護ガラス層１１によって狭められた封止樹脂材７の
隙間部分７ａにおける熱膨張率が、半田付け４部分での
熱膨張率よりも大きいため、その熱膨張率の差により、
グイパッド部３上から半導体チップ１を離間させる力が
作用することになり、これによって半導体チップ１が半
田付け４部分から剥離する惧れを生じ、これがこの種の
樹脂封止型半導体装置の故障原因になり易いと云う欠点
がある。However, the conventional resin-sealed semiconductor device obtained as described above may be exposed to an extremely high temperature environment (e.g., about 260 to 280°C); In the environment, the mesa groove 14 of the semiconductor chip 1 corresponding to the periphery of the joint on the Gui pad portion 3
．． Since the coefficient of thermal expansion in the gap portion 7a of the sealing resin material 7 narrowed by the protective glass layer 11 is larger than the coefficient of thermal expansion in the soldering portion 4, the difference in the coefficient of thermal expansion causes
A force will be applied to separate the semiconductor chip 1 from above the pad portion 3, which may cause the semiconductor chip 1 to peel off from the soldered portion 4, which is the cause of failure of this type of resin-sealed semiconductor device. The disadvantage is that it is easy to become
なお、−船釣に考えて、この種の樹脂封止型半導体装置
の場合、このような高温環境は、通常の場合、存在し得
ないのであるが、例えば、この樹脂封止型半導体装置を
対象機器などに実装させる際での半田付は作業時などに
あって、この樹脂封止型半導体装置が、たとえ短時間で
はあっても、実際上、まれにおかれる環境温度でもあり
得るのである。In addition, when thinking about fishing on a boat, such a high temperature environment cannot normally exist for this type of resin-sealed semiconductor device, but for example, if this resin-sealed semiconductor device is Soldering is done during work when mounting on target equipment, and this resin-sealed semiconductor device can actually be exposed to environmental temperatures that are rare, even if only for a short time. .
この発明は、従来のこのような問題点を解消するだめに
なされたもので、その目的とするところは、高温の環境
雰囲気下、具体的には、 ２８０℃を越える高温環境に
おかれても、装置内容に不具合を生ずる慣れがなくて信
頼性の高い、この種の樹脂封止型半導体装置を提供する
ことである。This invention was made in order to solve these conventional problems, and its purpose is to provide a high-temperature device that can be used in a high-temperature environment, specifically, even in a high-temperature environment exceeding 280°C. Another object of the present invention is to provide a resin-sealed semiconductor device of this type that is highly reliable and free from problems that occur in the device.
前記目的を達成するために、この発明に係る樹脂封止型
半導体装置は、グイパッド部上での半導体チップの接合
部周囲に対応する狭められた隙間部分への、封止樹脂材
の充填を避け、同狭められた隙間部分に、半田付は部分
での熱膨張率よりも十分に小さい熱膨張率を有して、か
つ耐熱性、および弾力性のある有機材料を埋め込むこと
で、狭められた隙間部分に生ずる熱膨張率の差を吸収し
得るようにしたものである。In order to achieve the above object, the resin-sealed semiconductor device according to the present invention avoids filling the narrowed gap portion corresponding to the joint portion of the semiconductor chip on the Gui pad portion with the sealing resin material. , the narrowed gap is filled with an organic material that has a coefficient of thermal expansion that is sufficiently smaller than the coefficient of thermal expansion of the soldering part, and is heat resistant and elastic. It is designed to absorb the difference in coefficient of thermal expansion that occurs in the gap.
すなわち、この発明に係る樹脂封止型半導体装置は、半
導体チップをリードフレームのグイパッド部上に半田付
けなどで接合して搭載させると共に、この半導体チップ
部分を樹脂封止させる装置構成において、前記グイパッ
ド部上での半導体チツブの接合部周囲に対応して、同部
分に形成される狭められた隙間部分に対し、前記半田付
は部分での熱膨張率よりも十分に小さい熱膨張率を有し
て、かつ耐熱性、および弾力性のある有機材料を埋め込
んで構成したことを特徴としている。That is, the resin-sealed semiconductor device according to the present invention has a device configuration in which a semiconductor chip is mounted on a lead frame by soldering or the like, and the semiconductor chip part is sealed with resin. The soldering has a coefficient of thermal expansion that is sufficiently smaller than a coefficient of thermal expansion at the part with respect to a narrow gap formed in the part corresponding to the periphery of the joint of the semiconductor chip on the part. It is characterized by being constructed by embedding a heat-resistant and elastic organic material.
従って、この発明においては、樹脂封止型半導体装置が
高温の環境雰囲気下におかれた場合にあっても、グイパ
ッド部上での半導体チップの接合部周囲に対応して、同
部分に形成される狭められた隙間部分に対し、半田付は
部分での熱膨張率よりも十分に小さい熱膨張率で、耐熱
性、および弾力性のある有機材料を埋め込んであるため
に、同隙間部分での熱膨張率の差を十分に吸収し得て、
半導体チップが半田付は部分から剥離する惧れを解消で
きるのである。Therefore, in the present invention, even if the resin-sealed semiconductor device is placed in a high-temperature environment, the resin-sealed semiconductor device is formed in the same area around the bonding area of the semiconductor chip on the guide pad area. In contrast to narrowed gap areas, soldering is filled with a heat-resistant and elastic organic material that has a coefficient of thermal expansion that is sufficiently lower than the coefficient of thermal expansion in the gap area. It can sufficiently absorb the difference in thermal expansion coefficient,
This eliminates the risk of the semiconductor chip peeling off from the soldered part.
以下、この発明に係る樹脂封止型半導体装置の一実施例
につき、第１図を参照して詳細に説明する。Hereinafter, one embodiment of a resin-sealed semiconductor device according to the present invention will be described in detail with reference to FIG.
第１図はこの実施例を適用した樹脂封止型半導体装置の
概要構成を示す断面図であり、この第１図実施例構成に
おいて、前記第２図ないし第５図従来例と同一符号は同
一または相当部分を表わしている。FIG. 1 is a cross-sectional view showing the general structure of a resin-sealed semiconductor device to which this embodiment is applied. In the structure of the embodiment shown in FIG. or represents a significant portion.
すなわち、この第１図実施例構成においては、前記した
従来例構成の場合と同様に、リードフレーム２を用い、
このリードフレーム２のグイパッド部３上にあって、半
導体チップｌの第１の電極１２ａ側（図示省略）を半田
付け４により溶着して固定接合させ、かつリードフレー
ム２の各リード５．５と、半導体チップ１の第２．第３
の各電極１２ｂ、１２ｃとの間を、それぞれに金属ワイ
ヤ８．８で接続して配線させた上で、この半導体チップ
１の全周囲部分を封止樹脂材７により封止させるが、こ
の樹脂封止に先立ち、グイパッド部３上での半導体チッ
プ１の接合部周囲に対応して、同部分におけるメサ溝１
４．保護ガラス層１１によって狭められた隙間部分１５
への、封止樹脂材７の充填を避け、同狭められた隙間部
分１５に、半田付け４部分での熱膨張率よりも十分に小
さい熱膨張率を有して、かつ耐熱性、および弾力性のあ
る有機材料８．この場合、具体的には、ワニスを埋め込
んだものである。That is, in the configuration of the embodiment shown in FIG.
The first electrode 12a side (not shown) of the semiconductor chip l is welded and fixedly connected to the lead pad portion 3 of the lead frame 2 by soldering 4, and is connected to each lead 5.5 of the lead frame 2. , the second . of the semiconductor chip 1. Third
The metal wires 8.8 are connected to the electrodes 12b and 12c, respectively, and the entire periphery of the semiconductor chip 1 is sealed with a sealing resin material 7. Prior to sealing, a mesa groove 1 is formed in the area corresponding to the periphery of the bonding area of the semiconductor chip 1 on the Gui pad area 3.
4. Gap portion 15 narrowed by protective glass layer 11
Avoid filling the sealing resin material 7 into the narrowed gap portion 15, and fill the narrowed gap portion 15 with a material having a coefficient of thermal expansion sufficiently smaller than that of the soldering portion 4, and having heat resistance and elasticity. Organic materials with properties 8. In this case, specifically, varnish is embedded.
従って、この実施例構成の場合にあっても、半導体装置
Ａが高温（例えば、２６０〜２８０℃程度）の環境雰囲
気下におかれて、その構成材料が熱膨張するのは変らな
いのであるが、前記した従来例構成の場合に、熱膨張率
の点で問題となっていた隙間部分１５には、封止樹脂材
７が充填されておらず、同隙間部分１５には、半田付け
４部分での熱膨張率よりも十分に小さい熱膨張率で、耐
熱性、および弾力性のある有機材料８が充填されている
ために、こへでは、その熱膨張率の差を十分に吸収し得
て、半導体チップ１が半田付け４部分から剥離する惧れ
を効果的に解消できるのである。Therefore, even in the case of this embodiment configuration, when the semiconductor device A is placed in a high temperature environment (for example, about 260 to 280 degrees Celsius), its constituent materials will still thermally expand. In the case of the above-mentioned conventional structure, the gap portion 15, which had a problem in terms of thermal expansion coefficient, is not filled with the sealing resin material 7, and the gap portion 15 is filled with the soldered 4 portions. Since the heat-resistant and elastic organic material 8 is filled with a coefficient of thermal expansion that is sufficiently smaller than the coefficient of thermal expansion at Therefore, the risk of the semiconductor chip 1 peeling off from the soldered portion 4 can be effectively eliminated.
なお、前記実施例においては、双方向サイリスタからな
る樹脂封止した両面メサ型半導体装置について述べたが
、その他の樹脂封止型半導体装器であっても、グイパッ
ド部上での半導体チップの接合部周囲に対応して、同部
分に狭められた隙間部分が形成される装置構成であれば
、任意の装置にも同様に適用できて、同様な作用、効果
を得られることは勿論である。In the above embodiment, a resin-sealed double-sided mesa-type semiconductor device consisting of a bidirectional thyristor was described, but other resin-sealed semiconductor devices may also be used for bonding semiconductor chips on the pad portion. It goes without saying that the device configuration in which a narrowed gap portion is formed in the same area corresponding to the periphery of the device can be similarly applied to any device, and the same operation and effect can be obtained.
以上詳述したようにこの発明によれば、半導体チップを
リードフレームのグイパッド部上に半田付けなどで接合
して搭載させ、かつこの半導体チップ部分を樹脂封止さ
せる樹脂封止型半導体装置において、グイパッド部上で
の半導体チップの接。As detailed above, according to the present invention, in a resin-sealed semiconductor device in which a semiconductor chip is mounted on a lead frame by soldering or the like, and this semiconductor chip portion is sealed with resin, Connecting the semiconductor chip on the guide pad.
合部周囲に対応して、同部分に形成される狭められた隙
間部分に対し、半田付は部分での熱膨張率よりも十分に
小さい熱膨張率で、耐熱性、および弾力性のある有機材
料を埋め込んであるために、この樹脂封止型半導体装器
が高温の環境雰囲気下におかれた場合にあっても、隙間
部分に埋め込まれた有機材料によって、同隙間部分に生
ずる熱膨張率の差を十分に吸収でき、結果的に半導体チ
ップが半田付は部分から剥離する慣れを容易かつ効果的
に解消し得るもので、装置内容に不具合を生する惧れが
なく、信頼性の高いこの種の樹脂封止型半導体装置を提
供できるのであり、しかも、構造的に極めて簡単で容易
に実施可能であるなどの優れた特長がある。In response to the narrow gap formed around the joint, soldering is made of a heat-resistant and elastic organic material with a coefficient of thermal expansion that is sufficiently lower than that of the part. Because the material is embedded, even if this resin-sealed semiconductor device is placed in a high-temperature environment, the organic material embedded in the gap will reduce the coefficient of thermal expansion that occurs in the gap. As a result, it is possible to easily and effectively eliminate the habit of semiconductor chips peeling off from soldered parts, and there is no risk of malfunctions in the equipment contents, resulting in high reliability. This type of resin-sealed semiconductor device can be provided, and has excellent features such as being structurally extremely simple and easy to implement.
第１図はこの発明に係る樹脂封止型半導体装置の一実施
例による概要構成を示す断面図であり、また、第２図は
一般的なウェハの態様を示す説明斜視図、第３図（ａ）
ないしくｃ）は従来例による半導体装置の製造過程を順
次に示すそれぞれに断面図、第４図（ａ）ないしくｃ）
は同上装置の組立て過程を順次に示すそれぞれに斜視図
、第５図は同上装置の概要構成を示す断面図である。
ｌ・・・・半導体チップ、２・・・・リードフレーム、
３・・・・グイパッド部、４・・・・半田付は部、５・
・・・リード、６・・・・金属ワイヤ、７・・・・封止
樹脂材、８・・・・有機材料（ワニス）、１５・・・・
隙間部分。
代理人 大 岩 増 雄
第２図
第３図
第４図FIG. 1 is a cross-sectional view showing the general configuration of an embodiment of a resin-sealed semiconductor device according to the present invention, FIG. 2 is an explanatory perspective view showing the form of a general wafer, and FIG. a)
4(a) to 4(c) are sectional views sequentially showing the manufacturing process of a semiconductor device according to a conventional example, and FIGS. 4(a) to 4(c)
5 is a perspective view sequentially showing the assembly process of the above device, and FIG. 5 is a sectional view showing the general structure of the above device. l...Semiconductor chip, 2...Lead frame,
3...Gui pad part, 4...Soldering part, 5...
...Lead, 6...Metal wire, 7...Sealing resin material, 8...Organic material (varnish), 15...
Gap part. Agent Masuo Oiwa Figure 2 Figure 3 Figure 4
Claims (1)
ｍ付けなどで接合して搭載させると共に、この半導体チ
ップ部分を樹脂封止させる装置構成において、前記ダイ
パッド部上での半導体チップの接合部周囲に対応して、
同部分に形成される狭められた隙間部分に対し、前記半
田付け部分での熱膨張率よりも十分に小さい熱膨張率を
有して、かつ耐熱性、および弾力性のある有機材料を埋
め込んで構成したことを特徴とする樹脂封止型半導体装
置。In an apparatus configuration in which a semiconductor chip is mounted on a die pad portion of a lead frame by bonding with a half-mold or the like, and this semiconductor chip portion is sealed with resin, a method is provided that corresponds to the periphery of the bonding portion of the semiconductor chip on the die pad portion. hand,
In the narrowed gap formed in the same part, an organic material having a coefficient of thermal expansion sufficiently lower than that of the soldered part, and which is heat resistant and elastic is filled. 1. A resin-sealed semiconductor device comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62292704A JPH01133337A (en) | 1987-11-18 | 1987-11-18 | Resin sealed type semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62292704A JPH01133337A (en) | 1987-11-18 | 1987-11-18 | Resin sealed type semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01133337A true JPH01133337A (en) | 1989-05-25 |
Family
ID=17785224
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62292704A Pending JPH01133337A (en) | 1987-11-18 | 1987-11-18 | Resin sealed type semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01133337A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1675173A2 (en) * | 2004-12-06 | 2006-06-28 | Delphi Technologies, Inc. | Epoxy-solder thermally conductive structure for an integrated circuit |
-
1987
- 1987-11-18 JP JP62292704A patent/JPH01133337A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1675173A2 (en) * | 2004-12-06 | 2006-06-28 | Delphi Technologies, Inc. | Epoxy-solder thermally conductive structure for an integrated circuit |
| EP1675173A3 (en) * | 2004-12-06 | 2006-07-05 | Delphi Technologies, Inc. | Epoxy-solder thermally conductive structure for an integrated circuit |
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