JPH01132149U - - Google Patents
Info
- Publication number
- JPH01132149U JPH01132149U JP2872288U JP2872288U JPH01132149U JP H01132149 U JPH01132149 U JP H01132149U JP 2872288 U JP2872288 U JP 2872288U JP 2872288 U JP2872288 U JP 2872288U JP H01132149 U JPH01132149 U JP H01132149U
- Authority
- JP
- Japan
- Prior art keywords
- station
- clock synchronization
- synchronization system
- oscillator
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005540 biological transmission Effects 0.000 claims description 4
- 238000001514 detection method Methods 0.000 claims description 2
- 230000001360 synchronised effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
- 238000000605 extraction Methods 0.000 description 1
Landscapes
- Synchronisation In Digital Transmission Systems (AREA)
Description
第1図はこの考案の一実施例によるクロツク同
期方式を示す構成図、第2図は従来の従属同期方
式を示す構成図である。
図において、1は原発振器、2,4は端末装置
、3,5は回線終端装置、6は伝送路、7はバツ
フアメモリ、8は受信抽出クロツク、9は切換回
路、10は入力断検出信号、11は送信中か否か
の信号を示す。なお、図中、同一符号は同一、ま
たは相当部分を示す。
FIG. 1 is a block diagram showing a clock synchronization system according to an embodiment of this invention, and FIG. 2 is a block diagram showing a conventional slave synchronization system. In the figure, 1 is an original oscillator, 2 and 4 are terminal devices, 3 and 5 are line termination devices, 6 is a transmission line, 7 is a buffer memory, 8 is a reception extraction clock, 9 is a switching circuit, 10 is an input disconnection detection signal, 11 indicates a signal indicating whether transmission is in progress. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.
Claims (1)
振器をもち、他方の局がその原発振器に従属同期
するクロツク同期方式において、伝送路側の入力
断検出信号または送信中であることを示す信号を
用いて原発振器をもつ局と従属動作する局とを自
動的に切換えることを特徴とするクロツク同期方
式。 In a clock synchronization system in which one station has a clock source oscillator and the other station is dependently synchronized to that source oscillator, the clock synchronization relationship is determined by using an input disconnection detection signal on the transmission line side or a signal indicating that transmission is in progress. A clock synchronization system characterized by automatic switching between a station with a primary oscillator and a station operating as a slave.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2872288U JPH01132149U (en) | 1988-03-03 | 1988-03-03 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2872288U JPH01132149U (en) | 1988-03-03 | 1988-03-03 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01132149U true JPH01132149U (en) | 1989-09-07 |
Family
ID=31252311
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2872288U Pending JPH01132149U (en) | 1988-03-03 | 1988-03-03 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01132149U (en) |
-
1988
- 1988-03-03 JP JP2872288U patent/JPH01132149U/ja active Pending
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