JPH01131599A - Low frequency modulation circuit for musical sound generator - Google Patents

Abstract

PURPOSE: To improve accuracy and stability by changing the frequency division ratio of a frequency counter for determining the reading frequency of an waveform data memory by the digital operation of data from a frequency register and data from a modulation memory. CONSTITUTION: When an arithmetic circuit 5 is an addition (subtraction) circuit, data for one word are read out from the modulation memory 8, added to the data of the frequency register 7 and the added result is inputted to the frequency counter 2 to determine the frequency division ratio of an oscillation clock 1. At the time of reading out the data of a succeeding address from the memory 8, the read data are added to the data of the register 7 again to change the frequency division ratio of the counter 2. Namely the reading frequency of the memory 3 is successively changed in each reading of data from the memory 8, so that the change of the frequency appears as a modulation effect. Consequently the accuracy and stability of the circuit can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to the configuration of a low frequency modulation circuit using a low frequency oscillation circuit in a musical tone generator.

[Summary of the invention]

The present invention changes the configuration of a low frequency modulation circuit in a musical tone generator by digitally calculating the frequency division ratio of a frequency counter that determines the reading frequency of a waveform data memory and the data of a frequency register and modulation memory data. By using this method, detailed control becomes possible, and since it is composed entirely of digital circuits, accuracy and stability are improved, and implementation on a semiconductor integrated circuit becomes easy.

[Conventional technology]

Conventionally, low frequency modulation circuits have used analog circuits such as voltage controlled oscillator circuits (VCOs) in the source clock section that determines the fundamental frequency of musical tones.

[Problem that the invention seeks to solve]

However, analog circuits such as VCOs require high precision from the elements that make up them, making it difficult to manufacture them stably.

However, since the configuration according to the present invention is completely digitally processed, it is excellent in terms of accuracy and stability, and can be easily realized using a semiconductor integrated circuit.

[Means for solving problems]

The low frequency modulation circuit of the present invention includes: (a) the output of an LFO counter that determines the readout speed is connected to a modulation data memory that holds a modulation function;
The value of the LFO register is input to the LFO counter, (b) a waveform memory that holds musical waveform data, a sound system that outputs the read waveform data as audio, and the value is input to the waveform memory and the waveform data is read out. It has a frequency counter that determines the speed, (c) the data in the F register and the data in the modulation memory are manually input to the arithmetic unit, the result is input to the F counter, and (d) the data in the L F CT L register is inputted to the arithmetic unit. It is characterized by being connected to an arithmetic circuit.

[Effect]

For example, if the arithmetic circuit is an addition (subtraction) circuit, one word of data from the modulation memory is read out, added to the data in the F register, the result is input to the F counter, and the frequency division ratio of the original clock is decide.

Next, when the data at the next address in the modulation memory is read out, it is added to the data in the F register again, and the frequency division ratio of the F counter changes. In other words, each time data is read from the modulation data memory, the read frequency of the waveform data memory changes sequentially, resulting in a modulation effect.

〔Example〕

An embodiment of the present invention will be explained based on FIG. In a state where no modulation is applied, the original clock 1 becomes an input to the F counter 2, and is frequency-divided according to the value set in the F register 7. This output signal 12 sequentially increments the address of the waveform data memory 3 in which waveform data is set in advance, and when one period of waveform data is read out, returns to the original address and increments the address again. The waveform data output signal 13 read out in this way is input to the sound system 4, and the sound volume is adjusted to produce sound. That is, the fundamental frequency r of the output signal 13 of the waveform data memory. uT is: The frequency of the original clock 1 is fo The number of words in the waveform data memory 3 is TTH The value of the F register 7 is F, Let us assume that 4. Next, we will explain the configuration of the LFO circuit, which is a feature of the present invention. .

The output signal 15 of the original clock ■ is input to the LFO counter 9, the frequency division ratio is determined by the value of the LFO register 10, and the output signal 18 of the LFO counter 9 determines the reading speed of the modulation data memory 8. . Frequency rtr of signal 18 at this time. is the number of words in the modulation data memory T. If the value of the LFOLFO register is fL, then f, l Modulation data (as described later) is set in the modulation data memory 8, and when a word is read out, the data signal 17 is the arithmetic unit 5 together with the data signal 16 of the F register 7.
are taken into inputs B and A, respectively. In addition, the input C of the calculator 5
Data 11 of the LFCTL register 6 is connected to , and the type of operation is determined by this value. and computing unit 5
The output signal I4 of is I? The signal is input to the counter 2, and the frequency division ratio of the original clock signal 15 is determined.

Now, when the data 17 is read out from the modulation data memory 8 at the frequency (2), the signal 1 is read out every time the data value changes.
4 changes, and the frequency division ratio of the F counter 2 changes. In other words, the signal 13 is modulated at the frequency (2).

Next, a detailed explanation will be given of when modulating the fundamental frequency of the audio output signal 13.

FIG. 2 is a control circuit diagram of the arithmetic circuit.

For simplicity, it is assumed that the F register 7 has 8 bits, the modulation data has 1 code bit and 3 data bits, and the arithmetic unit 5 is set to an addition (subtraction) circuit by the signal 21 from the LFCTL register 6. The 4 bits of modulation data, which can take values from +7 to -7 including the sign, are added to the 8 bits of the F register 7. At this time, control signals 22 and 23 from the LFCTL register 6 are connected to inputs C+ and Cz of the arithmetic unit 5.

The values of C1 and C2 determine which portion of the 8 bits of the F register the 4 bits of modulation data are added to. For example, when C, C, = 01, the lower 4 bits of the F register Cz
For Cl-10 Middle 4 bits of F register Cz Cr
``'' 11 If the logic is configured using the upper 4 bits of the F register, the degree of modulation can be made deeper or shallower depending on the values of C and C. (c,C,=11
(The modulation is deep and changes rapidly when It is possible to freely select the modulation frequency by setting, and the LF
The depth of modulation can be changed by manipulating the value of the CTL register.

In this implementation, the modulation data is 4 bits, and the LFO register is 8 bits.
However, for more detailed control, it is possible to increase the number of bits with the same configuration. In addition, the depth of modulation can be easily changed by changing the control method of the arithmetic unit, and operations such as addition (subtraction) as well as multiplication (division) can be performed using normal digital arithmetic unit methods. It is.

Up to now, the explanation has been made using block diagrams, but specific elements have been described in FIGS. 3 to 5. The numbers shown are the same as those in FIG.

FIG. 6 shows another embodiment of the present invention. The feature of this configuration is that the low frequency modulation output is transmitted from LFO register 70 → LFO counter 69 → modulation data memory 6
8 → Arithmetic unit 65 → Frequency counter 62 → Waveform data memory 63 → Sound system 64 → First musical sound output JSI →
In addition to the path OUT, there is a path LFO register 70→modulation data memory 68→sound system 71→second musical tone output S2→OUT.

[Effects of the Invention] According to the configuration of the present invention, all operations are performed by digital processing, so it has excellent accuracy and circuit stability, and can be easily implemented on a semiconductor integrated circuit.

Furthermore, by simply operating three locations: the modulation data memory, the control of the digital arithmetic unit, and the LFO register, the low frequency modulation circuit is easy to use, has a large degree of freedom, and is expandable.

Furthermore, since the musical tone generation circuit and the modulation frequency generation circuit have very similar configurations, consisting of a frequency register, a frequency counter, and a waveform (variable tPi) data memory, when no modulation is applied, they can be used as two musical tone generation circuits. It is also possible to use

Also, by mixing and outputting the so-called vibrato sound modulated by the low frequency r tow and the low frequency f LaI3 frequency sound, the richness of the sound increases, so it can also be used in combination. can.

[Brief explanation of the drawing]

Figure 1 is a configuration diagram of the low frequency modulation circuit, Figure 2 is a control circuit diagram of the arithmetic unit, Figure 3 is a detailed diagram of the LFO register and LFO counter, and Figure 4 is details of the frequency counter, waveform memory, and sound system. 5 is a detailed diagram of the arithmetic unit, frequency register, modulation data memory, and LFO control register, and FIG. 6 is a block diagram showing another embodiment. Applicant: Seiko Epson Corporation

Claims (4)

[Claims] (1) (a) A low frequency modulation counter (hereinafter referred to as L
FO counter) is connected, and the value of the low frequency modulation register (hereinafter referred to as LFO register) is input to the LFO counter. (b) A waveform memory that holds musical waveform data and the read waveform data as audio It has a sound system to output, and a frequency counter (hereinafter referred to as F counter) which is input to the waveform memory and determines the waveform data reading speed, (c) data in the frequency register (hereinafter referred to as F register) and data in the modulation memory are A low frequency in a musical tone generator, characterized in that the data is input to an arithmetic unit, the result is input to the F counter, and (d) data of a low frequency control register (hereinafter referred to as LFCTL register) is connected to the arithmetic circuit. Modulation circuit. (2) A low frequency modulation circuit in a musical tone generator according to claim 1, wherein the modulation data memory is a waveform memory that generates the second musical tone. (3) A low frequency modulation circuit in a musical tone generator according to claim 1, characterized in that the LFO counter is connected to another frequency counter for determining the frequency of the second musical tone. (4) The musical tone according to claim 1, wherein the arithmetic unit has a function of controlling operations ranging from operations that apply deep modulation to operations that apply shallow modulation, using an LFO control register. Low frequency modulation circuit in the generator.