JPH0113083B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a focus detection device that electrically performs focus detection in still cameras, cine cameras, microphotography devices, and the like.

Various such focus detection devices have been proposed in the past, including one having the configuration shown in FIG. 1, for example. This focus detection device uses N
A light receiving device 2 having a large number of light receiving elements receives light, and an analog-to-digital (A/D) conversion circuit 3 converts the photoelectric output of each into a digital signal, which is then transferred to N memory elements corresponding to the light receiving elements. The stored digital signals x ₁ to x _N corresponding to each light-receiving element are taken into the central processing unit 5 and, for example, the absolute value of the difference between the digital signals corresponding to adjacent light-receiving elements is calculated. |x _o −x _o-1 | is calculated to find its maximum value |x _o −x _o-1 |MAX, and this is displayed on the display device 6 as a value representing the sharpness of the object image.
At the same time, the motor 8 is driven via the motor drive circuit 7 to move the photographing lens 1 to the in-focus position.

FIG. 2 is a circuit diagram of the light receiving device 2 shown in FIG. 1. This light-receiving device includes N photoelectric conversion circuits 11-1 to 11-N having the same configuration formed in high density on the same semiconductor chip, but here, only the configuration of one photoelectric conversion circuit 11-1 is shown. Explain. The photoelectric conversion circuit 11-1 includes a photodiode 12-1 (light receiving element), a capacitor 13-1, and a field effect transistor (FET) connected in parallel.
a first gate 14-1 consisting of a FET 15-1;
1 and 16-1, the first buffer 17-
1, a second gate 18-1 consisting of an FET,
Capacitor 19-1 and FETs 20-1 and 2
a second buffer 22-1 consisting of 1-1;
and a third gate 23-1 made of an FET.
Photodiode 12-1 and capacitor 13-
One parallel circuit is connected between the V _DD voltage line and the V _SS voltage line of a DC power supply (not shown) through a first gate 14-1. First gate 14-1
The gate of the FET constituting the controller is connected to a CHG input terminal 24 that receives a charge signal (CHG) from the central processing unit 5. The connection point X between the photodiode 12-1 and the capacitor 13-1 and the first gate 14-1 is connected to the FET 16 of the first buffer 17-1.
Connect to the gate of -1. One end of FET16-1 is connected to the V _SS voltage line, and the other end is connected to FET15-1.
Connect to one end of the The other end of this FET15-1 is
Connect to the V _DD voltage line, and the gate connects to the V _SS voltage line. The connection point Y between FET15-1 and FET16-1 constituting the first buffer 17-1 is connected to the capacitor 1 through the second gate 18-1.
9-1 and the second buffer 22-1.
Connect to the gate of FET21-1. The gate of the FET constituting the second gate 18-1 is connected to an S/H input terminal 25 that receives a sample and hold signal (S/H) from the control circuit 2. capacitor 1
The other end of FET 9-1 and one end of FET 21-1 are connected to the V _SS voltage line, and the other end of FET 21-1 is connected to the FET
Connect to one end of 20-1. This FET20-1
The other end is connected to the V _DD voltage line, and the gate is
Connect to V _SS voltage line. Second buffer 22
The connection point Z between FET 20-1 and FET 21-1 that constitutes -1 is connected to the output terminal 26-1 via the third gate 23-1, and the gate of the FET that constitutes this third gate is located at the center. It is connected to the RD ₁ input terminal 27-1 which receives the read signal (RD) from the processing device 5. Other photoelectric conversion circuits are configured in the same manner as above, and the first gates 14-1 to 14-N are configured.
The gates of the FETs are commonly connected to the CHG input terminal 24, the gates of the FETs constituting the second gates 18-1 to 18-N are respectively commonly connected to the S/H input terminal 25, and the output terminal 26- 1-26
-N is connected to the A/D conversion circuit 3. Also, R.D.
The input terminals 27-1 to 27-N are connected to the central processing unit 5, respectively.

Next, the operation of the light receiving device shown in FIG. 2 will be explained with reference to FIGS. 1 and 3.

Before starting the integration of the object image, the first gate 14-1
~14-N are closed (OFF), and the voltage between the terminals of capacitors 13-1 to 13-N is "0". Therefore, the first buffers 17-1 to 17-
The input potential to N is V _DD and the first buffer 1
The outputs of 7-1 to 17-N are at a corresponding predetermined potential V (FIG. 3A). The second gates 18-1 to 18-N are open (ON), and this potential is applied to the capacitors 19-1 to 19-N, and these capacitors are charged to the potential V.

In this state, the terminal voltage V of the capacitors 19-1 to 19-N is the same as that of the second buffer 22-1 to 22-N.
and the corresponding potential V' (Figure 3B)
is being output.

To perform integration, first the central processing unit 5
CHG signal of low (L) level as shown in Figure C
to the input terminal 24 and the first gates 14-1 to 1
Open 4-N. Then, the potential at point X becomes V _SS ,
Capacitors 13-1 to 13-N are charged to _VDD . In addition, along with this, the first buffer 17-1
Since the input potential to ~17-N becomes "V _SS ",
Accordingly, the output of these buffers is also “V _SS ”.
Or a small value close to this, capacitor 1
9-1 to 19-N are second gates 18-1 to 18
-N and the first buffers 17-1 to 17-N. As a result, the second buffer 22
Since the inputs to -1 to 22-N decrease, their outputs also become "V _SS " or a small value close to this.

After the predetermined time t (capacitors 13-1 to 13
-N is sufficiently charged), set the CHG signal to high (H) level as shown in Figure 3C, close (OFF) the first gates 14-1 to 14-N, and start integration. do. Then, capacitors 13-1 to 13-N
The charges stored in the photodiodes 12-1 to 12-1
2-N, each photodiode 12-1 to 12-N
Accordingly, the input potential to the first buffers 17-1 to 17-N increases, and the output thereof gradually increases (FIG. 3A). Accordingly, the capacitors 19-1 to 19-N are charged via the first buffers 17-1 to 17-N and the second gates 18-1 to 18-N (Fig. 3B ), the input potential and output potential of the second buffers 22-1 to 22-N gradually increase.

After a predetermined time T has elapsed since the start of integration, the central processing unit 5 sends an H level S/H signal as shown in FIG. 3D to the S/H input terminal 25, and the second gate 18-1 ~ 18-N is closed (OFF), and the integral value at that time is connected to capacitors 19-1 ~ 19-N.
Hold the sample.

In this way, capacitors 19-1 to 19-N
The output voltages of the second buffers 22-1 to 22-N corresponding to the sampled and held potentials are output from the central processing unit 5 to the third gates 23-1 to 23-N.
By supplying the required signals to the RD input terminals 27-1 to 27-N via the decoder 3, they can be selectively output to the output terminals 26-1 to 26-N, and these signals are sent to the A/D conversion circuit. It can be applied to three input terminals.

In the conventional focus detection device shown in Fig. 1,
The photoelectric output (integral value) sampled and held as described above is converted into a digital signal by the A/D conversion circuit 3 and stored in the digital memory 4, and this digital signal is processed by the central processing unit 5 based on a predetermined evaluation function. The focus state of the object image is detected through calculation processing. However, when using a large number of photoelectric conversion circuits 11-1 to 11-N, the sensitivity (photoelectric conversion efficiency) of each photodiode (light receiving element) 12-1 to 12-N and the surrounding area corresponding to each photodiode are Variations in the output due to variations in the electrical characteristics of the circuit, non-uniformity of the optical system, etc. are superimposed on the pixel information (photoelectric output) of the object image. For example, if the photoelectric conversion circuits 11-1 to 11-N are irradiated with light of uniform intensity and the sample and hold voltages are observed after the same exposure time T, the photoelectric output of each photoelectric conversion circuit is not constant; As shown in Fig. 4, there are variations. In addition, in Fig. 4, the numbers 1, 2, and
..., N represents the number in the arrangement direction of the photoelectric conversion circuit. If a photoelectric conversion circuit with such variations in characteristics is used, it will not be possible to accurately detect focus, especially for objects (subjects) with low contrast, and if the variations are large, focus detection itself will become impossible. There is.

An object of the present invention is to solve the above-mentioned problems, to effectively correct variations in the characteristics of a plurality of photoelectric conversion circuits, and to provide an appropriately configured system that can always perform high-precision focus detection even for subjects with low contrast. This invention attempts to provide a focus detection device.

The present invention relates to a light receiving device comprising a plurality of integral type photoelectric conversion circuits each having a light receiving element that receives a small common portion of an object image formed by an optical system, and an integral value of a plurality of photoelectric outputs from the light receiving device. an analog-to-digital conversion circuit that converts the image into a digital signal, and stores digital signals corresponding to integral values from the plurality of photoelectric conversion circuits corresponding to the light intensity distribution of the object image from the analog-to-digital conversion circuit. and a digital memory, the focus detection device detects a focused state of the object image by calculating a plurality of digital signals stored in the digital memory based on a predetermined evaluation function, wherein the light receiving device A light shielding means for selectively shielding incident light from the light receiving device and an illumination means for selectively and uniformly illuminating the light receiving device are provided, and two correction value memories are connected in parallel with the digital memory,
A plurality of photoelectric outputs of the light receiving device in a state in which the light blocking means is activated are each converted into digital signals by the analog-to-digital conversion circuit and stored in one of the correction value memories as dark value data, and the illumination means A plurality of photoelectric outputs of the light receiving device in an activated state are stored as light value data in the other of the correction value memories, and dark value data and light value data stored in these correction value memories are stored in the digital memory. The present invention is characterized in that the in-focus state of the object image is detected by correcting a digital signal according to the light intensity distribution of the object image.

The present invention will be described in detail with reference to the drawings.

A preferred embodiment of the invention uses a light receiving device similar to that shown in FIG. In this case, the occurrence of variations in the photoelectric output of each photoelectric conversion circuit is caused by () differences in sensitivity of the photodiodes 12-1 to 12-N, () differences in the sensitivity of the first buffers 17-1 to 17-N and the second buffer 22; The difference in threshold voltage between -1 and 22-N is cited as the biggest cause.

In the first embodiment of the present invention, the above (),
At the same time, the variations in photoelectric output due to the causes of () are corrected.

First, the correction method will be explained with reference to FIG. In FIG. 5, the vertical axis represents the photoelectric output voltage, and the horizontal axis represents the exposure amount.

First, photodiodes 12-1 to 12-N
The lowest value among the photoelectric outputs (dark values) after a certain exposure time T in a state where no light is irradiated to the light source (see FIG. 2) is defined as "0". Next, give a constant intensity and a constant exposure time T to all photodiodes 12-1 to 12-N, and when the total exposure amount is set to E _p , the maximum value of each photoelectric output is defined as V _{S MAX} . do.

Although a photodiode with a sensitivity curve S _M connecting photoelectric output "0" and V _{S MAX} does not necessarily exist, it can be considered as a photodiode having a hypothetical maximum sensitivity. The general existing photodiode is
It will have a sensitivity curve as represented by S _o . In other words, the dark value is V _Do and the measured value of the exposure amount E _p is V _So
belongs to.

Here, the cause of the variation in photoelectric output mentioned above due to () appears as a difference in the slope of the sensitivity curve S _o , and the cause due to () is a difference in dark value.
Appears as V _Do. Therefore, the correction is based on the slope
The point (E ₁ , V _o ) on the straight line with S _o and the cutting edge V _{Do is}
This can be done by converting to a straight line (E ₁ , V _MAX ) having a slope S _M and an intersecting edge 0, which is an ideal photodiode. That is, V _MAX is expressed as a function of _Vo , V _Do , and V _So.

In Figure 5, the slopes of the two straight lines are
S _M and S _o , V _{S MAX} = S _M E ₀ …(1) V _So = S _o E ₀ +b _o …(2) V _MAX = S _M E ₁ …(3) V _o = S _o E ₁ +b _o …(4) From equations (3) and (4), V _MAX −V _o = (S _M −S _o )E ₁ −b _o V _MAX =V _o +(S _M −S _o )E ₁ −b _o …(5) From formula (1) S _M =V _SMAX /E ₀ …(6) From formula (2) S _o =V _So −b _o /E ₀ …(7) (6), (7) formula From (S _M −S _o )=V _SMAX −V _so +b _o /E ₀ =a _o +b _o /E ₀ …(8) From equations (5) and (8), V _MAX =V _o +(a _o +b _o ) E ₁ /E ₀ −b …(9) Also, from equations (2) and (4), E ₀ =V _So −b _o /S _o E ₁ =V _o −b _o /S _o E ₁ /E ₀ =V _o −b _o /V _So −b _o …(10) Substituting equation (10) into (9), we get V _MAX =V _o +(a _o +b _o )/V _So −b _o V _o −( a _o + b _o ) b _o /V
_So −b _o −b _o = (1+a _o +b _o /V _So −b _o )V _o −(a _o +b _o )b
_o + (V _So −b _o ) b _o /V _So −b _o …(11). Here, V _So = V _SMAX −a _o , so equation (11) is V _MAX = V _SMAX /V _So −b _o V _o −V _SMAX /V _So −b _o b _o = V _SMAX /V _So − b _o (V _o −b _o ), but since _bo = V _Do , the correction formula of V _MAX = V _SMAX /V _So −V _Do (V _o −V _Do ) …(12) is derived. .

Next, a description will be given of the focus detection device of this embodiment that corrects variations in photoelectric output based on correction formula (12).

FIG. 6 is a block diagram showing the configuration of such a focus detection device. In this embodiment, a light shielding means 31 that blocks incident light in the photographing optical path between the photographing lens 1 and the light receiving device 2, and a light shielding means 31 that scatters the incident light or causes a light source to emit light to uniformly illuminate the light receiving device 2. The light shielding means 31 and the illumination means 32 are selectively driven and controlled by the central processing unit 5. Further, the digital memory 4 is connected in parallel to two correction value memories 33 and 34 each having N memory elements corresponding to each photoelectric conversion circuit.
will be established. The other configurations are the same as in FIG. 1.

The operation of the focus detection device shown in FIG. 6 will be explained below.

First, the central processing unit 5 drives the light shielding means 31 to block the incident light to the light receiving device 2, and then drives the light receiving device 2 and the A/D conversion circuit 3, respectively, and converts the N photoelectric conversion circuits of the light receiving device 2. The photoelectric output from 11-1 to 11-N is A/D converted to dark value level.
It is stored in the correction value memory 33 as V _D1 to V _DN .

Next, the central processing unit 5 drives the illumination means 32,
The above-described operation is repeated with the light receiving device 2 uniformly illuminated, and each photoelectric conversion circuit 11- at a predetermined exposure amount is
The photoelectric outputs of 1 to 11-N are A/D converted and stored in the correction value memory 34 as a write value data.

After the above-mentioned A/D conversion of the photoelectric output in the dark and at a predetermined exposure amount, that is, the measurement of the correction value, a small common part of the subject image is projected onto the light receiving device 2, and its intensity distribution is measured. A/D conversion is performed in the same manner as above, and the digital value V ₁ ~
V _N (x ₁ to x _N ) is stored in the digital memory 4.

Note that the measurement of the correction value described above may be performed every time the intensity distribution of the subject image is measured, or the correction value measured once may be used repeatedly.

Next, the correction data measured as described above
A method of calculating the evaluation value using V _Do , V _So and the intensity distribution data x _o of the subject image will be explained with reference to FIG. 7.

FIG. 7 is a block diagram showing in more detail the central processing unit 5, digital memory 4, correction value memories 33, 34, and display device 6 shown in FIG. The control circuit 5-1 sets the memory address of the correction value memory 34 in the address register 5-2, and loads the correction data V _So at that address into the accumulator 5-4 through the input buffer 5-3. This loaded correction data V _So is set to the input port A of the arithmetic circuit 5-6 via the internal memory 5-5. Next, by the same operation, the correction data V _Do is input to the input port B of the arithmetic circuit 5-6 from the corresponding address of the correction value memory 33 that stores the dark value (digital signal) of the photoelectric conversion circuit corresponding to the correction data V _So. a) _in internal memory _5-5 .
Store in address. Next, perform the same operation to create V _o
-V _Do is calculated and stored at address c) in the internal memory 5-5.

Here, the above correction formula (12) requires V _SMAX , which is stored in the correction value memory 34.
The operation is to find the maximum value from V _S1 to V _SN . However, since a photodiode with a sensitivity of S _M is essentially a virtual one, there is no reason to take an actual value as V _SMAX . Therefore, in this embodiment, the maximum value of V _So that can be considered as V _SMAX is virtually set. This is, for example, an 8-bit A/D in the A/D conversion circuit 3.
If we perform conversion, if we set V _SMAX = 256, the actual V _So will always be smaller than this.

Therefore, in this embodiment, instead of calculating V _SMAX /V _So -V _Do , 256/V _So -V _Do is performed, and this is stored at address b) in the internal memory 5-5. Next, the corrected intensity value x _o ' is obtained by multiplying the value at address b) and the value at address c) in the internal memory 5-5, and this is stored at address d) in the internal memory 5-5. do.

Next, x _o ′ _-1 , which was previously calculated using the same procedure and stored at address e) in internal memory 5-5, and the above
Calculate |x _o ′−x _o ′ _-1 | by x _o ′, and combine this value with |x _o ′−x _o ′ _-1 previously stored at address f) in internal memory 5-5. ｜Compare with MAX and select the larger one as new｜x _o ′−x _o ′ _-1 ｜Internal memory 5 as MAX
-5 f) address.

Evaluation value based on the intensity distribution corrected by repeating the above operation N-1 times | x _o ′−x _o-1 | MAX
can be found.

When the light receiving device 2 is placed at a position conjugate with the planned focal plane of the photographic lens 1, the above-mentioned operation is repeated while moving the photographic lens 1, and |x _o ′−x _o ′ is obtained by sequential operations. _-1 ｜Depending on the polarity of the MAX difference, the display device 6 is output via the output buffer 5-7.
The front focus and rear focus are displayed on the display device 6, and when the difference between them becomes zero, a focus matching signal is displayed on the display device 6.
It can be outputted to and displayed by appropriate means. Furthermore, if two light receiving devices 2 are prepared and placed so that they receive the same image at equal positions before and after a position conjugate with the intended focal plane of the photographic lens 1, then the evaluation value for each light receiving device | x _o ′−x _o ′ _-1 ｜
MAX is calculated, the difference between them is calculated, and the front focus and rear focus can be displayed based on the polarity, and a focus matching signal can be output when the evaluation values in both light receiving devices become zero.
Note that the motor 8 may be driven to move the photographing lens 1 in a direction in which the difference in the evaluation values described above becomes zero.

In the above-described embodiment, the dark value of the light receiving device 2 and the photoelectric output during uniform illumination are each measured by A/D.
Although the converted values are stored in the correction value memories 33 and 43, similar correction values may be written in a programmable ROM (PROM) during the assembly stage of the device.

In a second embodiment of the present invention, a PROM is used in which the dark value and the photoelectric output of uniform illumination are written in advance as digital values.

FIG. 8 is a block diagram showing the configuration of such a focus detection device, and the difference from FIG. This is because PROMs 36 and 37 are used. In this way, by writing the necessary correction data in the PROMs 36 and 37 in advance, it is possible to eliminate the light shielding means and illumination means as described above, which simplifies the configuration, and also enables dark value and uniform illumination. The photoelectric output can be accurately measured without being affected by external objects. Further, in particular, the memory capacity of the PROM 37 can be significantly reduced compared to the case where the correction value memory 34 is used. That is, in the above correction formula (12), V _o = x _o , V _do = b _o and
Since V _So =V _SMAX −a _o , this correction formula (12) can be modified as follows.

V _MAX =V _SMAX /V _SMAX -a _{o -bo} (x _{o -bo} )...(13) Here, assuming that the number of bits for A/D conversion in the A/D conversion circuit 3 is 8 bits, V _So is up to 256
I can think of up to. Therefore, if a correction value memory 34 as shown in Fig. 6 is used, its memory capacity is 8XN.
bits (N is the number of photoelectric conversion circuits) are required. On the other hand, since a _o and b _o only require 5 bits at most, if the value of a _o is written in the PROM 37 instead of V _So , the memory capacity can be significantly reduced. Note that in this case, as in the above embodiment, V _SMAX is 8 bits.
You can fix it to 256, or change the actual value of V _SMAX to 8.
It may also be written in the PROM 37 using bits.

FIG. 9 is a block diagram showing in more detail the central processing unit 5, digital memory 4, PROM 36, 37, and display device 6 shown in FIG.
The PROM36 contains the dark time data V _D1 to V _DN (b ₁
~b _N ), but PROM37 has V _SMAX −V _S1 ~V _SMAX −
V _SN (a ₁ -a _o ) is written in advance. The method _{of calculating the correction intensity x o ′ , evaluation value |} →b _o ，V _So →a _o ，
V _So −V _Do →256−a _o −b _o ，256／V _So −V _Do →256／
256−a _o −b _o The other operations are the seventh
This is the same as explained in the figure.

FIG. 10 is a circuit diagram showing an example of the PROM drive circuit of the embodiment shown in FIG. 8. Since PROMs usually consume a large amount of current, it is not a good idea to leave them energized all the time in devices that operate on batteries, such as cameras. Therefore, in this embodiment, by switching the transistor 38 using a signal from the central processing unit 5, power from the battery 39 is transferred to the PROM only when PROM data is required.
By energizing 36 and 37, power consumption is reduced. Furthermore, when a large current is drawn from the battery 39, the voltage drop due to the internal resistance becomes large, so that the operation becomes unstable even if the current is supplied for a short time. To prevent this, the battery 39
A capacitor 40 is connected in parallel with the capacitor 40, and a sufficient charge is stored in this capacitor in advance, and the PROMs 36 and 37 are operated using the charge.

In the embodiment shown in FIG. 8, both b _o and a _o are written in the PROMs 36 and 37, respectively, but as an intermediate method, only a _o is written in the PROM 36 and 37, respectively.
, and only a light shielding means is disposed between the photographing lens 1 and the light receiving device 2, and V _Do may be measured at the time of use and stored in the correction value memory. In this case as well, since V _Do and a _O require fewer bits, the overall memory capacity can be reduced.

In each of the above examples, dark value data (V _Do or b _o ) and data under uniform illumination (V _So or a _o ) are used to generate photovoltaics based on the causes of () and () described above. Focus detection is now performed by correcting output variations. but,
When measuring the variation in output between bright and dark conditions for an actual photodiode, we found that the output V _S during bright conditions and the output V _D during dark conditions are almost similar in shape, as shown in Figure 11. There are many things. This is because among the causes of variation () and (), the difference in photoelectric conversion efficiency sensitivity of () is extremely small, and most of the factors are considered to be due to the cause of (). in this case,
The sensitivity curve of each photodiode can be represented by substantially parallel straight lines as shown in FIG. Therefore, in the above correction formula (12), V _so −V _Do =
Since it can be set as V _sMAX , it can be simplified as V _MAX =V _o −V _Do , that is, x _o ′=x _o −b _o (14).

In the third embodiment of the present invention, the above (14)
Focus detection is performed by correcting variations in photoelectric output based on the formula.

FIGS. 13 and 14 are block diagrams showing the overall circuit configuration and the circuit configuration of essential parts of this embodiment, in which the dark value data is stored in parallel with the digital memory 4 that stores the light intensity distribution data of the subject image. A correction value memory 42 is connected thereto. The operation of this embodiment will be explained below with reference to FIG. First, the state in which the charge signal (CHG) is sent from the central processing unit 5 to the light receiving device 2, that is, the first
With the gates 14-1 to 14-N conductive, the outputs of the photoelectric conversion circuits 11-1 to 11-N are A/
The D conversion circuit 3 converts the signals into digital signals and stores them at respective predetermined addresses in the correction value memory 42. At this time, the outputs of the photoelectric conversion circuits 11-1 to 11-N correspond to the dark level because the potential at the X point is approximately V _SS , and this is A/D converted to V _D1 to V _DN ,
(b ₁ to b _N ) are stored in the correction value memory 42.
Note that the measurement of this correction value may be performed every time the subject is photographed, as described above, or data measured once may be used multiple times.

Next, the photodiode 12-
The photoelectric outputs of 1 to 12-N are integrated, and the integrated value is converted into a digital signal by the A/D conversion circuit 3, and V ₁
˜V _N , (x ₁ ˜x _N ) are stored in the corresponding addresses of the digital memory 4.

After the required data is stored in the digital memory 4 and the correction value memory 42, the control circuit 5-1 stores the data in the digital memory 4 via the address register 5-2.
Integral value data x _o is set from a required address to input port A of arithmetic circuit 5-6 via input buffer 5-3, accumulator 5-4 and internal memory 5-5. Next, the correction data _bo at the corresponding address in the correction value memory 42 is set from the accumulator 5-4 to the input port B of the arithmetic circuit 5-6. Arithmetic circuit 5-6 calculates x _o '=x _{o -bo} and sets the result in accumulator 5-4.

Next, store the previous calculation result x _o-1 −b _o-1 in the internal memory 5
-5 from address a) to the input port A of the arithmetic circuit 5-6, and the contents of the accumulator 5-4 x _o -b _o =
x _o is stored in address a) of the internal memory 5-5, and is set to the input port B of the arithmetic circuit 5-6, |x _o ′−x _o ′ _-1 | is calculated, and the accumulator 5-4 Temporarily stored in . Next, from address b) of internal memory 5-5 to input port A of arithmetic circuit 5-6 |
x _o ′−x′ _o-1 ｜ Move _MAX , accumulator 5-4
|x′ _o −x′ _o-1 |, and the larger one is stored at address b) in the internal memory 5-5.

By repeating the above operation N-1 times, the finally corrected light intensity distribution data x' ₁ to x' _o is stored at address b) in the internal memory 5-5 | x' _o −x' _o-1 ｜ _MA
X will be stored. This evaluation value | x′ _o −
x′ _o-1 | Based on _MAX , the focus state can be displayed on the display device 6 via the output buffer 5-7, and the focus can be adjusted by moving the photographing lens 1 in the optical axis direction via the motor 8. .

In this embodiment, since no light shielding means or uniform illumination means are required, the configuration becomes simple, and since it is only necessary to store dark value data in one correction value memory 42, its capacity can be extremely reduced. Furthermore, since the correction calculation is simple, it can be performed at high speed. Furthermore, compared to storing dark value data in PROM in advance,
This has the advantage of being able to deal with changes over time in each photoelectric conversion circuit.

As mentioned above, when performing focus detection by correcting variations in photoelectric output using only dark value data, even though the data length of V ₁ to V _N and (x ₁ to x _N ) is 8 bits, On the other hand, if, for example, the dark value data V _Do is 31 at maximum, the correction value memory 42 requires a 5-bit input/output line, and the internal memory cell configuration also needs to be 5XN bits. but,
Five bits of data is an extremely difficult amount to handle with current memory or digital data processing technology. Therefore, in the fourth embodiment of the present invention, even if the dark value data V _Do has a data length of 5 bits, the correction value memory 42 uses a normally used 4-bit XN size memory. , its input line is connected to A/A as shown in FIG.
It is connected to the 2nd to 5th bits of the D conversion circuit 3 except for the LSB, and the output line is connected to the 1st to 4th bits. In this way, the output from the A/D conversion circuit 3 can be
If V _Do , the value read into the central processing unit 5 is
V _Do /2.

The correction operation in this case will be described below with reference to FIG. 16.

First, the central processing unit 5 converts the N dark outputs from the light receiving device 2 into digital signals with the A/D conversion circuit 3 while keeping the light receiving device 2 in a charge state, and stores them in the correction value memory 42 as V _D1 /2 to V _DN. /2. Next, release the charge state and start the integration.
Digital data of integral value corresponding to subject intensity x ₁
~x _o is stored in the digital memory 4.

After the required data is stored in the digital memory 4 and the correction value memory 42, the control circuit accesses the required address of the correction value memory 42 via the address register 5-2 and stores the correction data bn/2.
(V _D1 /2) is input to the input port B of the arithmetic circuit 5-6 via the buffer 5-3 and the accumulator 5-4.
is set, shifted one bit to the left, that is, to the LSB side, and then stored at address c) in the internal memory 5-5. Next, the corresponding address of the digital memory 4 is accessed to read the data x _o , and the arithmetic circuit 5-6
input port B of the internal memory 5.
Calculation circuit 5 calculates (b _o /2) x 2 from address -5 c)
-6 input port A, x′ _o = x _o −
(bn/2)×2 and calculate the accumulator 5-4
Set to .

Next, x'o _-1 , which was previously obtained from address a) of internal memory 5-5, is set to input port A of arithmetic circuit 5-6, and _x'o is set to address a) of internal memory 5-5. At the same time, it is stored in the input port B of the arithmetic circuit 5-6, and the arithmetic circuit 5 calculates |x′ _o −x′ _o-1 |.
-6 input port B. After that, |x′ _o −x′ _o-1 | _MAX at address b) of the internal memory 5-5 is set to the input port A of the arithmetic circuit 5-6, their magnitudes are compared, and the larger one is stored in the internal memory. The b) address of 5-5 is stored. By repeating this N-1 times, the evaluation value |x′ _o −x′ _o-1 | _MAX can be obtained.

Here, the value of (b _o /2) - 2 does not necessarily match bn; for example, in the case of bn = 5, (bn/2) ×
2 becomes 4. i.e. V _Do as above
When using the correction value in the form of V _Do /2, there is a possibility that an error of 1LSB may occur, but from the perspective of the overall correction accuracy, this effect is very small and compared to when handling 5-bit data. Extremely advantageous.

According to this embodiment, the correction value memory 42 has the advantage of requiring a small capacity and the calculation word length being short.

As described above, in the present invention, focus detection is performed by correcting variations in the characteristics of the plurality of photoelectric conversion circuits that constitute the light receiving device, so that focus detection can be performed with high precision even for objects with low contrast. Can be done.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of a conventional focus detection device, FIG. 2 is a circuit diagram of the light receiving device shown in FIG. 1, FIG. 3 is a signal waveform diagram for explaining its operation, and FIG. The figure is a diagram for explaining variations in the characteristics of the photoelectric conversion circuit that constitutes the light receiving device shown in Figure 1, and Figure 5 is a diagram for explaining the correction method applied in the focus detection device of the present invention. , FIG. 6 is a block diagram showing the configuration of an example of the focus detection device of the present invention, FIG. 7 is a block diagram showing the detailed configuration of main parts for explaining its operation, and FIG. 8 is a block diagram showing the configuration of an example of the focus detection device of the present invention. A block diagram showing the configuration of another example of the focus detection device,
Figure 9 is a block diagram showing the detailed configuration of the main parts to explain its operation, and Figure 10 is shown in Figure 8.
Circuit diagram showing an example of a PROM drive circuit, No. 11
The figure is a diagram comparing the dark level of each photoelectric conversion circuit that makes up the light receiving device and the light level during uniform illumination. Figure 12 is a diagram that also shows the sensitivity characteristics of the photodiode that makes up each photoelectric conversion circuit. , 1st
FIG. 3 is a block diagram showing the configuration of still another example of the focus detection device of the present invention, FIG. 14 is a block diagram showing the detailed configuration of the main part for explaining its operation, and FIG. 15 is a block diagram showing the configuration of still another example of the focus detection device of the present invention. FIG. 16 is a block diagram showing the detailed structure of the main part of still another example of the focus detection device, and FIG. 16 is a block diagram showing the detailed structure of the main part for explaining its operation. 1...Photographing lens, 2...Light receiving device, 3...
A/D conversion circuit, 4...Digital memory, 5...
Central processing unit, 6...Display device, 7...Motor drive circuit, 8...Motor, 11-1 to 11-N...
Photoelectric conversion circuit, 12-1 to 12-N... photodiode, 31... light shielding means, 32... lighting means,
33, 34... Correction value memory, 36, 37...
PROM.

Claims (1)

[Scope of Claims] 1. A light receiving device comprising a plurality of integral type photoelectric conversion circuits each having a light receiving element that receives a small common portion of an object image formed by an optical system, and a plurality of photoelectric outputs from this light receiving device. an analog-to-digital conversion circuit that converts the integral value of into a digital signal;
a digital memory for storing digital signals respectively corresponding to integral values from the plurality of photoelectric conversion circuits according to the light intensity distribution of the object image from the analog-to-digital conversion circuit; A focus detection device that calculates a plurality of digital signals based on a predetermined evaluation function to detect a focused state of the object image, comprising: a light blocking means that selectively blocks incident light to the light receiving device; An illumination means for selectively and uniformly illuminating the light receiving device is provided, and two correction value memories are connected in parallel with the digital memory, and a plurality of correction value memories of the light receiving device are provided when the light blocking means is activated. Each of the photoelectric outputs is converted into a digital signal by the analog-to-digital conversion circuit and stored as dark value data in one of the correction value memories, and the plurality of photoelectric outputs of the light receiving device are detected while the illumination means is activated. The dark value data and light value data stored in the correction value memory are stored as light value data in the other correction value memory, and the digital signal corresponding to the light intensity distribution of the object image stored in the digital memory is corrected. 1. A focus detection device configured to detect a focused state of an object image. 2. A light receiving device consisting of a plurality of integral type photoelectric conversion circuits each having a light receiving element that receives a small common portion of an object image formed by an optical system, and a digital signal representing the integral value of a plurality of photoelectric outputs from this light receiving device. an analog-to-digital conversion circuit that converts the
a digital memory for storing digital signals respectively corresponding to integral values from the plurality of photoelectric conversion circuits according to the light intensity distribution of the object image from the analog-to-digital conversion circuit; In a focus detection device that calculates a plurality of digital signals based on a predetermined evaluation function to detect a focused state of the object image, the plurality of photoelectric outputs are detected in a state where no light is incident on the light receiving device. A first non-volatile storage means that stores each digitized value in advance as dark value data, and a value obtained by digitizing the difference between each photoelectric output from the maximum value of the photoelectric output when the light receiving device is uniformly illuminated. and a second non-volatile storage means in which the data is stored in advance as light value data, and the dark value data and the light value data stored in advance in the first and second non-volatile storage means are used to store the dark value data and the light value data in advance in the digital memory. A focus detection device, characterized in that the device is configured to detect a focused state of an object image by correcting a digital signal according to a light intensity distribution of the stored object image. 3. The combination according to claim 2, characterized in that the maximum value of the photoelectric output when the light receiving device is uniformly illuminated corresponds to the maximum value of the digital signal in the analog-to-digital conversion circuit. Focus detection device. 4. A light receiving device consisting of a plurality of integral type photoelectric conversion circuits each having a light receiving element that receives a small common portion of an object image formed by an optical system, and a digital signal representing the integral value of a plurality of photoelectric outputs from this light receiving device. an analog-to-digital conversion circuit that converts the
a digital memory for storing digital signals respectively corresponding to integral values from the plurality of photoelectric conversion circuits according to the light intensity distribution of the object image from the analog-to-digital conversion circuit; A focus detection device that calculates a plurality of digital signals based on a predetermined evaluation function to detect a focused state of the object image, further comprising: a light blocking means for selectively blocking light incident on the light receiving device; , a correction value memory connected in parallel to the digital memory and a value obtained by digitizing the difference between each photoelectric output from the maximum value of the photoelectric output when the light receiving device is uniformly illuminated is stored in advance as light value data. nonvolatile storage means, each of the plurality of photoelectric outputs of the light receiving device in a state in which the light shielding means is activated is converted into a digital signal by the analog-to-digital conversion circuit, and is stored in the correction value memory as dark value data. and correct a digital signal according to the light intensity distribution of the object image stored in the digital memory using the dark value data stored in the correction value memory and the light value data stored in advance in the nonvolatile storage means. 1. A focus detection device configured to detect a focused state of an object image. 5. The combination according to claim 4, characterized in that the maximum value of the photoelectric output when the light receiving device is uniformly illuminated corresponds to the maximum value of the digital signal in the analog-to-digital conversion circuit. Focus detection device. 6 A light receiving device consisting of a plurality of integral type photoelectric conversion circuits each having a light receiving element that receives a small common portion of an object image formed by an optical system, and a digital signal representing the integral value of a plurality of photoelectric outputs from this light receiving device. an analog-to-digital conversion circuit that converts the
a digital memory for storing digital signals respectively corresponding to integral values from the plurality of photoelectric conversion circuits according to the light intensity distribution of the object image from the analog-to-digital conversion circuit; In a focus detection device configured to detect a focused state of the object image by calculating a plurality of digital signals based on a predetermined evaluation function, a correction value memory is provided connected in parallel with the digital memory, and the correction value memory is connected in parallel with the digital memory. A plurality of photoelectric outputs immediately before the start of integration are converted into digital signals by the analog-to-digital conversion circuit and stored as dark value data in the correction value memory while the object image is projected onto the light receiving device, and the correction value is stored in the correction value memory. 1. A focus detection device for detecting a focused state of an object image by correcting a digital signal corresponding to a light intensity distribution of the object image stored in the digital memory using dark value data stored in the memory. 7 A light receiving device consisting of a plurality of integral type photoelectric conversion circuits each having a light receiving element that receives a small common portion of an object image formed by an optical system, and a digital signal representing the integral value of a plurality of photoelectric outputs from this light receiving device. an analog-to-digital conversion circuit that converts the
a digital memory for storing digital signals respectively corresponding to integral values from the plurality of photoelectric conversion circuits according to the light intensity distribution of the object image from the analog-to-digital conversion circuit; In a focus detection device configured to detect a focused state of the object image by calculating a plurality of digital signals based on a predetermined evaluation function, the focus detection device includes a plurality of bits smaller than the number of bits of the digital memory in parallel with the digital memory. A plurality of correction value memories are connected to each other, and while the object image is projected onto the light receiving device, a plurality of photoelectric outputs immediately before the start of integration are each converted into digital signals by the analog-to-digital conversion circuit, and the digital signals are converted into digital signals. 1/2k (k is a positive integer) of 1/2k (k is a positive integer) is stored in the correction value memory as dark value data, and the light intensity of the object image is stored in the digital memory based on the dark value data stored in this correction value memory. A focus detection device that detects a focused state of an object image by correcting a digital signal according to distribution.