JPH01130630A - Rds receiver - Google Patents

Abstract

PURPOSE:To decrease the time till other station is newly received by bringing station discrimination operation immediately after a phase difference detection circuit detects a locked PLL. CONSTITUTION:The alternative frequency AF is searched by setting a data corresponding to a frequency of one station in an AF list stored in a memory 14 to a programmable divider 9 of a PLL channel selection circuit, the oscillated frequency of a voltage controlled oscillator 8 is varied and an RDS receiver is tuned to the frequency of one station. When the PLL channel selection circuit is locked, a signal representing the lock state is fed from a phase difference detection circuit 13 to a control circuit 15, which enters the station discrimination operation, and when a signal representing the presence of a station is generated from a station detection circuit 7, the AF search is stopped to apply the consecutive reception of the station. Thus, the time till other station is received after the reception frequency is changed is decreased.

Description

[Detailed Description of the Invention] (a) Industrial Application Field The present invention provides digital data such as channel selection and traffic information to FM.
The present invention relates to a receiver for RDS broadcasting that employs a broadcasting method that multiplexes radio signals. To explain in more detail, it is an automatic tracking function that uses the RDS data's alternative frequency list and program identification code to automatically select other broadcasting stations that are transmitting the same program when the receiving station's electric field strength becomes weak. The present invention relates to an RDS receiver comprising:

(b) Conventional technology In European radio broadcasting, many broadcasting stations often form a network and broadcast the same programs. At times like this, the magazine r Nikkei Electronics J1987. ．． 8
．． As shown in No. 24, pages 201 to 217, R
With DS broadcasting, you can always receive highly sensitive broadcasts due to the automatic tracking function. To explain a little about this automatic tracking function,
The alternative frequency (A
An alternative frequency list (AF list) is created based on F) and stored in memory. This AF list sends a frequency list of up to 25 broadcast stations that are transmitting the same program.

When the electric field strength of the broadcasting station currently being received decreases and becomes insufficient for reception, the user switches to another broadcasting station on the previously stored AF list and receives the signal. Next, the electric field strength of the newly received station is checked, and if the electric field strength does not meet the reception conditions, another station is selected, and a broadcasting station with strong radio waves is selected from the AF list and received.

When the receiving frequency is changed, the station determination circuit checks whether the tuner section is picking up a station. Conventionally, the determination was made after a predetermined time period set according to the operating time of the tuner section, etc. was.

(c) Problems to be solved by the invention When the electric field strength of the receiving station weakens, the automatic tracking function automatically changes the receiving frequency, but when determining whether the tuner section has caught the station, it is difficult to receive the broadcast. Since the decision was made after waiting a predetermined amount of time, it took time to receive a different station after changing the receiving frequency. In particular, if there are consecutive stations that do not meet the reception conditions due to the order of selection,
It took a very long time.

Therefore, an object of the present invention is to shorten the time required from changing the receiving frequency to receiving another station.

(d) Means for Solving the Problems The present invention has been made in view of the above-mentioned points, and includes detection for detecting that a phase error signal is no longer generated from a phase comparator constituting a PLL tuning circuit. The present invention is characterized in that a circuit is provided, and the determination operation of the receiving station is started in response to the generation of the output signal of the detection circuit.

(*) Effect According to the present invention, when the level judgment circuit detects insufficient electric field strength of the received radio wave, another frequency is selected from the alternative frequency list in the memory and the frequency division data of the PLL tuning circuit is changed. to receive radio waves from a station corresponding to the above frequency. Next, when locking of the PLL tuning circuit is detected by the output signal of the phase difference detection circuit, the station detection circuit determines whether there is a station at the above frequency. Therefore, the time required from starting the alternative frequency selection operation until the station detection circuit makes a decision can be significantly shortened.

(F) Embodiment The configuration of an embodiment of the present invention is shown in FIG. 1. In the figure, (1) is a high frequency amplification circuit, (2) is a mixing circuit, and (3)
) is an intermediate frequency amplifier circuit, (4) is a detection circuit, (5) is an RDS decoder that decodes the received RDS data and an error correction circuit that corrects errors in the decoded data, and (6) is a received radio wave. (7) is a station detection circuit that determines the output signal level of the level detection circuit (6) and generates a station detection signal;
8) is the voltage controlled oscillator, (9> is the programmable divider, (10) is the reference oscillator, and (11) is the phase of the divided output of the programmable divider (9) and the reference oscillator (1).
(12) is a low-pass filter, (13) inputs the output signal of the phase comparator (11), and compares the phase of the output of the programmable divider (9) with the reference. A phase difference detection circuit outputs the phase difference with the output of the oscillator (10), (14) is a memory that stores an AF list created based on RDS data, (15)
) creates an AF list based on the RDS data, stores it in the memory (14), inputs the outputs of the phase difference detection circuit (13), level detection circuit (6) and station detection circuit (7), and stores it in the memory. This is a control circuit that selects the frequency of another station from the AF list of , and changes the frequency division data of the PLL channel selection circuit.

Next, the operation of the embodiment will be explained. When an RDS broadcast is received, the transmitted RDS data is input to the RDS decoder and error correction circuit (5), an AF list is created inside the control circuit (15) based on the obtained data, and the AF list is stored in the memory.
14).

Also, the electric field strength of the receiving station is determined by the level detection circuit (
6), and its output is applied to the control circuit (15). Assuming that the electric field strength of the receiving station has decreased and the output of the level detection circuit (6) has become small, this is detected by the control circuit (15) and an AF search operation is started. In the AF search operation, data corresponding to the frequency of one station in the AF list stored in the memory (14) is sent to the programmable divider (
9). Depending on the data settings, the oscillation frequency of the voltage controlled oscillator (8) changes, and the RDS receiver is tuned to the frequency of the one station. When the tuning operation is completed and the PLL tuning circuit is locked, a phase error signal is no longer generated from the phase ratio 1 aperture circuit (11), so a signal indicating the locked state is sent from the phase difference detection circuit (13) to the control circuit. (15) is applied. Therefore, the control circuit (15) enters the station determination operation, and the station detection circuit (7)
The output signal of is determined.

As shown in FIG. 2, the phase difference detection circuit (13) includes an OR gate (16) that takes the OR of the output signal of the phase comparator (11).
), a D-FF<17) in which the output of the OR gate (16) is applied to the D input, and an output of the D-FF (17) in the S
R S -F F (18) applied to the input. Therefore, the phase difference is large and the OR gate <
When the pulse width of the error signal generated at the output terminal of D-FF (16) is large, the output of D-FF (17) becomes rHJ, and R5-
The output of FF (18) also becomes rH. Also, when the PLL tuning circuit locks, the phase difference becomes small or zero, and the pulse width of the error signal becomes small, the output of the D-FF (17) becomes r
L, and RS -F F (18) is no longer set. RS-FF(18) has a reset signal of a predetermined period applied to the R terminal, so D-FF(18)
When the output of 7) becomes r L , the reset state is maintained in response to the reset signal, and it is detected that the PLLI station circuit is locked.

A signal indicating a locked state is generated from the phase difference detection circuit (13), and a signal rH, indicating the presence of a station is generated from the station detection circuit (7).
When this occurs, the AF search operation is stopped and continuous reception of that station is performed. Further, when a signal "L" indicating the absence of a station is generated from the station detection circuit (7), data corresponding to the frequency of a station in another AF list is set in the programmable divider (9), and the AF search operation is performed. continues.

This AF search operation is performed when the output of the station detection circuit (7) is rH.
” can be continued until it becomes.

As mentioned above, if the PLL tuning circuit detects that it is locked and immediately performs the station detection operation, the time required from changing the frequency division ratio data to detecting the station can be significantly shortened. .

(g) Effects of the Invention According to the present invention, when the received electric field strength becomes weak, the automatic tracking function automatically changes the receiving frequency according to the AF list, but when determining the electric field strength of a new receiving station, the phase difference detection circuit When it is detected that the PLL is locked, the station determination operation is immediately started, so the time required to receive a new station is shortened.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a specific example of the phase difference detection circuit. (5)...RDS decoder and error correction circuit, (6
)...level detection circuit, (7)...station detection circuit,
(9)...Programmable divider, (11)...
・Phase comparator, (13)...phase difference detection circuit, (
14)...control circuit, (15)...memory.

Claims (1)

[Claims] (1) A voltage controlled oscillator, a programmable divider that divides the output signal of the voltage controlled oscillator, a phase comparator that compares the phase of the divided output of the programmable divider with the phase of the output of the reference oscillator, and the phase comparator. a PLL channel selection circuit including a low-pass filter that passes an output and controls the voltage controlled oscillator; an RDS decoder that decodes RDS data multiplexed and transmitted on a carrier wave of FM radio broadcast; and an alternative included in the RDS data. a memory for storing a frequency list; a means for changing the division ratio of the programmable divider to a value corresponding to an alternative frequency in response to a decrease in the electric field strength of a received signal; and a detection means for detecting that the
An RDS receiver characterized in that it starts a determination operation of a receiving station.