JP2674650B2 - Radio data receiver - Google Patents

Description

TECHNICAL FIELD The present invention relates to a receiver of a radio data system (hereinafter referred to as RDS).
Referred to as a receiver). BACKGROUND ART When a broadcast station broadcasts, broadcast-related information such as information related to the program content is transmitted as data by multiplex modulation, and a desired program content can be selected on the receiving side based on the demodulated data. Radio data system (RD)
S) there. In this radio data system, 57 kHz, which is the third harmonic of the 19 KHz stereo pilot signal outside the frequency band of the FM modulation wave, is used as a subcarrier, and the subcarrier is filtered and biphase-coded. The radio data signal is amplitude-modulated by a data signal indicating information related to the broadcast such as the content, and the amplitude-modulated subcarrier is frequency-modulated to the main carrier for broadcasting. However, not all broadcasting stations broadcast such radio data at the same time as program programs, so it is desirable that RDS broadcasting stations can be selected quickly. SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a radio data receiver capable of quickly selecting a radio data broadcasting station. The radio data receiver of the present invention includes a demodulation means for reproducing a data signal from a received radio data broadcast wave and outputting the data signal in synchronism with the data signal; Frequency adjustment means for sweeping the reception frequency, means for generating a station detection signal by detecting that a reception signal of a predetermined level or higher is obtained, and synchronization when demodulation means is synchronized with the data signal It is characterized in that it has means for generating a detection signal, and means for ending the sweep of the frequency adjusting means in response to the station detection signal and the synchronization detection signal during the sweep period of the frequency adjusting means. Embodiment Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. In the RDS receiver as one embodiment of the present invention shown in FIG. 1, a desired station is selected by the front end 2 for the FM multiplex broadcast wave received by the antenna 1 and converted to an intermediate frequency (IF). After that, it is supplied to the FM detector 4 via the IF amplifier 3. The front end 2 obtains the local oscillation signal to the mixer 2b by the PLL synthesizer method using the PLL circuit 2a including the programmable frequency divider, and the frequency division ratio of the programmable frequency divider is controlled by the controller 14 described later. By doing so, the channel selection operation is performed. The detection output of the FM detector 4 is supplied to an MPX (multiplex) demodulation circuit 5 and, in the case of stereo broadcasting, separated into L (left) and R (right) channel audio signals. When the detection output of the FM detector 4 passes through the filter 6, a 57 KHz subcarrier amplitude-modulated by the biphase-coded data signal, that is, a radio data signal is extracted and demodulated by the PLL circuit 7. . This demodulated output is supplied to a digital (D) PLL circuit 8 and a decoder 9.
Supplied to In the D-PLL circuit 8, a clock for data demodulation is generated based on the demodulated output of the PLL circuit 7. The generated clock is supplied to the gate circuit 10. The lock detection circuit 11 detects that the D-PLL circuit 8 has locked, generates a lock detection signal, and supplies this to the gate circuit 10 to control the circuit 10 to open. The lock detection signal is also supplied to the AND circuit 17 as a synchronization detection signal indicating that synchronized demodulated data is obtained. In the decoder 9, the bi-phase coded data signal, which is the demodulated output of the PLL circuit 7, is output to the D-PLL circuit 8.
It is decoded in synchronization with the clock generated in. As shown in FIG. 2, the output data of the decoder 9 is a 104-bit group unit consisting of 4 blocks of 26-bit structure, and is sequentially supplied to the group / block synchronization & error detection circuit 12. The group / block synchronization & error detection circuit 12 synchronizes the group with the block based on the 10-bit offset word assigned to the 10-bit check word of each block, and 16-bit information based on the check word. Word error detection is performed. Then, the error-detected data is supplied to the controller 14 after the error is corrected by the error correction circuit 13 at the next stage. The controller 14 is composed of a microcomputer and takes in the code information of each block in the radio data sequentially input in units of groups, that is, the radio data information related to the program content of the broadcasting station currently being received and stores it in the memory 15. Keep it. In addition, based on the sweep channel selection command from the sweep mode button 23 of the operation unit 16, the front end 2
The tuning operation is performed by controlling the reception frequency data value that determines the frequency division ratio of the programmable frequency divider (not shown) of the PLL circuit 2a that constitutes a part of the. The reception frequency data value is, for example, the count value of the counter. On the other hand, the station detection circuit 20 generates a station detection signal when it detects an IF signal of a predetermined level or higher in the IF amplifier 3,
This station detection signal is supplied to the AND circuit 17. The AND circuit 17 takes the logical sum of the output signals of the lock detection circuit 11 and the station detection circuit 20, and the output signal of the AND circuit 17 is supplied to the controller 14. The memory 15 includes a non-volatile RAM in which data such as reception frequency data is written and a ROM in which programs and data are written in advance. In addition to the sweep mode button 23 described above, the operation unit 16 has an RDS reception command button 2
4, operation buttons such as preset buttons (not shown) are provided. In the RDS receiver having such a configuration, when the sweep mode button 23 of the operation unit 16 is operated, the operation mode becomes the sweep mode. The operation in the sweep mode will be described with reference to the operation flow chart of the processor in the controller 14 shown in FIG. In the sweep mode, the processor first changes the reception frequency data value supplied from the controller 14 to the PLL circuit 2a of the front end 2 by a predetermined value (step 51). At this time, it is determined whether or not an RDS broadcast reception command is issued by operating the RDS reception button 24 (step 5
2) If the RDS broadcast reception command is not issued, it is judged whether or not the station detection signal is generated from the station detection circuit 20 (step 53). As the reception frequency data value changes, the frequency division ratio of the frequency divider of the PLL circuit 2a changes in a predetermined step, and the reception frequency rises by, for example, 100 KHZ. When the broadcast wave cannot be received at this new reception frequency, the station detection signal is not generated, so it is determined whether or not a predetermined time has elapsed since the reception frequency data value was changed (step 5).
Four). When the predetermined time has elapsed, the process returns to step 51 and the reception frequency is changed again. Therefore, when the broadcast wave cannot be received, the reception frequency changes within the reception frequency band at predetermined time intervals, for example, in units of 100 KHZ. The predetermined time is a little longer than the time until the station detection signal by the broadcast wave is obtained when the broadcast wave can be received after the reception frequency data value is changed. On the other hand, when a new broadcast wave is received, the IF signal level rises above a predetermined level and the station detection circuit 20 generates a station detection signal. The received frequency data value is held according to this station detection signal (step 5
7), end the sweep operation. On the other hand, when an RDS broadcast reception command is generated by operating the RSD reception button 24 in this sweep mode, the RDS broadcast reception is possible. In this state, if the received broadcast wave is a broadcast wave containing radio data, the radio data signal is extracted from the detection output signal of the FM detector 4 through the filter 6. This radio data signal is demodulated by the PLL circuit 7 and supplied to the D-PLL circuit 8 and the decoder 9. D
-When a clock for data demodulation is generated in the PLL circuit 8 based on the demodulation output of the PLL circuit 7, the D-PLL circuit 8
Is locked and the demodulation output can be read at the synchronized timing.
The lock detection signal is output from 11. This lock detection signal turns on the gate circuit 10 and is supplied to the AND circuit 17 as a synchronization detection signal. When the station detection signal and the synchronization detection signal are simultaneously supplied to the AND circuit 17, the output level of the AND circuit 17 is inverted from the low level to the high level, and the high level output is supplied to the controller 14 as the sweep stop signal. The processor in the controller 14 determines whether or not the sweep stop signal is generated in the RDS broadcast receivable state (step 55). If the sweep stop signal is generated, the process proceeds to step 57 and the reception frequency data is received. The sweep operation is terminated by holding the value. When only the station detection signal is generated and the synchronization detection signal is not generated, the AND circuit 17 has a low level output, so that the processing proceeds to step 56, and after a predetermined time has elapsed, the content of the reception frequency data changes and the reception frequency changes. In the above embodiment, the state in which the data demodulation means is synchronized with the data signal is D-PL.
Although it is detected from the locked state of the L circuit 8, it is not limited to this,
It may be judged from the fact that the group / block synchronization in the group / block synchronization & error detection circuit 12 has been established. As described above, in the radio data receiver of the present invention, it is detected that the frequency sweep is started, the broadcast wave is received, and the data signal extracted from the received broadcast wave is synchronized. Sometimes the frequency sweep operation ends, so
Radio data broadcasting stations can be selected quickly and reliably.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a diagram showing a baseband coding structure of a radio data signal, and FIG. 3 is a controller in the receiver of FIG. It is a flowchart which shows operation | movement of the processor in. Description of symbols of main parts 1 ... Antenna 2 ... Front end, 4 ... FM detector 5 ... Multiplex demodulation circuit 8 ... Digital PLL circuit 9 ... Decoder, 14 ... Controller 20 ... Station detection circuit

   ────────────────────────────────────────────────── ─── Continuation of front page    (72) Inventor Junichi Nishida               Saitama Prefecture Kawagoe City Oji Yamada 25 Nishimachi 1               Pioneer Corporation Kawagoe Factory                (56) References JP-A-56-24824 (JP, A)                 Nikkei Electronics August 24, 1987               Japanese issue, pages 202-217

Claims (1)

(57) [Claims] A radio data receiver capable of receiving a radio data broadcast wave including a data signal, the demodulation means for reproducing the data signal from the received radio data broadcast wave and outputting in synchronization with the data signal, When the sweep mode is designated, frequency adjusting means for sweeping the reception frequency within the reception frequency band, means for detecting that a reception signal of a predetermined level or higher is obtained, and generating a station detection signal, the demodulation means In which a synchronization detection signal is generated when synchronization is achieved with the data signal, and the sweep of the frequency adjustment means is ended in response to the station detection signal and the synchronization detection signal in the sweep period of the frequency adjustment means. A radio data receiver comprising: