JPH01129975U - - Google Patents
Info
- Publication number
- JPH01129975U JPH01129975U JP1988025554U JP2555488U JPH01129975U JP H01129975 U JPH01129975 U JP H01129975U JP 1988025554 U JP1988025554 U JP 1988025554U JP 2555488 U JP2555488 U JP 2555488U JP H01129975 U JPH01129975 U JP H01129975U
- Authority
- JP
- Japan
- Prior art keywords
- delay element
- clock
- control means
- video information
- output period
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000001934 delay Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
- 101150110971 CIN7 gene Proteins 0.000 description 1
- 101100286980 Daucus carota INV2 gene Proteins 0.000 description 1
- 101150110298 INV1 gene Proteins 0.000 description 1
- 102100029469 WD repeat and HMG-box DNA-binding protein 1 Human genes 0.000 description 1
- 101710097421 WD repeat and HMG-box DNA-binding protein 1 Proteins 0.000 description 1
- 101100397044 Xenopus laevis invs-a gene Proteins 0.000 description 1
- 101100397045 Xenopus laevis invs-b gene Proteins 0.000 description 1
Landscapes
- Transforming Light Signals Into Electric Signals (AREA)
- Television Signal Processing For Recording (AREA)
- Processing Of Color Television Signals (AREA)
- Pulse Circuits (AREA)
- Networks Using Active Elements (AREA)
Description
第１図はこの考案のＣＣＤ遅素子の１実施例を
示すブロツク図、第２図は、第１図の素子の動作
を示すタイムチヤート、第３図は、この考案の別
の実施例を示すブロツク図、第４図は、第３図の
素子の動作を示すタイムチヤート、第５図は、従
来の遅延素子のブロツク図である。
１００，１００′，１００″……ＣＣＤ遅延素
子、５５……タイミング制御部、ＦＦ……フリツ
プフロツプ回路、ＡＮＤ１〜ＡＮＤ３……アンド
回路、ＩＮＶ１，ＩＮＶ２……インバータ、ＯＲ
……オア回路。
Fig. 1 is a block diagram showing one embodiment of the CCD delay element of this invention, Fig. 2 is a time chart showing the operation of the element of Fig. 1, and Fig. 3 shows another embodiment of this invention. FIG. 4 is a time chart showing the operation of the device shown in FIG. 3, and FIG. 5 is a block diagram of a conventional delay device. 100, 100', 100''...CCD delay element, 55...timing control section, FF...flip-flop circuit, AND1 to AND3...AND circuit, INV1, INV2...inverter, OR
...OR circuit.
Claims (1)
の信号出力期に対応して、前記遅延素子のシフト
用クロツクパルスを制御する、クロツク制御手段
を備えたことを特徴とするＣＣＤ遅延素子。 (2) クロツク制御手段は、映像情報以外の信号
出力期に、クロツクパルスを出力しない実用新案
登録請求の範囲第１項記載のＣＣＤ遅延素子。 (3) クロツク制御手段は、映像情報以外の信号
出力期に、クロツクパルスのクロツク周波数を変
化させる実用新案登録請求の範囲第１項記載のＣ
ＣＤ遅延素子。[Claims for Utility Model Registration] (1) In a delay element that delays a video signal, a shift clock pulse of the delay element is controlled in response to a signal output period other than video information included in the video signal at regular intervals. A CCD delay element characterized in that it is equipped with a clock control means. (2) The CCD delay element according to claim 1, wherein the clock control means does not output clock pulses during the output period of signals other than video information. (3) The clock control means changes the clock frequency of the clock pulse during the output period of signals other than video information.
CD delay element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988025554U JPH01129975U (en) | 1988-02-25 | 1988-02-25 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988025554U JPH01129975U (en) | 1988-02-25 | 1988-02-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01129975U true JPH01129975U (en) | 1989-09-05 |
Family
ID=31246390
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1988025554U Pending JPH01129975U (en) | 1988-02-25 | 1988-02-25 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01129975U (en) |
-
1988
- 1988-02-25 JP JP1988025554U patent/JPH01129975U/ja active Pending
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