JPH01125639A - Disk cache control system - Google Patents

Abstract

PURPOSE:To eliminate an access action end waiting state by retrieving the data to be erased by a specific method when the cache data written by a write- back system is erased. CONSTITUTION:A cache memory 14 is added to a CPU 10a containing a primary memory part 12 as an external memory area. The transfer of data is controlled by a cache control part 18 between the part 12 of the memory 14 and magnetic disks 16a-16d. When a host CPU 10a detects the mishit of the memory 14 during accesses to the disks 16a-16d, the part 18 retrieves a cache managing table 26, a directory table 32 and an action flag 34 set on a cache information table 24. Then data are written into a disk equal to an access object disk by a write-back system and at the same time the cache data having the lowest using frequency is defined as the erasion data of the memory 14. Thus an access waiting state is omitted and the processing performance can be improved in a disk cache control system.

Description

[Detailed description of the invention] [Requires 1N] Regarding a disk cache control method that erases cache data in order to secure a new data storage area in the event of a cache memory miss, erase ffi of cache data written in a write-back method. When searching for the least frequently used cache data to be erased, the data to be erased was written using the write-back method and was different from the disk to be accessed. In this case, the cache data that is used less frequently is sequentially searched for deletion, and when it is determined that it has been written in the write-back method and is the same as the disk to be accessed,
This data to be erased is written to the disk and then erased.

[Industrial Application Field] The present invention relates to a cache memory as an external storage area outside the main storage area of a host device using a disk cache control method that erases cache data in order to secure a new data storage area when a cache memory miss occurs. In information processing equipment equipped with a storage system, data on frequently used magnetic disks can be stored in cache memory as needed (staged), and the cache memory can be referenced and the corresponding cache data can be read by read access from the host device. This enables high-speed data access processing.

On the other hand, when the cache memory is referenced by an access from a host device and the corresponding data is not stored,
That is, in the event of a miss, an access operation is executed based on data written from the magnetic disk to a free area of the cache memory.

If there is no free space in the cache memory at the time of this miss, a new storage area is secured by erasing the least frequently used data stored in the cache memory.

[Prior Art] FIG. 4 is an explanatory diagram of a conventional system equipped with a disk cache memory.

In FIG. 4, 10a is a CPU as a host device;
2 is a main storage section of the CPU 10a.

For example, four #1 to #4 magnetic disks 168 to 16d are connected to CPLJloa via a cache control unit 18 and a controller 20, and the cache memory 14
is connected to CPLJloa via the cache control unit 18.

FIG. 5 is an operational flow diagram showing an outline of cache control in the conventional system shown in FIG. 4.

First, when a disk access is received from the CPU 10a, for example, access to the #1 magnetic disk 18a, in step S1, a bus with the #1 magnetic disk 18a is acquired in step S2 and the disk is activated, and then, in step S3, the cache memory 14 is accessed. After performing the hit determination, in the next step S4, it is determined whether it is a read access or a write access, and if it is a read access, step S
Proceed to step 5 to determine whether it is a human or not.

If it is a hit, the process advances to step S8, where the corresponding data is read from the cache memory 14, transferred to CPLJlo, and the read data is executed.

On the other hand, if there is a miss, cache acquisition processing is executed in step S6.

In this cache acquisition process, if there is free space in the cache memory 14, the process proceeds to step S5 and the #1 magnetic disk 1
After reading the data from 8a and writing it into the free area of the cache memory 14, in step S8 the data is read from the cache memory 1.
4 and transfers it to CPLJloa. If there is no free space in the cache memory 14, the least frequently used cache data is erased to secure a new storage area, then disk data is written in step S7, and the process proceeds to a read operation in step S8.

By the way, there are two methods for storing data in the cache memory 14 (staging methods): a write-back method and a write-through method. Therefore, in the process of erasing cache data to secure a new storage area, the content of the process differs depending on whether the data to be erased is written in the write-back method or the write-through method.

First, to erase cache data written in the write-through method, since the same data has already been written to a specific magnetic disk, it is sufficient to simply erase the cache data.

On the other hand, in the write-back method, since data is written only to the cache memory, the data to be erased must be written to the disk and then erased.

The details of data writing to the cache memory 14 by the write-through method and the write-back method will become clear from the operational flow when write access is determined in step S5 of FIG. 5.

That is, when write access is determined in step S5,
In step S9, it is determined whether or not there is a hit. If it is a hit, the process proceeds to step S10 to determine whether the write-back method or the write-through method is used. If the write-through method is the write-through method, the same data is stored in both the disk and cache memory in step S11. Write.

If it is the write-back method, the process advances to step S12 and data is written only to the cache memory 14.

On the other hand, if a miss is determined in step S10, the process proceeds to step S13, where the method is similarly determined, and if it is the write-through method, data is written to the disk in step 314. If the write-back method is used, cache acquisition processing is executed in step S15, and data is written to the cache memory 14 in step S16.

The cache acquisition process in step S15 is performed in step S6.
5! ! ! Similarly, if there is free space in the cache memory, data is written to the free space, and if there is no free space, the least frequently used cache data is erased and a new storage space is secured to write data. At this time, if the cache data in the area to be erased is written in the write-back method, the data to be erased is written to the disk and then erased.

As is clear from such write access control of the cache memory, when erasing cache data written in the write-back method, it is necessary to erase the data to be erased after writing it to the disk.

[Problems to be Solved by the Invention] However, when writing to a disk when erasing cache data written in the write-back method, there are cases where the magnetic disk to which data is written is in the process of being accessed. Data to be erased from the cache memory cannot be written to the magnetic disk until the end of the operation.

For example, if the #1 magnetic disk 18a is accessed in a read access and the magnetic disk on which the cache data to be erased is written is the #2w1 disk, and the #2 magnetic disk 18b is in operation at this time, #2! It is necessary to wait for the end of the operation of the magnetic disk 18b to acquire the bus, and then write the cache data to be erased onto the #2 magnetic disk 18b.

For this reason, it takes time to erase the cache data written in the write-back method, and the CPU 10a cannot execute the read command until the cache erase process is completed, resulting in a problem that the processing performance deteriorates.

On the other hand, #2 writes the cache data to be erased.
When the vi1 disk 18b is stopped, there is no need to end the operation, but #1 acquired in the first access process
The bus of the magnetic disk 18a is released and the bus of the #2 magnetic disk 18b is acquired, and then the data to be erased must be written to the disk. There was a problem in that this process took a long time, leading to a decrease in processing performance.

The present invention has been made in view of such conventional problems, and provides a disk cache control method that efficiently erases cache data written in the write-back method and improves processing performance. The purpose is to

[Means for solving problems] FIG. 1 is a diagram explaining the principle of the present invention.

In FIG. 1, data on magnetic disks 16a to 16d is stored as necessary in a cache memory 14 forming an external storage area for the main storage unit 12 of the host device 10, and when accessed by the host device 10, a cache control unit 18 The present invention is directed to a cache control method in which, when a miss in the cache memory 14 is detected, the least frequently used cache data is erased to secure a new data storage area and an access operation is executed.

In the disk cache control method of the present invention, when searching for the least frequently used cache block q from the cache management table that stores the least frequently used cache data, for example, the cache data that is specified by the cache block q, It is determined by referring to the cache information table whether the cache data has been written in the write-back method and whether the disks to be accessed are the same disk.

Since the cache data of block q to be erased is written back and is on disk #2 which is different from disk #1 to be accessed, this cache data is not targeted for erasure, and the cache block f that is used less frequently is searched next. , similarly uses the write-back method and determines whether the disk is the same as the access target disk.

Since the cache data of this cache block f also does not satisfy the judgment conditions, the cache block i is next searched for and determined as the least frequently used cache block. Since they are the same, this data is set as data to be erased and the cache data written on disk #1 is erased.

Of course, if the data to be erased is of the write-through type, the cache data is erased as is.

[Operation] When the least frequently used data to be erased is the write-back method, unless the disk is the same as the accessed disk, the next least frequently used cache data is sequentially searched for erasing, and the search process for this erased data is performed. This process is repeated until write-back data for the same disk as the access target disk is obtained.

Therefore, the write-back cache data that is finally searched for deletion is data stored on the same disk as the access target disk, and this disk is already in a writable state when the bus is acquired in the first access process. , data to be erased can be immediately written to the disk and cache data can be erased, eliminating the need to wait for disk operations to complete or acquire a new bus due to differences in the disk to be accessed and the disk to be written back. Back-up cache data erasure processing can be performed efficiently, and processing performance can be further improved.

Embodiment FIG. 2 is a block diagram showing an embodiment of the present invention.

In FIG. 2, 10 is a CPU as a host device, to which a main storage unit 12 is connected. A cache memory 14 is provided as an external storage area for the CPU 10, and in this embodiment, the cache memory 14 is composed of ten entry blocks indicated by block numbers aj. The cache memory 14 is connected to a CPU including a main memory section 12 via a controller 22 of a cache control section 18.
Connected to 10. Further, a plurality of magnetic disks, in this embodiment, magnetic disks #1 to #4 16a to 16d are connected via the controller 22 of the cache control unit 18 and the I10 controller 20.

The cache control unit 18 includes #1 to #4 magnetic disks 168
~16d and the cache memory 14 and data transfer control between the cache memory 14 and the main storage section 12.

The cache control unit 18 including the controller 22 includes:
A cache information table 24 is provided that stores cache information used for erasing the cache memory 14. This cache information table 24 includes a cache management table 26 that indicates the frequency of use corresponding to block numbers a to j that indicate each entry block of the cache memory 14, and whether or not the cache data of block numbers a to j is a write-back method. A directory table 32 indicating whether the write-through method is used and the relationship with the target disks #1 to #4, and magnetic disks 168 to #1 to #4.
16d and an operation flag 34.

That is, the cache management table 26 has block numbers a to j of the cache memory 14 shown outside the left frame.
For each block number, the block number accessed immediately before (3efore) and the block number accessed after (Next) are stored in a chain structure. Furthermore, the LRLI register 28 and the MRtJ register 30 are attached to the cache unit management table 26.
The LRLJ register 28 stores the oldest accessed block number, for example block number Q, and the MRLJ register 30 stores the latest accessed block number, for example block number S.

That is, the block number of the MRU register 30 that was accessed most recently has the highest frequency of use, and the block number q that has been accessed the oldest stored in the LRU register 28 has the lowest frequency of use.

The directory table 32 usually has entries consisting of disk addresses, cache addresses, etc., but in this embodiment, a write-back method or a write-through method is used, which constitutes a part of the directory table necessary for the control of the present invention. Only the data and disk machine number are shown. Further, the disk operation flag 34 becomes "1" when the disk machine numbers #1 to #4 are in operation,
The flag becomes "0" when it stops.

Next, the cash acquisition process in the embodiment shown in FIG. 2 will be explained with reference to the operational flow shown in FIG.

Note that the operation flow in FIG. 3 is based on the CPU 10 as a host device.
This shows a case where a read access is made to the cache control unit 18.

In FIG. 3, first, in step S1, the CPU 10 performs a read access to a specific magnetic disk, for example, the #1 magnetic disk 16a, to the controller 22 of the cache control unit 18. It is determined whether or not the #1 magnetic disk 16a is in operation. At this time, disk operation flag 3
As is clear from 4, since the #1 magnetic disk 16a is stopped with the operation flag set to "0", the process proceeds to step S3, and the bus of the #1 magnetic disk 16a is connected to the bus via the I10 controller 20.

When the bus for the #1 magnetic disk 16a is acquired in step S1, the cache control unit 18 searches the cache memory 14 in the next step S4 and determines whether or not the data that has been read accessed is stored in the cache memory 14. Perform human judgment.

If it is determined in the hit determination in step S4 that there is a miss in which the data that has been read accessed is not stored in the cache memory 14, the process proceeds to step S5 and refers to the storage block number of the LRU register 28 provided corresponding to the cache management table 26. do. That is, the number of the least frequently used cache block is referred to.

At this time, since the block number q is stored in the LRU register 28, the process advances to step S6 and the directory table 32 is checked to see if the cache data stored in the block q of the cache memory 14 has been written by the write-back method. Determine by referring to . As is clear from the directory table 32, since the cache data of block q is of the write-back type, the process advances to the next step S7, and it is determined by referring to the directory table 32 whether or not they are the same disk.

Here, from the directory table 32, block number Q
The cache data is #2 magnetic disk 16b,
Since the #1 magnetic disk 16a is different from the #1 magnetic disk 16a that received the read access in step S1, the process advances to step S8. In step S8, the cache management table 26 is referred to to search for the block number of one of the least frequently used blocks g. That is, the cache management table 26
Since the next accessed block number in block number @q is f, this block number f is obtained as the search result.

After searching for the block number f in step S8, the process returns to step S6 again, and the directory table 32 is referred to to determine whether the block number f is of the write-back type. In the directory table 32, the block number f is write-back type, and the target disk is #3 magnetic disk 1.
6c. Therefore, step S6
Then, since the block number f is of the write-back type, the process proceeds to step S7, and in step S7, since it is different from the #1 magnetic disk 16a that received the read access in step S1, the process proceeds to step $8 again, and the cache management table 26 The block number most recently accessed by block number f is searched by referring to the block number f. That is, when referring to the block number f in the cache management table 26, it is 1.
Since block number i is stored as a block number that has been accessed quickly, block number i is searched and the process returns to step S6. When the directory table 32 of block number i is referred to in step S6, block number i is write-back type and the target disk is #1.
This is a magnetic disk 16a. Therefore, since block number i is of the write-back type, the process advances to step S7.
In step S7, it is determined that the disk is the same #1 magnetic disk 16a, and the process proceeds to step S9, where the cache data of block number i of the cache memory is written to the #1 magnetic disk 16a, and then the cache data is erased to create an empty entry. Write-back processing is performed to secure the cache, and the series of cache acquisition processing ends.

On the other hand, if the storage block number of the LRU register 28 in step S6 or the cache data of the block number searched in the process of step S8 is of the write-through type, the process advances to step S10 and the cache data is directly erased. Get a blank entry.

If a new empty entry is secured in the cache memory 14 by the cache acquisition operation shown in FIG. 3 of this proposal, then step S of the read access of the operation flow of FIG.
7. As shown in S8, data is written from the magnetic disk to the acquired empty entry in the cache memory, and after writing, the data is read and transferred to the CPU 10.

Furthermore, the operation flow in Figure 3 shows the cache acquisition process when a read access is received from CPUIO, but as shown in the operation flow in Figure 5, write access data is lost when a write access misses. Since the cache acquisition process is also performed in step S5 when the write-back method is used, the same cache erase process as the read access cache acquisition process in FIG. 3 is executed in this write access cache acquisition process. Ru.

[Effects of the Invention] As described above, according to the present invention, when erasing cache data written by the write-back method when a cache memory miss occurs, the disk access operation for writing data to be erased from the cache memory is It is possible to improve processing efficiency by eliminating the need for disk writing due to termination or acquisition of a new bus, and further improve processing performance.

[Brief explanation of the drawing]

Fig. 1 is a diagram explaining the principle of the present invention; Fig. 2 is an embodiment configuration diagram showing one embodiment of the present invention; Fig. 3
4 is an explanatory diagram of a conventional system. FIG. 5 is an operational flow diagram showing an outline of conventional disk cache control. In the figure, 10: Host device 10a: CPU 12: Main storage unit 14: Cache memory 16a to 16d: #1 to #4 Magnetic disk 18: Cache control unit 20: I10 controller 22: Controller 24: Cache information table 26: Cache Management table 28: LRU register 30: MRU register 32: Directory table 34: Disk operation flag qL Shame system occupation - Mouth figure Figure 4

Claims (2)

[Claims] (1) The data of the disk device (16) is stored as necessary in the cache memory (14) that forms a storage area external to the main storage unit (12) of the host device (10), and accessed by the host device (10). A disk cache control method that executes an access operation after erasing the least frequently used cache data and securing a new data storage area when the cache control unit (18) detects a miss in the cache memory (14). When searching for the least frequently used cache data to be erased, if the data to be erased was written in the write-back method and is different from the disk to be accessed, the next least frequently used cache data is searched for. Data is sequentially searched for erasure, and when the cache data is written in the write-back method and is the same disk as the access target disk, the cache data is erased after writing the erasure target data to the access target disk. A disk cache control method characterized by: (2) The disk cache control method according to claim 1, wherein if the cache data to be erased has been written in a write-through method, the cache data is erased as is. .