JPH01120029A - Scribe structure of semiconductor manufacturing equipment - Google Patents
Scribe structure of semiconductor manufacturing equipmentInfo
- Publication number
- JPH01120029A JPH01120029A JP62277725A JP27772587A JPH01120029A JP H01120029 A JPH01120029 A JP H01120029A JP 62277725 A JP62277725 A JP 62277725A JP 27772587 A JP27772587 A JP 27772587A JP H01120029 A JPH01120029 A JP H01120029A
- Authority
- JP
- Japan
- Prior art keywords
- insulation film
- chip
- edge
- insulating film
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 17
- 238000004519 manufacturing process Methods 0.000 title claims description 3
- 239000000758 substrate Substances 0.000 claims abstract description 7
- 230000006866 deterioration Effects 0.000 abstract description 4
- 238000002161 passivation Methods 0.000 abstract description 2
- 238000009413 insulation Methods 0.000 abstract 13
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 abstract 1
- 238000005530 etching Methods 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Landscapes
- Formation Of Insulating Films (AREA)
- Dicing (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、半導体装置に於いて半導体基板上に複数の回
路を任し、各チップごとに分割し使用する場合のスクラ
イブ構造に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a scribe structure for use in a semiconductor device in which a plurality of circuits are placed on a semiconductor substrate and each chip is divided for use.
半導体基板上に、複数の回路を作成したものを各チップ
ごとにダイシングして使用する半導体装置においてチッ
プ端部の絶縁膜を次々に絶縁膜によりおおうことにより
電気的信頼性劣化を低減をしたものである。In a semiconductor device in which multiple circuits are created on a semiconductor substrate and each chip is diced, deterioration in electrical reliability is reduced by covering the insulating film at the edge of the chip one after another with an insulating film. It is.
うに、絶縁膜を多層にかさねファイナルパシベーション
のパターンユング時に一括してエツチング液時に絶縁膜
と絶縁膜との・界面よりエツチング液が入り込みサイド
エッチが発生してしまう。When the insulating films are stacked in multiple layers and the etching solution is applied all at once during final passivation patterning, the etching solution enters from the interface between the insulating films and side etching occurs.
また、スクライブを、ダイシングするさいに、オーバー
コートにクラック等が発生しチップ内部まで入り込み易
(水分が侵入し電気的信頼性を著しく低下させてしまう
という、問題点を「していた。Additionally, when dicing the scribe, cracks occur in the overcoat, allowing moisture to easily penetrate into the inside of the chip, significantly reducing electrical reliability.
〔6問題点を解決するための手段〕
本発明の、半導体装置におけるスクライブ構造は、チッ
プ端部において下の絶縁膜を次の絶縁膜が次々に縦・横
両方向にわたっておおうことを特徴とする。[Means for Solving Problem 6] The scribe structure in a semiconductor device according to the present invention is characterized in that the next insulating film successively covers the lower insulating film in both the vertical and horizontal directions at the end of the chip.
以下、本発明について、実施例に基づき詳細に説明する
。Hereinafter, the present invention will be described in detail based on examples.
第1図は、本発明の実施例における断面図である。第2
図は従来のスクライブ構造を示す。FIG. 1 is a sectional view of an embodiment of the present invention. Second
The figure shows a conventional scribe structure.
第1図は半導体製造装置において実施したものでありチ
ップ端部において絶縁膜をかさねる場合において第2の
熱酸化膜を第3の絶縁膜が横方向までおおい、第4の絶
縁膜がm3の絶縁膜をおおい第5のパンベージ3ン膜が
第4の絶縁膜をおおっているスクライブ構造例である。Figure 1 shows an example of a semiconductor manufacturing device in which an insulating film is overlaid on the edge of a chip, with a third insulating film covering the second thermal oxide film in the lateral direction, and a fourth insulating film covering an insulating film of m3. This is an example of a scribe structure in which a fifth insulating film is covered with a fourth insulating film.
上述の如く、本発明によればチップ端部において各絶R
膜との界面を出来るだけ減少させるとともに横方向に対
しても絶縁膜を厚くすることにより水分及び、エツチン
グ液の侵入をおさえ電気的信頼性劣化を防止する。又、
ダイシング時、バシベーシ3ンにカケが発生した場合で
も、内部への進入を最小限におさえチップへのダメージ
を低減し品質向上をもたらすものである。As described above, according to the present invention, each disconnection radius at the end of the chip is
By reducing the interface with the film as much as possible and making the insulating film thicker in the lateral direction, moisture and etching solution are prevented from entering, thereby preventing deterioration of electrical reliability. or,
Even if chips occur in the bassinet during dicing, the intrusion into the interior is minimized, reducing damage to chips and improving quality.
第1図は、本発明の半導体装置のスクライブ構造の実施
例を示す断面図。
第2図は、従来の半導体装置のスクライブ構造を示す断
面図。
1・・・半導体基板
2・・・熱酸化膜
3・・・絶縁膜
4・・・絶縁膜
5・・・絶am (バンベーション股)6・・・シリコ
ン基板
以 上
出願人 セイコーエプン/株式会社FIG. 1 is a sectional view showing an embodiment of a scribe structure of a semiconductor device according to the present invention. FIG. 2 is a cross-sectional view showing a scribe structure of a conventional semiconductor device. 1... Semiconductor substrate 2... Thermal oxide film 3... Insulating film 4... Insulating film 5... Absolute am (vanvation crotch) 6... Silicon substrate or more Applicant Seiko Epun Co., Ltd.
Claims (1)
置において、各チップ端部において第一の絶縁膜と該第
一の絶縁膜上に設けられた第二の絶縁膜が該第一の絶縁
膜端部をおおい第三の絶縁膜が該第二の絶縁膜端部をお
おうスクライブ構造を有することを特徴とする半導体製
造装置のスクライブ構造。In a semiconductor device having a plurality of circuits on a semiconductor substrate, a first insulating film and a second insulating film provided on the first insulating film are arranged at the ends of the first insulating film at each chip end. 1. A scribe structure for semiconductor manufacturing equipment, characterized in that the scribe structure has a scribe structure in which a third insulating film covers an end of the second insulating film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62277725A JPH01120029A (en) | 1987-11-02 | 1987-11-02 | Scribe structure of semiconductor manufacturing equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62277725A JPH01120029A (en) | 1987-11-02 | 1987-11-02 | Scribe structure of semiconductor manufacturing equipment |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01120029A true JPH01120029A (en) | 1989-05-12 |
Family
ID=17587450
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62277725A Pending JPH01120029A (en) | 1987-11-02 | 1987-11-02 | Scribe structure of semiconductor manufacturing equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01120029A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06204401A (en) * | 1991-06-27 | 1994-07-22 | Samsung Electron Co Ltd | Semiconductor wafer |
-
1987
- 1987-11-02 JP JP62277725A patent/JPH01120029A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06204401A (en) * | 1991-06-27 | 1994-07-22 | Samsung Electron Co Ltd | Semiconductor wafer |
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