JPH01118191A - Color code conversion circuit - Google Patents

Abstract

PURPOSE: To make display easy to see by generating gradation codes by a clock gated by serial conversion data and outputting the gradation code at fixed intervals in accordance with color number data detected by a color counter. CONSTITUTION: A shift register 13 loads the output of a color set register 12 and outputs serial conversion data, and it is fed back and is repeatedly shifted until the output of the register 12 is loaded by the next picture scan end signal. A color counter 14 is counted up by a counter clock gates by first serial conversion data to obtain the number of colors used for display of one picture, and this number is supplied to a color converter 15. The color converter 15 generates the gradation code in accordance with the clock gates by second serial conversion data, and the gradation codes at fixed intervals is obtained by the color counter output and is written in a rewritable pallet register 16. Thus, adjacent color codes are automatically converted to the gradation code having the fixed interval to make display easier to see.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention (Industrial Application Field) The present invention relates to a color code conversion circuit suitable for use in a personal computer.

(Prior Art) Recently, LCDs have been used as display devices for /-tuple computers.
, (Liquld Crystal Display
), FDP (Plasma Display Panel
) flat panel displays began to be used. However, much of the application software used on portable computers is color CR.
It is made for T (Cathode-Ray Tube). Therefore, if the image is displayed as is on a flat panel display that cannot display monochrome images, it will not be possible to distinguish between colors. Therefore, methods have been used in which one dot is displayed using a plurality of dots, such as pseudo gradation, or a flat panel display with gradation.

(Problem to be Solved by the Invention) However, if the former is followed, a flat panel display with several times as many dots as the number of dots to be displayed would be required.

Furthermore, when displaying as many as 16 gradations with the latter gradation (Fran)/4+Nel display, it becomes impossible to distinguish between adjacent shades, and furthermore, the lightest display becomes invisible. On the other hand, if the number of gradations is limited, a plurality of colors must be assigned to one gradation, which has the disadvantage that colors cannot be distinguished.

The present invention has been made in view of the above drawbacks, and provides a color code conversion circuit that automatically converts a color CRT display code to the most legible gradation code when displaying on a gradation-equipped flat display. The purpose is to

[Structure of the Invention] (Means for Solving the Problems) A color code conversion circuit of the present invention includes a color decoder,
Loads the color set register that holds the color data that follows the CC item in synchronization with the display, and the output of this color set register, converts it to serial data in synchronization with the external clock, and feeds it back as input data. A shift register that repeats this operation until one screen scan is completed, and a color counter that counts the number of colors used for one screen display by counting at the clock f-) with the first serial conversion data. and,
A color converter generates a gradation code using a clock gated by the next serial conversion data, and outputs the gradation code at regular intervals according to the color number data detected by the color counter, and this color converter output is written. It is composed of a four-letter register that generates and outputs a converted gradation code corresponding to the color data.

(Operation) In the above configuration, the color set register latches the color data encoded by the color decoder.

The shift register loads the output of the color set register and outputs serial conversion data. This serial conversion data is fed back as serial input data and is repeated until it is loaded in response to the next screen scan end signal. The color counter counts up with the counter clock which is r-) with the first serial conversion data, thereby obtaining the number of the next color used for one screen display, and supplies it to the color converter. The color converter generates a gradation code according to the clock r-transformed by the second serial conversion data, obtains a gradation code at regular intervals from the color counter output, and writes it into the rewritable /4let register.

This makes it possible to automatically convert adjacent color codes into gradation codes with a certain interval. Improves visibility of Nell Day Spray.

(Example) Hereinafter, an example of the present invention will be described in detail using the drawings. FIG. 1 is a block diagram showing an embodiment of the present invention.

In the figure, reference numeral 11 denotes a decoder for decoding the display color code given by I-R-G-B from the outside. A color set register 12 holds a color code to be displayed on one screen according to the decoding result by the decoder 11.

13 is a shift register that serially converts the output of the color set register 12; Reference numeral 14 denotes a color converter that generates and converts tone codes corresponding to each color according to the number of colors used for displaying one screen, and 16 a palette register that converts tone codes corresponding to each color. 17 is a multiplexer that selects palette data according to the display color; 18 is a timing generator that generates and supplies timing signals and pulses to each register and counter.

Figures 2 to 7 are cited to explain the operation of the embodiment of the present invention, and show color set timing, serial conversion timing, color counter timing, code converter timing, palette clock timing, and example code conversion. Each is shown below.

Note that the signal names (symbols) shown in the figure match those in FIG.

Hereinafter, the operation of the embodiment of the present invention will be explained in detail. First, external color code (I, R, G, B) signals are input. The color decoder 11 decodes this,
Output color data (Color 15-0).

The color set register 12 stores color data of 16 colors (
It consists of 16 registers (C8R15-0), each corresponding to a color (15-0), and is sent sequentially in synchronization with the clock (CLOCK) signal between the frame end (FE) signals generated for each screen scan. The next color data (Color 15-0) is latched. Moreover, once this register 12 is set, it holds that value until it is cleared by the next frame end signal (FE). In Fig. 2, when Co1or 14 @ 13+2.0 is used as color data during one screen scan, C3R14 of color set register 12
, 13, 2, and 0 are set.

Next, the shift register 13 is a 16-bit /4' parallel/serial conversion shift register that loads the output (C8R15-0) of the color set register 12 with the frame end (FE) signal, and loads the output (C8R15-0) of the color set register 12 with the clock (CLOC).
K) Outputs serial conversion data (SFT) according to the signal. This serial conversion data (SFT) is fed back as serial input data and is repeated multiple times until loaded by the next frame end (FE) signal. Figure 3 shows the color set register 12.
C8R14,13,2.

This shows the serial conversion timing when O is set. The color counter 14 is a 4-bit pinary counter for detecting the number of colors used in one screen display, and counts up using the counter clock (CUNTCK) gated by the first serial conversion data. It is cleared by frame end (FE). As a result, the number of colors used for one screen display is output as CA3-0. Figure 4 shows the counter clock (CUNTCK) generated at timing 08 when colors 14.13 and 2.0 are sent as serial conversion data (SFT) and the counter that outputs the number of colors used to CA3-0. - Show timing.

The color converter 15 is a code converter that generates a gradation code for the color t' used for one screen display, and is composed of a 4-bit binary counter and a code rotator. The pinary counter generates a gradation code by counting down with the code converter clock (CCCK) that is f-) with the second serial conversion data, and is cleared by converting it into the frame end (FE) signal. . Since this gradation code only counts down sequentially, adjacent codes are generated. Therefore, when the number of colors detected by the color counter 14 is 4 or less, 2-bit rotent is performed, and when the number of colors is 8 or less, 1-pit rotent is performed, thereby obtaining gradation codes at constant intervals. Furthermore, this gray scale code is dated by serial conversion data. Figure 5 shows
Color 14.13 as serial conversion data (SFT)
, 2.0 is sent to timing generator 1.
8 generated code converter clock (c c
CK), the output of the binary counter, the output of the code rotator, and the timing of the output converted from serial conversion data are shown.

The /4'let register 16 corresponds to each color and consists of 16 4-bit registers for holding tone codes. This writing to register j116 is performed using the code converter output (CC3-0) as input data, and is synchronized with the second serial conversion data by the timing generator 18! They are written sequentially by the write clock (PACK 15-00).

In Figure 6/? Indicates the generation timing of the let clock. ? A/Cyplexer 17 is color (Color 15
-0), and outputs the gradation code (G3-GO) t-.

Figure 7 shows an example of code conversion in display format when four colors are used for one screen display, where color codes 14, 13, and 2.0 are gradation codes 15 t 11r.
It can be seen that they are respectively converted to 7 #0.

[Effects of the Invention] As explained above, according to the present invention, the following effects can be obtained, and the present invention is particularly useful when the number of colors used in display is small.

(1) Adjacent color codes can be automatically converted into gradation codes with regular intervals.

(2) It is possible to automatically prevent the display from being converted to a light gradation code and becoming invisible.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIGS. 2 to 7 are diagrams cited for the purpose of explaining the operation of the embodiment of the present invention, including color set timing, serial conversion timing, color color conversion timing, etc. Kunta timing, code converter timing, noyalet clock timing, and code conversion examples are shown. 11... Color decoder, 12... Color set reno star, 13... Shift re/zo star, 14... Color counter, 15... Color converter, 16...
No armpit reno star, 17...Multiplexer, 18
...Timing generator. Applicant's agent Patent attorney Suzue Takehiko 1 Taguchi
2nd time 4th figure 6th figure sword craft - code l Sawajibi 7th figure

Claims (1)

[Claims] A color decoder obtains a color code from the outside and converts it to color data, a color set register holds the color data that is sent sequentially in synchronization with the display, and the output of this color set register is loaded and synchronized with the external clock. Converts it to serial data, feeds it back as input data, repeats this operation until one screen is scanned, and counts using a clock gated by the first serial conversion data to display one screen. A color counter that counts the color number data used in the process and a clock gated with the next serial conversion data generate tone codes, and tone codes are generated at regular intervals according to the color number data detected by the color counter. 1. A color code conversion circuit comprising: a color converter that outputs a color converter; and a palette register to which the output of the color converter is written and generates and outputs a converted gradation code corresponding to the color data.