JPH01117535A - Multiple transmission system - Google Patents

Abstract

PURPOSE:To reduce the circuit scale in comparison with the transmission system employing a conventional multi-frame synchronizing circuit by applying pulse frequency modulation based on a transmission frame signal according to a sub signal at the sender side and multiplexing the signal to a specific idle bit of a transmission data signal and sending the result. CONSTITUTION:A pulse frequency modulation circuit 103 at the sender side generates a signal 155 subject to pulse frequency modulation in response to the sub data signal 154 based on the frame signal added by a frame addition circuit 101. A multiplexer circuit 102 multilexes the signal 155 onto a specific bit of the main data signal. The frame addition circuit 101 receives a transmission frame signal 151 and a transmission clock signal 152, adds a frame signal to the data signal generated by the multiplexer circuit 102 and sends the result. On the other hand, a frame synchronizing circuit 104 at the receiver side takes frame synchronization, a demultiplexer circuit 105 segments one bit multiplexed at the output and recovers the pulse frequency modulation output and a pulse frequency demodulation circuit 106 demodulates it into a pulse frequency to obtain a sub signal 160 demultiplexed according to the pulse frequency.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is applied to an optical transmission system. In particular, it relates to a frame synchronous multiplex transmission system.

〔overview〕

The present invention provides means for multiplexing and transmitting a large amount of data on specific bits in one frame, in which a signal that has been subjected to pulse frequency modulation based on a transmission frame signal according to a multiplexed data signal is multiplexed as specific bits of the transmission data signal. By separating the received multiplexed bits, extracting this specific bit, and demodulating the pulse frequency modulated sub-signal to this specific bit, the circuit configuration is smaller than that of the multi-frame synchronization method. This makes it possible to realize multiplex transmission of sub-signals.

[Conventional technology]

When multiplexing a large amount of data into a specific bit in one frame and transmitting it using a conventional frame-synchronized transmission system,
Multiframes are added and transmitted, multiframe synchronization is performed on the receiving side, and the multiplexed data is separated.

[Problem that the invention seeks to solve]

When transmitting a large amount of data by multiplexing it to a specific bit in one frame in such a conventional frame synchronization transmission system, a multiframe synchronization method that requires multiframe addition and synchronization is used, so the circuit The disadvantage is that the scale becomes large.

The present invention aims to eliminate such drawbacks and provides a multiplex transmission system with a smaller circuit configuration than the multiframe synchronization system.

[Means for solving problems]

The present invention provides a modulation circuit that generates a signal that is pulse frequency modulated according to a sub data signal based on a frame signal added by a frame addition circuit, and a modulation circuit that uses the signal generated by this modulation circuit to identify a main data signal. a transmitting means including a multiplexing means having a multiplexing circuit for multiplexing into bits; a separating circuit for separating the specific bit from the frame-synchronized data signal; and a frame signal given from the frame synchronization circuit as a reference. and a receiving means including a separating means having a demodulation circuit for demodulating the pulse-frequency modulated ° signal into the specific bit.

[Effect]

On the transmitting side, pulse frequency modulation is performed based on the transmission frame signal according to the sub-signal. This is multiplexed onto a specific empty bit of the transmission data signal.

On the other hand, on the receiving side, the specific bits are separated, a pulse frequency modulated signal is taken out on the transmitting side, and the pulse frequency is demodulated to obtain separated data.

〔Example〕

Hereinafter, one embodiment of the present invention will be described based on the drawings. 1st
The figure is a block configuration diagram showing the configuration of this embodiment.

2 is a circuit connection diagram showing the configuration of the pulse frequency modulation circuit shown in FIG. 1, and FIG. 3 is a circuit connection diagram showing the configuration of the pulse frequency demodulation circuit shown in FIG. 1.

In this embodiment, as shown in FIG. 1, the transmitting side includes a pulse frequency modulation circuit 103 that inputs a sub signal 154 to be multiplexed and a transmitting frame signal 151, a transmitting frame signal 151, a transmitting clock signal 152, and transmitting data. signal 15
3 and a multiplexing circuit 102 that receives the pulse frequency modulation signal 155 output from the pulse frequency modulation circuit 103;
The receiving side includes a frame synchronization circuit connected to the frame addition circuit 101 via a transmission path 110, and a frame addition circuit 101 that manually inputs a transmission frame signal 151, a transmission clock signal 152, and a signal output from the multiplexing circuit 102. 104, a separation circuit 105 which inputs the reception data signal 156, reception frame signal 157, and reception clock signal 158 output from the frame synchronization circuit 104, and inputs the pulse frequency modulation signal 159 and reception frame signal 157 output from the separation circuit 105. and a pulse frequency demodulation circuit 106 that outputs the separated sub-signal 160. Here, the pulse frequency modulation circuit 103 includes a counter 201 and an inverter 202, and the pulse frequency demodulation circuit 106 includes a counter 301 and a four-piece flip-flop 302. This pulse frequency modulation circuit 103
The configuration of the pulse frequency demodulation circuit 104 is shown in which 4 bits of information are transmitted to 1 empty bit in one frame.

That is, a transmitting means including a multiplexing means for multiplexing a sub data signal onto a main data signal, a frame addition circuit 101 for adding a frame signal to the data signal generated by the multiplexing means, and a frame arriving from the transmitting means. It comprises a frame synchronization circuit 104 for frame synchronizing the data signal added to the signal, and a receiving means having separation means for separating the sub data signal from the data signal synchronized by the frame synchronization circuit. , the multiplexing means includes a pulse frequency modulation surface path 103 which is a modulation circuit that generates a pulse frequency modulated signal according to the sub data signal based on the frame signal added by the frame addition circuit 101; a multiplexing circuit 102 that multiplexes a signal generated by the circuit into a specific bit of the main data signal, and the separating means includes a separating circuit 105 that separates the specific bit from the frame-synchronized data signal; , a pulse frequency demodulation circuit 106 which is a demodulation circuit that demodulates the signal pulse frequency modulated to the specific bit based on the frame signal given from the frame synchronization circuit 104.
and has.

Now, in the pulse frequency modulation circuit 103, the frequency of the pulse frequency modulation output 155 changes depending on the sub signal 154 to be multiplexed. This pulse frequency modulation output 155 is multiplexed onto one specific bit of the frame and transmitted. On the other hand, on the receiving side, frame synchronization is achieved, one bit multiplexed on the output side is punched out, the pulse frequency modulation output is regenerated, and this is pulse frequency demodulated by the pulse frequency demodulation circuit 106 to produce sub-signals separated according to the pulse frequency. Get 160.

〔Effect of the invention〕

As explained above, the present invention multiplexes sub-signals multiplexed by pulse frequency modulation onto specific bits of a data signal and transmits the same, resulting in a reduction in circuit scale compared to a transmission method using a conventional multi-frame synchronization circuit. There is an effect that can be achieved. Furthermore, even if the number of multiplexed data signals changes, it can be handled with only a slight circuit change.

[Brief explanation of the drawing]

FIG. 1 is a block configuration diagram showing the configuration of an embodiment of the present invention. FIG. 2 is a connection diagram showing the configuration of the pulse frequency modulation circuit shown in FIG. 1. FIG. 3 is a diagram showing the configuration of the pulse frequency demodulation circuit shown in FIG. 1. 101... Frame addition circuit, 102... Multiplexing circuit, 103... Pulse frequency modulation circuit, 104...
Frame synchronization circuit, 105... Separation circuit, 106...
- Pulse frequency demodulation circuit, 110... transmission line, 151
... Transmission frame signal, 152 ... Transmission clock signal, 153 ... Transmission data signal, 154 ... Sub signal to be multiplexed, 155.159 ... Pulse frequency modulation signal, 156 ... Reception data Signal, 157... Reception frame signal, 158... Reception clock signal, 160.
...Separated sub-signal, 201.301...Counter, 202...Inverter, 302...4 flip-flops.

Claims (1)

[Claims] (1) A transmitting means comprising a multiplexing means for multiplexing a sub data signal onto a main data signal, and a frame addition circuit (101) for adding a frame signal to the data signal generated by this multiplexing circuit; A frame synchronization circuit (10
4), and a receiving means equipped with a separation means for separating a sub data signal from a data signal synchronized by the frame synchronization circuit, wherein the multiplexing means comprises a frame adding circuit. A modulation circuit (103) that generates a pulse frequency modulated signal according to the sub data signal based on the added frame signal, and multiplexes the signal generated by this modulation circuit onto a specific bit of the main data signal. a multiplexing circuit (102); the separation means includes a separation circuit (105) for separating the specific bit from the frame-synchronized data signal; and a separation circuit (105) for separating the specific bit from the frame-synchronized data signal; A multiplex transmission system characterized by comprising a demodulation circuit (106) that demodulates a signal pulse frequency modulated to the specific bit.