JPH01117089A - Manufacture of fpc substrate - Google Patents
Manufacture of fpc substrateInfo
- Publication number
- JPH01117089A JPH01117089A JP62274526A JP27452687A JPH01117089A JP H01117089 A JPH01117089 A JP H01117089A JP 62274526 A JP62274526 A JP 62274526A JP 27452687 A JP27452687 A JP 27452687A JP H01117089 A JPH01117089 A JP H01117089A
- Authority
- JP
- Japan
- Prior art keywords
- film
- conductive layer
- shaping
- plated
- insulating coat
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
- 239000000758 substrate Substances 0.000 title abstract 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims abstract description 10
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 8
- 229910052802 copper Inorganic materials 0.000 claims abstract description 8
- 239000010949 copper Substances 0.000 claims abstract description 8
- 238000005530 etching Methods 0.000 claims abstract description 7
- 229910052759 nickel Inorganic materials 0.000 claims abstract description 5
- 238000007747 plating Methods 0.000 abstract description 11
- 239000000853 adhesive Substances 0.000 abstract description 7
- 230000001070 adhesive effect Effects 0.000 abstract description 7
- 239000011248 coating agent Substances 0.000 abstract description 2
- 238000000576 coating method Methods 0.000 abstract description 2
- 230000003014 reinforcing effect Effects 0.000 abstract description 2
- 238000007493 shaping process Methods 0.000 abstract 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 abstract 1
- 238000007772 electroless plating Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 description 10
- 229920001721 polyimide Polymers 0.000 description 4
- 239000009719 polyimide resin Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 229910000831 Steel Inorganic materials 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 210000003141 lower extremity Anatomy 0.000 description 1
- 229920006254 polymer film Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000005488 sandblasting Methods 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/403—Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、電子機器の回路基板として使用され７’Ｃ
り、或は回路基板の接続に使用されるＦＰＣ（フレキシ
ブルプリンテッドサーキット）基板の製造法に関するも
のである。[Detailed Description of the Invention] [Industrial Application Field] This invention is used as a circuit board for electronic equipment.
The present invention relates to a method for manufacturing an FPC (flexible printed circuit) board used for connecting circuit boards.
〔従来の技術及び発明が解決しょうとす−る問題点〕近
年、電子機器を小型化する為に、回路基板も小型となり
、且つ、両面回路或は多層構成により高密度化されてき
ている。この為、回路基板並びに接続ケーブル等の薄星
化が要求され、ＦＰＣ基板と称される可撓性のフィルム
状の回路基板が多用されている。従来のＦＰＣ基板の製
造法を別紙添付の第４図に従って説明する。高分子フィ
ルムであるポリイミドレジン＋１）の表面へ、銅の導電
層（２）を耐熱性接着剤（３）で貼着する。そして、該
導電層（２）をエツチングすることによって回路パター
ンを設け、更に、その表面へ絶縁コート（４）を接着し
て被覆している。このようにして形成されたＦＰＣ基板
は、可撓性である為折曲して取付けることができ、且つ
、極めて耐熱性がある為端子へ直接半田付できる等の利
点がある。然しなから、ポリイミドレジン（１）の素材
は高価であり、且つ、導電層（２）の接着工程がある為
、前記ＦＰＣ基板を製造する際コストアップとなってい
友。そこで、安価にＦＰＣ基板を製造するために解決せ
らｎるべき技術的問題点が生じてくるのである。[Problems to be solved by the prior art and the invention] In recent years, in order to miniaturize electronic devices, circuit boards have also become smaller and have become more dense with double-sided circuits or multilayer structures. For this reason, there is a demand for thinner circuit boards, connection cables, etc., and flexible film-like circuit boards called FPC boards are often used. A conventional method for manufacturing an FPC board will be explained with reference to FIG. 4 attached hereto. A copper conductive layer (2) is attached to the surface of a polyimide resin +1) which is a polymer film using a heat-resistant adhesive (3). A circuit pattern is provided by etching the conductive layer (2), and an insulating coat (4) is adhered to the surface thereof. The FPC board formed in this way has advantages such as being flexible, so it can be bent and attached, and being extremely heat resistant, it can be soldered directly to terminals. However, the polyimide resin (1) material is expensive, and the process of adhering the conductive layer (2) increases the cost when manufacturing the FPC board. Therefore, technical problems arise that must be solved in order to manufacture FPC boards at low cost.
この発明は、上記問題点に鑑みこれを解決せんとして提
案せらｎたものであり、可撓性のフィルムの表面へ、無
電解でニッケル或は銅等を化学メッキし、更に、その表
面へ銅を電気メッキして導電層を設け、エッチングによ
り回路パターンを形成した後、前記導電層の表面を絶縁
コートにて被覆したことを特徴とするＦＰＣ基板の製造
法を提供せんとするものである。This invention was proposed in view of the above-mentioned problems as a solution, and involves electroless chemical plating of nickel or copper on the surface of a flexible film, and then coating the surface with copper. An object of the present invention is to provide a method for manufacturing an FPC board, characterized in that a conductive layer is provided by electroplating, a circuit pattern is formed by etching, and then the surface of the conductive layer is coated with an insulating coat.
この発明は、可撓性のフィルムの表面へ、メッキ処理に
よって導電層を設けている。然る後、エツチングによっ
て回路パターンを形成し、絶縁コートにて被覆する。即
ち、フィルムの表面へ銅の導電層を接着剤にて貼着する
という従来の工程に代えて、メッキ処理工程にぶって導
電層を形成する為製造コストを低減することができる。In this invention, a conductive layer is provided on the surface of a flexible film by plating. Thereafter, a circuit pattern is formed by etching and covered with an insulating coat. That is, instead of the conventional process of attaching a copper conductive layer to the surface of the film with an adhesive, the conductive layer is formed through a plating process, thereby reducing manufacturing costs.
然も、メッキ処理による為スルーホールの形成が容易で
あり、フィルムの両面に導電層を設けた両面構造のＦＰ
Ｃの製作も、−回のメッキ処理で済み工程を削減でき、
コストダウンに寄与できる。However, since it is a plating process, it is easy to form through holes, and it is possible to create a double-sided FP with conductive layers on both sides of the film.
The production of C can also be done by -times of plating process, reducing the number of processes.
It can contribute to cost reduction.
以下、この発明の一実施例を別紙添付図面に従つて詳述
する。第１図及び第２図は、ＦＰＣ基板を利用したフラ
ットケーブルを示したものである。Hereinafter, one embodiment of the present invention will be described in detail with reference to the accompanying drawings. 1 and 2 show a flat cable using an FPC board.
可撓性のフィルム（５）上に配線パターンｔ６）が形成
されており、図中右側部位はフィルム幅が膨拡し端子部
（７）となっている。このフラットケーブルの製造法に
ついて説明する。先ず、フィルム（５）は半田付に対し
て十分耐熱性を有するものであり、高分子フィルムであ
るポリイミドレジンを使用するを可とする。所定形状に
し北前記フィルム（ωは厚みが２０〜３０μ濯であり、
その表面をサンドブラスト等の機械的処理を施して微細
な凹凸を設ける０これは、メッキの喰付きを良好にする
為のものであり、この処理後肢フィルム（５）の表面へ
、無電解でニッケルを化学メッキして下地層（８）を設
ける。A wiring pattern t6) is formed on a flexible film (5), and the film width expands on the right side in the figure to form a terminal portion (7). The manufacturing method of this flat cable will be explained. First, the film (5) has sufficient heat resistance for soldering, and it is possible to use polyimide resin, which is a polymeric film. The above film (ω is 20 to 30 μm in thickness,
The surface is subjected to mechanical treatment such as sandblasting to create fine irregularities. This is to improve the bite of the plating, and nickel is electrolessly applied to the surface of the treated hindlimb film (5). A base layer (8) is provided by chemical plating.
該下地層（８）は厚み約１μｍであり、ニッケルのほか
鋼でもよい。更に、該下地層（８）を電極としてその表
面へ銅を電気メッキして、厚み２０〜３０μ倶の導電層
（９）を形成する。The base layer (8) has a thickness of about 1 μm and may be made of steel in addition to nickel. Further, using the underlayer (8) as an electrode, copper is electroplated onto the surface thereof to form a conductive layer (9) having a thickness of 20 to 30 μm.
然る後、回路の配線に対応させてレジストを印刷し、更
に、露光及び不要部分の除去等のエツチング作業を施し
て前述し交配線パターン（６）を形成する。そして、前
記端子部（１）先端の接点部（７ａＸ７ａ）・・・表面
に扛錫メッキを施し、且つ、端子部（７）のフィルム（
５）下面へ樹脂性の補強フィルム顛を貼着する。更に、
該接点部ｔ７ａ）（７ａ） ＝・を除き、前記導電層（
９）の表面へ、厚み１０〜３０μ常の絶縁コートＩを接
着剤ＵＫて貼着する。Thereafter, a resist is printed in correspondence with the circuit wiring, and further etching operations such as exposure and removal of unnecessary portions are performed to form the above-mentioned crossing line pattern (6). The contact portion (7aX7a) at the tip of the terminal portion (1)...the surface is tin-plated, and the film (7a) of the terminal portion (7) is
5) Attach a resin reinforcing film to the bottom surface. Furthermore,
Except for the contact portion t7a) (7a) =.
9) Apply an insulating coat I having a thickness of 10 to 30 μm to the surface of the plate using adhesive UK.
斯くの如く形成されたフラットケーブルは、７０〜ｘｓ
ｏｔｓｔ４Ａ度の厚みであり可撓性に富み、且つ、フィ
ルム（５１の素材にポリイミドレジンを使用している為
耐熱性が高く、前記接点部（７１Ｌ ） （７ａ ）を
回路基板の端子（図示せず）へ圧接或は半田付等の手段
で固着しても、十分耐えられる強度を有している。而も
、メッキ処理によって導電層（９）を設けている為スル
ーホールの形成が容易であり、第３図ｔ／Ｃ示Ｔ工うに
、フィルム（５）の両面に導電層（９）１９）を設けて
両面基板とした場合でも、予め適宜個所にスルーホール
ａｓｕｔ−開穿しておくことで、可撓性を有したまま、
上下夫々の配線パターン（６１（６）の導通をなすこと
も可能である。The flat cable formed in this way is 70~xs
It has a thickness of 4A degrees and is highly flexible, and has high heat resistance because it uses polyimide resin as the material for the film (51). It has sufficient strength to withstand even if it is fixed by pressure welding or soldering to the conductive layer (9).In addition, since the conductive layer (9) is formed by plating, it is easy to form through holes. Yes, as shown in Figure 3, even if conductive layers (9) and 19) are provided on both sides of the film (5) to form a double-sided board, through-holes should be drilled at appropriate locations in advance. By doing so, while maintaining flexibility,
It is also possible to conduct the upper and lower wiring patterns (61 (6)).
この発明は、上記一実施例に詳述したように、フィルム
表面へメッキ処理にエフ導電層を設ける為、従来の導電
層を接着剤にて貼着する方法エフ製造コストを低減でき
る。又、メッキ処理であるからスルーホールの形成が極
めて容易であり、両面構造のＦＰＣ基板であっても、−
工程で両面の導電層を形成できる０依って、工数を短縮
でき、且つ、製作工程の自動化も容易であり、コストダ
ウンに寄与できる等正に諸種の効果を奏する発明である
。As described in detail in the above embodiment, this invention provides a F conductive layer on the surface of the film by plating, so it is possible to reduce the manufacturing cost of the conventional method of attaching a conductive layer with an adhesive. In addition, since it is a plating process, it is extremely easy to form through holes, and even with double-sided FPC boards, -
Since conductive layers can be formed on both sides in a process, the number of man-hours can be shortened, the manufacturing process can be easily automated, and this invention has various effects such as contributing to cost reduction.
第１図乃至第３図は本発明の一実施例を示し友ものであ
る。第１図はフラットケーブルの一部切欠平面図、第２
図は同縦断面図、第３図は両面構造のフラットケーブル
の要部縦断面図である。第４図は従来型のフラットケー
ブルの要部縦断面図である。
符号説明
（５）・・・・・・フィルム （６）・・・・・
・配線ハターン（８）・・・・・・下地層 （
９）・・・−・導電層αト・・・・・絶縁コート
ａり・・・・・・接着剤’、、：：−−，，” ；
（５）・・・フィルム
（１２）・・・接看剤FIGS. 1 to 3 illustrate one embodiment of the present invention. Figure 1 is a partially cutaway plan view of the flat cable, Figure 2 is a partially cutaway plan view of the flat cable.
This figure is a longitudinal cross-sectional view of the same, and FIG. 3 is a longitudinal cross-sectional view of the main part of a flat cable with a double-sided structure. FIG. 4 is a vertical sectional view of the main part of a conventional flat cable. Code explanation (5)...Film (6)...
・Wiring pattern (8)... Base layer (
9)...--Conductive layer α...Insulating coat
ari...adhesive', ::--,,"; (5)...film (12)...adhesive
Claims (1)
等を化学メッキし、更に、その表面へ銅を電気メッキし
て導電層を設け、エッチングにより回路パターンを形成
した後、前記導電層の表面を絶縁コートにて被覆したこ
とを特徴とするＦＰＣ基板の製造法。The surface of the flexible film is electrolessly plated with nickel or copper, and then copper is electroplated on the surface to form a conductive layer. After forming a circuit pattern by etching, the conductive layer is 1. A method for producing an FPC board, the surface of which is coated with an insulating coat.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62274526A JPH01117089A (en) | 1987-10-29 | 1987-10-29 | Manufacture of fpc substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62274526A JPH01117089A (en) | 1987-10-29 | 1987-10-29 | Manufacture of fpc substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01117089A true JPH01117089A (en) | 1989-05-09 |
Family
ID=17542934
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62274526A Pending JPH01117089A (en) | 1987-10-29 | 1987-10-29 | Manufacture of fpc substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01117089A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0440529U (en) * | 1990-08-06 | 1992-04-07 | ||
| WO2001049898A1 (en) * | 2000-01-07 | 2001-07-12 | Nikko Materials Co., Ltd. | Method for metal plating, pre-treating agent, and semiconductor wafer and semiconductor device using the same |
| US7045461B2 (en) | 2000-01-07 | 2006-05-16 | Nikkon Materials Co., Ltd. | Metal plating method, pretreatment agent, and semiconductor wafer and semiconductor device obtained using these |
| JP4964999B1 (en) * | 2011-12-12 | 2012-07-04 | Ｆｃｍ株式会社 | Flat cable manufacturing method |
-
1987
- 1987-10-29 JP JP62274526A patent/JPH01117089A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0440529U (en) * | 1990-08-06 | 1992-04-07 | ||
| WO2001049898A1 (en) * | 2000-01-07 | 2001-07-12 | Nikko Materials Co., Ltd. | Method for metal plating, pre-treating agent, and semiconductor wafer and semiconductor device using the same |
| US7045461B2 (en) | 2000-01-07 | 2006-05-16 | Nikkon Materials Co., Ltd. | Metal plating method, pretreatment agent, and semiconductor wafer and semiconductor device obtained using these |
| JP4964999B1 (en) * | 2011-12-12 | 2012-07-04 | Ｆｃｍ株式会社 | Flat cable manufacturing method |
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