JPH01116567A - Interface system for copying system - Google Patents

Abstract

PURPOSE:To improve noise-proofing and to make the data transmission speed higher by transmitting the data in serial communication between a copying machine main body and an optional equipment. CONSTITUTION:The frame of the transmitted data is constituted of an address block, a data block and a check sum data block. The optional equipment 2 corresponding to the address transmitted from the main body 1 transfers the data to the main body 1 side when the received data coincides with the check sum data obtained by said equipment based on the received data and transfer is not completed until the coincidence between an outgoing address and the transferred data from the optional equipment 2 is confirmed on the main body 1 side. When the transferred data does not return from the optional equipment 2 and when the coincidence between them is not confirmed, the data is transmitted from the main body 1 side again by judging that it is an error in communication. Thus, the noise-proofing is improved and the data transmission speed can be made higher.

Description

Detailed Description of the Invention (Field of Industrial Application) The present invention is constructed by connecting a copying machine main body and its peripheral equipment (optional equipment), such as an ADF (automatic document feeder), a sorter, and a special cassette. This invention relates to an interface method for transmitting data (signals) between the main unit and each device in a copying system.

(Prior Art) Interface methods for data transmission between the copying machine main body and each device include a one-line, one-signal method, a parallel communication method, and a serial communication method.

The 1-line, 1-signal system allows for real-time response, but requires as many I10 ports and wires as the number of signals required, so as the functionality of optional equipment increases,
In order to transmit large amounts of data, (10 ports are added,
The load on the main circuit side and the wire handling become enormous, resulting in increased costs. In addition, in order to be able to install many types of options on one main unit, it is necessary to provide as many signal lines as necessary for each option in advance, and when no options are installed, there will be empty terminals. Therefore, there is a problem of inefficiency.

In addition, the parallel communication method allows high-speed data transmission, for example by transmitting 8 pits of data at once, but it requires 8 or more communication cables (lines) and 110 ports, which puts a burden on the main circuit side. This has the problem that the noise is large and that it is necessary to protect all of the lines from noise.

In addition, the serial communication method has a slow transmission speed because it sends data sequentially through two signal lines, but it is possible to transmit a large amount of data with at least two communication cables and two boats, and it is possible to It reduces the burden on the main circuit, and is advantageous in terms of interface expandability and cost.
Furthermore, in terms of noise resistance, it is sufficient to guard only two lines.

However, in order to increase the transmission speed, it is necessary to increase the signal frequency, which makes it more susceptible to noise.
There are issues such as the need to take measures against noise on the line, and the prevention of malfunctions due to communication errors, etc., must be carried out by the software of the host CPU (main body).

For example, as shown in Japanese Patent Application Laid-Open No. 60-254060, a sorter is connected online to the main body of a copying machine, and a signal indicating the capacity is sent from the sorter to the main body. 11 has been proposed in which image forming conditions are restricted on the main body side according to the signal to prevent incorrect sorting, but conventional devices such as this example require addresses and commands for each option. It is not certified and requires a signal line for each operating mode.

Furthermore, as shown in Japanese Patent Application Laid-Open No. 60-63565, an adapter having a serial interface circuit and a parallel interface circuit is used to connect devices with interface (communication) systems with different specifications. However, with this method of using an adapter, it is difficult to cope with an increase in the types of optional devices and an increase in each function.

In addition, the signals in the conventional interface method are dedicated signals for each optional device, so if the model of the optional device changes, it may not be possible to connect it to the main unit, or the mode may be changed using the dip switch on the main unit or the simulation. There was the inconvenience of having to use the

(Purpose of the Invention) The present invention solves the above-mentioned conventional problems, and is capable of achieving good noise resistance and increasing data transmission speed in a serial communication system. It is an object of the present invention to provide an interface method in a copying system that allows accurate identification between devices with fewer lines even when optional devices are connected, and is advantageous in terms of simplified configuration and cost.

(Structure of the Invention) The present invention provides an interface in a copying system that is composed of a copying machine main body and various types of optional equipment connected to the copying machine main body, and in which data is transmitted between these main bodies and the equipment by serial communication. In this method, a transmission data frame consists of an address block, a data block following this address block, and a checksum data block obtained from both blocks, and a predetermined number of bits in the address block are assigned a command address or a transmission data block. A predetermined format representing the address of the destination or source optional device is set, the predetermined format or the content of the actual data is set in a predetermined number of bits in the data block, and the checksum data block is set in the address block. The optional device that corresponds to the address specified by the address block or data block sent from the main unit is determined by calculating the checksum data sent from the main unit and the check sum data received by the optional device. When the sum data matches, the data is transferred to the main unit, and when the address in the data transferred from the optional device matches the address corresponding to the optional device sent from the main unit, the main unit determines that the transfer is complete. When the above two addresses do not match, or when the data is not transferred from the optional device within a certain period of time after transmission from the main unit, data is sent from the main unit again.

According to this method, by simply connecting the main unit and each optional device with two lines, the transmission data between the two is composed of commands, addresses for each optional device, checksum data, etc. in the frame. It can execute a predetermined communication protocol, and can self-help confirm device connections, handle communication errors, etc.

(Embodiment) FIG. 1 shows an example of the configuration of a copying system implementing the interface method of the present invention. In the figure, 1 is the main body of the copying machine, and on the top of this main body 1 is a document feeder that automatically feeds originals, so-called AOF (ALITO DRAFT F).
In addition to the paper feed cassette 3, a special cassette 4 that can feed a wide variety of paper is installed on the - side of the main body 1, and on the other side of the main body 1. , a large number of bins for sorting and combining paper after copying (
A sorter 5 with a tray) is installed.

These AOF 2, special cassette 4, and sorter 5 are prepared as optional equipment with various specifications, and a desired one is selected as appropriate from among them and installed in the main body 1, and each of these optional equipment The control circuit of the main body 1 and the control circuit of the main body 1 are electrically connected so that data can be transmitted between them, and predetermined operations as described below can be obtained.

Inside the main body 1, there is an optical system 13 consisting of a lamp 7, mirrors 8, 9° 10.11, and a lens 12 for exposing and scanning an original on a contact glass 6, and this optical system 13.
a photoconductor drum 14 to which an original VA image is irradiated; a main charging device 15 disposed around the photoconductor drum 14;
Developing device 16, transfer bag! It is equipped with peripheral devices such as F17, separation bag a18, and cleaning device 19, a paper conveyance path and means 20, and a fixing device a121.

The AOF 2 includes a tray 22 for setting documents, a document feed roller 23, a document feed belt 24, and the like. 4-down drive motor 2
6. The sorter 5 includes a paper feed row 527, etc., and the sorter 5 includes multiple bins 28 and a means 2 for switching the paper discharge path.
9. It is comprised of a conveyor belt 30 for transporting paper in a state in which it is attracted by air suction by a fan, a movable means 31 for feeding the paper from above the conveyor belt 30 into a predetermined bin 28, and the like.

FIG. 2 shows the connections between the copying machine main body 1 and the control circuits of various optional devices in this system.
Connected only by L2. In other words, a signal line L1 is connected from the output end of the cPU of the main body 1 to the input end RXD of the cPU of each option.
A signal line L2 is connected from the output end TXD of the main body 1 to the input end RXD of the CPLJ of the main body 1. In this system, in order to control the operation, these two lines L1. The feature is that data is transmitted using an interface method using serial communication using L2 as described later.

Note that by using a so-called oven collector circuit as the interface specification for the input/output circuit, it is possible to provide a fail-safe function against abnormalities in equipment or circuits.

FIG. 3 shows functional blocks of one control circuit connected as described above. Main unit 1 and optional equipment such as ADF2
In addition to the ALtJ and registers that are the main body of the CPU, these include the internal data bus, TX buffer, RX buffer, serial register (parallel to serial and serial to parallel), Tx control, RX control, baud rate generator, Furthermore, ROM
, RAM, etc., and the signal line 1. Each L2 connects one serial register (parallel to serial) on the sending side and the other serial register (serial to parallel) on the receiving side.

Then, in synchronization with the clock from the baud rate generator, the serial register sends out the buffer data (for example, 1 byte) to the signal line (transmission or transfer).
Alternatively, it can be read from the signal line, and when the buffer is empty or data is received, the TX control
The X control interrupts ALtJ and executes interrupt processing.

The format of transmission data in this interface method will be described below with reference to FIGS. 4 to 13.

FIG. 4 shows the frame structure of transmission data, and the frame consists of an address block, a following data block,
Furthermore, it consists of a checksum data block that follows, each block is 8 bits 1~(D7~DO), the data block can be up to 4 bytes, and the size of one frame is up to 6 bytes (48 bits). are doing.

FIG. 5 shows the bit-by-bit configuration of each block.

As shown in the figure, the a part of each block, that is, the 7th bit (Dl), is given an identifier indicating whether it is an address block or another block. That is, when this identifier is "1", it is an address block (address data select bit), and when it is "0", it is a data block or a checksum data block.

The b part (D6-02) is the command address or option address, the d part (D6-DO) is the actual data content, e
The part (06 to Do) becomes checksum data.

FIGS. 6 and 7 show address block configurations.

As shown in the figure, 5 bits D6 to D2 of the address block represent addresses (destinations) of various commands or options corresponding to the contents of the transmission data. D6~D
2 bit is the next rool of roool 1 J(3)
The 27 bits from ooJ (4) to "11111J (31)" are used for the address of each optional device. Also, the Dl and Do bits represent the number of data blocks that follow the address block. In other words, "00" indicates the address "01" indicates that one data block follows the block, and "01" indicates that a 2al data block follows the address block.

FIG. 8 shows how to obtain a checksum data block.

This block performs an exclusive OR (EXO) on all address blocks and data blocks.
It is determined by the performance of R) etc. However, 7 of each block
For the bit (Dl), EXOR is not calculated and it is set to “0”.
This is intended to facilitate subsequent judgment processing.

Next, transmission and reception commands will be explained with reference to FIGS. 9 to 13.

FIG. 9 shows a transmission request command. As shown in the figure, this command is possessed only by the main body, and one frame consists of 3 bytes. The transmission request command address is placed in D6 to D2 of the address block, and D6 of the data block is ~D2
Put the address of the destination of the transmission request. This command is sent by the CPU of the main unit when it needs data from each optional device, specifying the address of option 1a.
On the other hand, the optional device indicated by the request destination address must immediately send the data.

Also, after sending this command from the main unit, if the optional device does not transfer the receive command within range for a certain period of time, the main unit will send this command again. Handshaking in this way prevents communication errors and interference.

Figure 10 shows the transmission initial command. Similar to the transmission request command above, this command is possessed only by the main unit, and one frame consists of 3 bytes. The address block contains the transmission initial command address, and the data block contains the transmission initial command. Post the destination address. This command is sent to each specified address when the main switch of the main unit is turned on, and the connection of each optional device is confirmed. After transmission from the main unit, by receiving an option type command from the optional equipment, the connection is confirmed and communication with each optional equipment is started. In addition, when the copier main body is not in copying operation, 3 seconds (SeC)
The information is sent to each optional device in turn at regular intervals, and the connection of each optional device is confirmed at regular intervals. By confirming the connection in this way, there is no need for deep switches or simulations as in the past.

Figure 11 shows the receive complete command. This command is possessed only by the optional equipment, and one frame consists of 3 bytes. The address block contains the receive complete command address, and the data block contains the option to send the same command. The device posts its own address. This command causes the optional device to transfer its own address to the main unit if the checksum data in the data sent from the main unit matches the checksum data in the data received by the optional device. The main unit determines that the transfer is complete when the destination address corresponds to the transferred address.

FIG. 12 shows an option type command. This command is possessed only by the option equipment side, and as shown in the figure, one frame consists of 4 bytes. The address block contains the option type command address, the data block is a 2-byte transmission, data block 1 indicates the address for sending from the option +[ to the main body, and data block 2 indicates the type of option equipment (for example, sorter). In some cases, it indicates type identification such as 10 pins, 20 bins, or the number of sorted sheets per bin.

This command is sent to the main unit by the optional device that receives the initial command sent from the main unit, adds identification data of its own type. When the main unit receives this command, it determines that the main unit and the optional device are connected.

FIG. 13 shows examples of various optional addresses.

This address is specified by 5 bits D6 to D2 of the address block, and since r00000J~roo011'' is used to specify the send/receive command, ``0O100''~
There are 28 pieces of N1111J.

Next, the procedure for normal data transmission will be explained. Figure 14 shows the ADF interface. Data is sent from the main unit to the optional ADF (1), and if there is no error in what is received on the ADF side, the ADF transfers a receive complete command (■), and the main unit If there is no error in the received data, the transfer is completed. If the receive complete command is not returned or if the command is an error, the main unit will retransmit it.

FIG. 15 shows a frame for data transmission (I) from the main body to the ADF, and FIG. 16 shows a frame for transfer of a reception complete command from the ADF (n). Data transmission (I
), the data block contains bits of various actual data contents as shown in the figure. Here, ADF, ST
indicates the start of the ADF, M, 5OURCE indicates the power on of the device, CHANGE indicates the exchange of the original, and CLEAR indicates each bit for clearing set values, etc.

When requesting data from the main body to the ADF, the main body transmits a transmission request command to the ADF (I), and upon receiving this transmission request command, the ADF side transfers the data to the main body (It). When the ADF side determines that the transmission from the main unit is an error, the transfer (II) to the main unit is not performed, so the main unit makes the determination and sends the transmission request command again.

Even when transfer (II) results in an error, the main unit resends the transmission request command.

FIG. 17 shows the transmission format when a transmission request is made from the main body to the ADF, and FIG. 18 shows the transfer format when data is transferred from the ADF to the main body. Here, OHIME of data block 1 is a chime when you forget to take out a document, ADF NEXT is a chime for sending the next document, and ADF
ON indicates that a document is set, PRINT indicates a copy command, JAM ADF indicates a jam in the ADF, ADF
0RIGINAL 5IZE DATA indicates each bit of document size data.

Next, the sorter interface will be explained. The data transmission system is the same as that explained in Fig. 14, and Fig. 19 shows the data transmission from the main body to the sorter (I), and Fig. 20 shows the transfer of the received complete command from the sorter (II). Indicates the format. Here,
In data block 1.2, INT is interrupt, G
ROUP indicates grooving of the paper, 5ORT indicates sorting, N, N0RTkt'/- no tot, C0PYLtDp, KEYSET indicates key manual setting, and FINAL indicates end bits.

Figure 21 shows the transmission (I) requesting data from the main body to the sorter.
), Figure 22 shows data transfer from the sorter to the main unit (I[
) is shown below.

These details are the same as described above, so their explanation will be omitted.

Next, the special tray (ST) interface will be explained. This data transmission is also the same as above,
FIG. 23 shows each format when data is transmitted from the main body to the ST (I), and FIG. 24 shows each format when a reception complete command is transferred from the ST (II).

Figure 25 shows transmission (I) requesting data from the main unit to the ST.
Figure 26 shows data transfer from the sorter to the main unit (II)
The formats for each format are shown below.

Next, confirmation of connection of optional equipment will be explained. In this case, an initial command is sent from the main unit to each optional device (I), and when this command is confirmed on the optional device side, an option type command is transferred from the optional device to the main device (■,). The option type command includes a connection confirmation and data identifying the type of option. Figure 27 shows the initial command (I) sent from the main unit to the optional equipment.
Figure 8 shows an option type command (II) from the option device to the main body.

Next, the operation of the interface system of the present invention will be explained using flowcharts shown in FIGS. 29 to 40.

FIG. 29 shows an overall flowchart, in which each program 0.1.2.3 is configured to be executed once every 4 seconds. That is, first, in step S1, as initial processing, baud rate setting, start and stop bit setting, asynchronous mode setting,
After clearing the RAM and setting the 1 sec timer, the counter N is set to O in step S2, and the counter N is incremented by 1 each time the timer passes 1 lsec in steps 83 to S8, 2,3゜4
Programs 0.1.2.3 are executed respectively when . Program 0.1.2 is a certain program necessary for the copy operation of the main body and optional equipment, and its detailed explanation will be omitted here.

In program 3 in step S8, serial transmission and data processing programs of this method are executed. This includes the following subroutines: serial) L, -TX, RX
(transmission/reception), ShiIJ Full INIT (initial),
Serial-LOOP (loop), Serial-MAIN
There are (main) routines. Details of these will be described later.

FIGS. 30 and 31 show the processing routines for transmitting interrupts and receiving interrupts, respectively. As mentioned above, the former is used when the transmitting (TX) buffer becomes empty, and the latter is used when the receiving (TX) buffer becomes empty.
When data enters the RX) buffer, an interrupt is generated, and when the interrupt is finished, the process returns to the original position in the flowchart of FIG. 29. In addition, in these interrupt routines, in order to prevent data confusion, the 7-chimulator ACC and stack pointer SP are set before the interlaced (INT) TX and RX steps.
etc., and then restore the data to its original location after the same step. These (F)INT
-TX and INT-RX will also be described later.

Fig. 32 conceptually shows the command transmission for checking the connection of each optional device in the initial routine of Program 3, which checks whether the connection flags of the ADF, sorter, and special cassette (ST) are turned on. If the flag is not ON, the initial transmission command, address, and checksum are respectively transmitted.

Here, the flags shown in the flowcharts shown in FIG. 33 and subsequent figures will be listed and explained below.

Main unit (PPC) side flag OPN: 91SeC interval transmission order flag TXOQ: Transmission confirmation for each option 2-lag TXI
Q: Confirmation flag requesting transmission from each option TXO: Transmitting flag for each option (flag set when transmitting or never transmitting) TXI: Transmitting flag from each option (sending Checks whether the LINK version is connected, and sets it when it is connected (if it is set, the next check will be INTL INK: While this flag is set, the presence or absence of the option and its type are checked. TDATA: Flag indicating that a data frame is being transmitted. Area where the data frame is stored DATA-TX-N: Transmission data (data frame)
Data indicating the position (position to be transmitted) (-1 each time it is transmitted, ends when φFFH is reached, and the number of data + 1 is set first) TXEXOR Near address and data exclusive O
R is removed (however, the 7th bit is 0) ADR8: Data area for temporarily saving the received address or command [) ATA1-4: Data area for temporarily saving the received data EXOR: Exclusive O of received data sequentially
Data area FROM ADF (1) to (2): Data that has been completely received (data that has been confirmed to contain no noise, etc.) OPTYPE When a niobium type command is sent. Flag option (-ADF as an example) side flag ADFDA
A data area that indicates the number of data to be transferred to T by N- ADFEXOR: A data area obtained by exclusive ORing the input data. A flag that is set when it is determined that the near address or command is related to this option. ADF1-4: Temporary evacuation data area for input data ADCOM: Evacuation area for input address data or command data ADFO1-4: Transmission data buffer 0uTEXOR: Data area No. 33 obtained by exclusive ORing the transmission data The figure shows a serial-TXRX flowchart - this flow is executed every 81 Sec by an 81 sec interval timer.

The transmission order flag OPN is incremented by +1 each time the flow shown in the figure is processed. First, when OPN is 1, A
The TXOQ and TXO flags for DF are turned ONL, and then when OPN is 2, the TXIQ and TXI flags for ADF are turned ON. Thereafter, the flags for the sorter and the 8th machine are turned on in the same manner.

FIG. 34 is a flowchart of a serial-initial program, which is used to check for a certain period of time (30 ybsec) whether an optional device is connected when the power is turned on. FIG. 35 is a 70-chart of the serial loop program, which is used to perform a similar check not only when the power is turned on but also at regular intervals (3 seconds) during copying. With this program, each option +7) INTLINK, TXIQ, T
XI (7) Set each flag, start a timer, and when 30 ssec has elapsed, reset these flags and start a 3 sec timer.

FIG. 36 is a flowchart of the serial-main program, which causes the TXO.

Check each flag of TXI and check the transmission area (TXDA).
TA). Also, the transmission address or command is transferred to each transmission buffer. That is, in steps m1 to m4, TDATA75g, T
XO, TXI '75g (7) ON is checked, T
If the XO and TXI flags are ON, the TDATA flag is set, and the process goes through step m5 of the link program to check the connection between the main unit and optional equipment, and then moves to step m6.
In ~m8, the TX address is set and data is set in the transmission RAM area (transmission buffer). This data is transmitted to the Option 11B side via serial communication, and when the data in the transmission buffer runs out, an interrupt is generated and TXX balance 121 interrupt count (number of data + 1
) to DATA-TX-N (counter).

In addition, in step m6, specifically, the transmission initial command shown in FIG. 10 mentioned above is set, and in step m7, rOOol 0000 is set as TXDATA1.
is set and DATA-TX-NiCLt rooo
oooolJ is set.

Mata, TXOQ77g, TXIQ7 lag remains ON, TDATA flag is not ON, TXO, TXI
If the flag is not ON, it is assumed that a reception error has occurred in the optional device or the main unit, and a program for retransmitting from the main unit is executed in step mO.

When the TX buffer becomes empty (at the end of transmission), an interrupt is generated and the interrupt program shown in FIG. 30 described above is entered. A specific example of this Intertwined TX program is shown in the third section.
It is shown in Figure 7. With this program, DATA-TX-N
The data in the TX data area is sequentially put into the transmission buffer according to the information. That is, in FIG. 37, the counter DATA-TX-N is set to FF at step t1.
If it is not [H (hex)], TDA is performed in step t2.
Checks the TA flag and sends rDATA- to step t3.
TX-N is OO[H] or not tfit'14, 0
If it is not 0 [H], it is checked in step t4 whether it is 01 [H], and if YES, steps t5~
Send TXDATAI roooloooooJ at t7 buffer? Transfer to EXO of address and TxDATAl
Find TXEXOR with R, rloololooJ,
Decrement DATA-TX-N by 1 (0OH)
, exit from the interrupt (RETI).

When processing the next interrupt, this time, select YES at step t3.
Then, in steps t8 to 11+, 7 of TXEXOR
Set the pit eye to O, and set the TXEXOR transmission buffer?
, decrements DATA-TX-N by 1 (FFH), and exits from the interrupt. Furthermore, during the next interrupt processing, if YES is determined in step 11, the TDATA flag and T
Reset the XO and TXl flags and exit from the interrupt.

Although the case where the number of data is one has been described above, the same flow is repeated in the case of two, three or four data pieces.

The above is a description of the interrupt processing on the main body side, but next, the interrupt program for input on the optional equipment side will be explained. This program is the interrupt program shown in FIG. 31 mentioned above, and a specific example thereof is shown in FIG.

In the INT-RX program in the same figure, first, in step r1, the 7th bit is tested, and if it is "1", it is determined that the data is an address block, and in steps r2 to r9, the data in the receive buffer is tested. , set the number of data to ADFDATAN, and then
Determine whether it is a data transmission address, transmission request command, or transmission initial command, set the appropriate flag, and
Set the NDATA flag and exit from the interrupt.

Subsequently, during the next interrupt processing, if the 7th bit is O in step r1, it is determined that the data is a data block or a checksum data block, and processing from step rlO is performed. First, it is checked in step rη whether the INDATA flag is turned on, and if it is "1", ADFDATAN is turned off in step r11.
Check whether it is Hl and turn it OFF [If it is not Hl, in steps r12 to r5, ADF is set for each data in the receive buffer.
ll Store in another data area, EXOR the receive buffer data, decrement ADFDATAN by 1, and exit from the interrupt.

During the next interrupt processing, if YES in step r11, it is checked in step r16 whether the data in ADFEXOR and the receive buffer match, and if YES, the INDATA flag is reset in step r17, and the INDATA flag is reset in step r17. Proceeding to the flow after rt9, if No, the flag is reset in step r1g, it is determined that there is an error, and the interrupt is exited.

In steps rll to r21, it is checked whether the transmission initial flag is ON, whether the transmission request flag is ON, and whether it is an ADF address. If the transmission initial flag is ONL/, in step r22, ADFll is set to its own ADF.
Check whether it is an address, and if it is not applicable, step r
At step 23, the INDATA flag is reset, and the interrupt is exited as a transmission error. If applicable, perform steps r24-r28 and step r27;
The data will be sent back to the main unit. That is, the address block of the option type command as shown in FIG.
Transfer to OR, then transfer the ADF address and type as a data block to ADFO1 and 02, respectively, reset the transmission initial flag, and set the number of data pieces to ADFDAVAN.

Furthermore, if the transmission request flag is ONL/, steps r28 ''-' r32 and step r27 are executed in the same way as described above.In other words, if the address corresponds to the own address, steps r30 and r3t are executed. Data transfer (I) as shown in FIG. 18 is performed.

Furthermore, if the data in ADFADR is an ADF address, steps r33 to r36 and step r27 are executed in substantially the same manner as described above. That is, if it is your own address, step r35. At r36, the reception complete command (I) as shown in FIG. 16 is transferred to the transmission buffer or the like.

The above is an explanation of the interrupt processing on the optional equipment (the ADF example above). When the main unit receives data transferred from the optional equipment through this processing, The INT-RX program shown in the figure is subjected to interrupt processing.

This program performs a noise check and a command check.

Since this program is basically the same as that shown in FIG. 38 above, a brief explanation will be given to avoid duplication of explanation. At step r51, the 7th bit is tested to determine whether the transfer data is a command, address, or data. If the 7th bit is "1", steps r52 to r57 are executed to determine whether the received complete command is If so, set the same flag, and if it is an option type command, set it to 0PTYPE.
Set the flag and exit from the interrupt. If the 7th bit is "0" during the next interrupt processing, the flow from step r58 onwards is executed. In other words, DATAN is OFF [
If it is not Hl, store the data in steps r59 to r62, perform EXOR, set the 7th bit of EXOR to 0, decrement DATAN by 1,
Exit from the interrupt. DATAN is OFF[H]k: If it is, check whether EXOR matches the receive buffer in step r63. If it does not match, judge it as a communication error and handle it from the interrupt. - If it is, go to step r64. Execute the link program, and if the 0PTYPE flag is ON, the main unit takes in the transfer data from the option side, determines that the transfer is complete, resets the TXOQ flag and the 0PTYPE flag, and exits from the interrupt. If the oPTYPE flag is not turned on, it is checked in step r65 whether the reception complete flag has been set, and if it is set, data is fetched in step r66, and each flag is reset to complete the transfer. If the reception complete flag is not set, similarly, in steps r67 to r72, the main unit takes in the transfer data from the option side in response to the transmission request command from the main unit, resets each flag, and interrupts the transfer as complete. Get out.

FIG. 40 shows an interrupt program when the transmission buffer in the optional device becomes empty.

In this INT-TX program, the data counter ADFDATAN checks whether FF[H] is present, and if data remains, OO[H].

Check whether it is 01 [H] or 02 [H], and o2[
H], reset the data in ADFO2 to the transmit buffer, perform 0UTEXOR (7) EXOR with ADFO2, set it to 0UTEXOR, and set ADFDATAN to 1.
Only decrements and handles the interrupt from the kel. Next, ADF
If DATAN becomes 01[H], process in the same way as above, and if it becomes OO[H], set the 7th bit of 0LITEXOR to 0, set 0UTEXOR as checksum data in the transmission buffer, exit from the interrupt, OFF
If it becomes [H], the interrupt is exited.

By executing data processing according to a predetermined protocol using each of the above programs, data transmission using the serial interface method can be reliably performed without errors through the two lines between the main body and the optional device.

(Effects of the Invention) As described above, according to the present invention, a transmission data frame is composed of an address block, a data block, and a checksum data block, and the optional device corresponding to the address transmitted from the main body is connected to the received data. When the checksum data calculated by the device based on these matches, the data is transferred to the main unit, and the transfer is completed only when the main unit confirms that the sending address matches the data transferred from the optional device. If the transferred data is not returned from the optional device or if the above match cannot be confirmed, it is determined that there is a communication error and the data is sent again from the main unit. It is possible to prevent errors from occurring and improve noise resistance.
It is possible to increase the signal frequency and increase the data transmission speed, and even if multiple scales are connected to a single copying machine with multifunctional optional equipment, there are only two wires between the main unit and each optional equipment. It is possible to accurately identify devices and transmit data, etc. just by connecting them with the line, 1! The line processing configuration is simple and has the effect of reducing costs.

[Brief explanation of the drawing]

Fig. 1 is an overall configuration diagram of a copying system implementing the method of the present invention, Fig. 2 is a block diagram of a control circuit in the same system, Fig. 3 is a functional block diagram of the same circuit, and Figs.
The figure is a diagram showing the format structure of a frame of transmission data in this interface method, FIG. 14 is a diagram showing the communication procedure of this interface method, FIGS. 15 to 28 are concrete format structure diagrams of data transmission, and FIG. 30 and 31 are flow charts of the interrupt processing program DRAM, and FIGS. 32 to 40 are 70-charts of various programs. 1... Copying machine body, 2... ADF14... Special cassette, 5... Sorter, 11. L2... line. Patent Applicant: Mita Kogyo Co., Ltd. <G Takuhigashi Command> No. 9 1 <Reverse Eating Alcomant-'> fA io
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Claims (1)

[Claims] 1. An interface method in a copying system that consists of a copying machine main body and various types of optional equipment connected to this copying machine main body, and data is transmitted between the main body and the equipment by serial communication. The frame consists of an address block, a data block following this address block, and a checksum data block obtained from both blocks. In the address block, a predetermined number of bits are filled with a command address or an option for the destination or source. Set a predetermined format to represent the device address,
The predetermined format or actual data content is set in a predetermined number of bits in the data block, the checksum data block is obtained by calculating the address block and data block, and the checksum data block is obtained by calculating the address block or data block sent from the main unit. The optional device corresponding to the specified address transfers the data to the main unit when the checksum data sent from the main unit matches the checksum data received and calculated by the optional device, and the main unit transfers the data to the main unit, and the main unit transfers the data to the main unit. When the address in the data transferred from the device matches the address corresponding to the optional device sent from the main unit, it is determined that the transfer is complete, and when the above two addresses do not match, and within a certain period of time after sending from the main unit. An interface method for a copying system characterized in that data is sent again from the main unit when data is not transferred from an optional device.